/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | CheckerDocumentation.cpp | 133 /// \param IsLoad The flag specifying if the location is a store or a load. 137 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, argument
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H A D | ObjCSuperDeallocChecker.cpp | 136 void ObjCSuperDeallocChecker::checkLocation(SVal L, bool IsLoad, const Stmt *S, argument
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/external/v8/src/arm64/ |
H A D | instructions-arm64.cc | 16 bool Instruction::IsLoad() const { function in class:v8::internal::Instruction
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 78 unsigned int IsLoad : 1; member in struct:__anon13262::PPCVSXSwapEntry 343 SwapVector[VecIdx].IsLoad = 1; 349 SwapVector[VecIdx].IsLoad = 1; 358 SwapVector[VecIdx].IsLoad = 1; 663 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { 674 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || 698 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || 748 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { 967 if (SwapVector[EntryIdx].IsLoad)
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/external/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 65 bool Instruction::IsLoad() const { function in class:vixl::aarch64::Instruction
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/external/clang/include/clang/StaticAnalyzer/Core/ |
H A D | Checker.h | 543 bool IsLoad; member in struct:clang::ento::ImplicitNullDerefEvent
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 104 bool IsLoad; member in struct:__anon19992::NEONLdStTableEntry 413 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 477 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 548 if (TableEntry->IsLoad) { 573 if (!TableEntry->IsLoad) 598 if (TableEntry->IsLoad)
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H A D | ARMISelDAGToDAG.cpp | 227 SDNode *SelectVLDSTLane(SDNode *N, bool IsLoad, 1813 SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, argument 1865 if (IsLoad) { 1916 if (!IsLoad)
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | CheckerManager.cpp | 293 bool IsLoad; member in struct:__anon1743::CheckLocationContext 305 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), 310 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : 317 checkFn(Loc, IsLoad, BoundEx, C);
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/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 1070 bool IsLoad = fieldFromInstruction(insn, 22, 1); local 1075 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) 1171 bool IsLoad = fieldFromInstruction(insn, 22, 1); local 1282 if (IsLoad && Rt == Rt2)
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/external/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 122 bool IsLoad; member in struct:__anon13020::NEONLdStTableEntry 397 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 462 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 538 if (TableEntry->IsLoad) { 563 if (!TableEntry->IsLoad) 588 if (TableEntry->IsLoad)
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H A D | ARMLoadStoreOptimizer.cpp | 470 bool IsLoad = local 475 if (IsLoad || IsStore) { 795 bool IsLoad = isi32Load(Opcode); local 796 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); 797 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; 802 if (IsLoad) { 817 bool IsLoad = isLoadSingle(Opcode); local 832 if (IsLoad) {
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H A D | ARMISelDAGToDAG.cpp | 219 void SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating, 2092 void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating, argument 2144 if (IsLoad) { 2194 if (!IsLoad) {
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | InlineSpiller.cpp | 988 bool IsLoad = InstrReg; local 989 if (!IsLoad) 1000 if (IsLoad) {
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/external/clang/lib/CodeGen/ |
H A D | CGAtomic.cpp | 1023 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || local 1045 if (IsLoad) 1051 if (IsLoad || IsStore) 1078 if (!IsLoad) 1080 if (!IsLoad && !IsStore) 1107 if (!IsLoad) { 1115 if (!IsLoad && !IsStore) {
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/external/llvm/lib/CodeGen/ |
H A D | AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad); 227 bool IsStore, IsLoad; local 232 IsLoad = true; 237 IsLoad = false; 242 IsStore = IsLoad = true; 253 IsStore = IsLoad = true; 257 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); 324 bool IsStore, bool IsLoad) { 327 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad); 329 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad); 323 bracketInstWithFences(Instruction *I, AtomicOrdering Order, bool IsStore, bool IsLoad) argument [all...] |
H A D | InlineSpiller.cpp | 660 bool IsLoad = InstrReg; local 661 if (!IsLoad) 668 if (!IsLoad) 675 if (IsLoad) {
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H A D | MachineScheduler.cpp | 1371 bool IsLoad; member in class:__anon12705::BaseMemOpClusterMutation 1375 const TargetRegisterInfo *tri, bool IsLoad) 1376 : TII(tii), TRI(tri), IsLoad(IsLoad) {} 1454 if ((IsLoad && !SU->getInstr()->mayLoad()) || 1455 (!IsLoad && !SU->getInstr()->mayStore())) 1374 BaseMemOpClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri, bool IsLoad) argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 821 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); local 822 if (!IsLoad && !IsStore)
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/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 203 const MCSubtargetInfo *STI, bool IsLoad, bool IsImmOpnd); 2632 const MCSubtargetInfo *STI, bool IsLoad, 2634 if (IsLoad) { 2631 expandMemInst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad, bool IsImmOpnd) argument
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7899 bool IsLoad = FindAliasInfo(N, Ptr, Size, SrcValue, SrcValueOffset, local 7951 if (!(IsLoad && IsOpLoad) &&
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/external/v8/src/crankshaft/ |
H A D | hydrogen.h | 2514 bool IsLoad() const { return access_type_ == LOAD; } function in class:v8::internal::HOptimizedGraphBuilder::PropertyAccessInfo
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 14852 bool IsLoad = isa<LoadSDNode>(N) && !cast<LSBaseSDNode>(N)->isVolatile(); local 14892 if (!(IsLoad && IsOpLoad) &&
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 4967 DecodeScalarMoveMask(VT, /* IsLoad */ false, Mask); 5873 bool IsLoad = ISD::isNormalLoad(Ld.getNode()); local 5876 if (!IsLoad && Subtarget.hasInt256() && 5881 if (!IsLoad) [all...] |