/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 36 RegBase, enumerator in enum:llvm::SystemZAddressMode::__anon20117 49 SystemZAddressMode() : BaseType(RegBase), IndexReg(0), Disp(0) { 91 if (AM.BaseType == SystemZAddressMode::RegBase)
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H A D | SystemZISelDAGToDAG.cpp | 38 RegBase, enumerator in enum:__anon20112::SystemZRRIAddressMode::__anon20113 52 : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) { 57 if (BaseType == RegBase) { 209 if (AM.BaseType == SystemZRRIAddressMode::RegBase && 239 if (AM.BaseType == SystemZRRIAddressMode::RegBase && 280 AM.BaseType == SystemZRRIAddressMode::RegBase && 320 if (AM.BaseType != SystemZRRIAddressMode::RegBase || AM.Base.Reg.getNode()) { 332 AM.BaseType = SystemZRRIAddressMode::RegBase; 339 if (AM.BaseType == SystemZRRIAddressMode::RegBase) 396 if (AM12.BaseType == SystemZRRIAddressMode::RegBase) { [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 38 RegBase, enumerator in enum:__anon13175::MSP430ISelAddressMode::__anon13176 56 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), 66 if (BaseType == RegBase && Base.Reg.getNode() != nullptr) { 168 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) { 174 AM.BaseType = MSP430ISelAddressMode::RegBase; 196 if (AM.BaseType == MSP430ISelAddressMode::RegBase 251 if (AM.BaseType == MSP430ISelAddressMode::RegBase) {
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/external/llvm/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 39 RegBase, enumerator in enum:llvm::X86AddressMode::__anon13360 55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), 64 if (BaseType == X86AddressMode::RegBase) 93 AM.BaseType = X86AddressMode::RegBase; 155 if (AM.BaseType == X86AddressMode::RegBase)
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H A D | X86ISelDAGToDAG.cpp | 53 RegBase, enumerator in enum:__anon13357::X86ISelAddressMode::__anon13358 75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), 91 if (BaseType != RegBase) return false; 99 BaseType = RegBase; 845 AM.BaseType == X86ISelAddressMode::RegBase && 857 AM.BaseType == X86ISelAddressMode::RegBase && 888 if (AM.BaseType == X86ISelAddressMode::RegBase && 1166 if (AM.BaseType == X86ISelAddressMode::RegBase && 1243 if (AM.BaseType == X86ISelAddressMode::RegBase && 1314 if ((AM.BaseType == X86ISelAddressMode::RegBase [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 37 RegBase, enumerator in enum:__anon20072::MSP430ISelAddressMode::__anon20073 55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0), 65 if (BaseType == RegBase && Base.Reg.getNode() != 0) { 173 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) { 179 AM.BaseType = MSP430ISelAddressMode::RegBase; 201 if (AM.BaseType == MSP430ISelAddressMode::RegBase 256 if (AM.BaseType == MSP430ISelAddressMode::RegBase) {
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 40 RegBase, enumerator in enum:llvm::X86AddressMode::__anon20162 56 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { 64 if (BaseType == X86AddressMode::RegBase) 127 if (AM.BaseType == X86AddressMode::RegBase)
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H A D | X86ISelDAGToDAG.cpp | 55 RegBase, enumerator in enum:__anon20159::X86ISelAddressMode::__anon20160 76 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), 92 if (BaseType != RegBase) return false; 100 BaseType = RegBase; 706 AM.BaseType == X86ISelAddressMode::RegBase && 718 AM.BaseType == X86ISelAddressMode::RegBase && 775 if (AM.BaseType == X86ISelAddressMode::RegBase && 825 if (AM.BaseType == X86ISelAddressMode::RegBase && 896 if ((AM.BaseType == X86ISelAddressMode::RegBase && 953 if (AM.BaseType == X86ISelAddressMode::RegBase [all...] |
/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 50 typedef enum { RegBase, FrameIndexBase } BaseKind; enumerator in enum:__anon13306::final::Address::__anon13307 65 Address() : Kind(RegBase), Offset(0), GV(0) { Base.Reg = 0; } 68 bool isRegBase() const { return Kind == RegBase; }
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/external/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 44 typedef enum { RegBase, FrameIndexBase } BaseKind; enumerator in enum:__anon13197::final::Address::__anon13198 59 Address() : Kind(RegBase), Offset(0), GV(0) { Base.Reg = 0; } 62 bool isRegBase() const { return Kind == RegBase; } 1203 Addr.setKind(Address::RegBase);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 69 RegBase, enumerator in enum:__anon13243::Address::__anon13244 82 : BaseType(RegBase), Offset(0) { 447 Addr.BaseType = Address::RegBase; 539 // into a RegBase. 672 // into a RegBase.
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 64 RegBase, enumerator in enum:__anon19993::Address::__anon19994 77 : BaseType(RegBase), Offset(0) { 866 Addr.BaseType = Address::RegBase; 1658 Addr.BaseType = Address::RegBase;
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 55 RegBase, enumerator in enum:__anon13021::Address::__anon13022 68 : BaseType(RegBase), Offset(0) { 862 Addr.BaseType = Address::RegBase; 2004 Addr.BaseType = Address::RegBase;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 48 RegBase, enumerator in enum:__anon12935::final::Address::__anon12936 65 Address() : Kind(RegBase), ExtType(AArch64_AM::InvalidShiftExtend), 71 bool isRegBase() const { return Kind == RegBase; } 983 Addr.setKind(Address::RegBase); 3005 Addr.setKind(Address::RegBase);
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/external/swiftshader/third_party/subzero/src/ |
H A D | IceTargetLoweringMIPS32.cpp | 5918 Variable *RegBase = nullptr; local 5921 RegBase = llvm::cast<Variable>( 5932 if (Base != RegBase) { 5933 Mem = OperandMIPS32Mem::create(Func, Ty, RegBase, Offset,
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