Searched defs:ST (Results 176 - 193 of 193) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp419 const StoreSDNode *ST = cast<StoreSDNode>(N); local
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
4368 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); local
4369 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4372 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4375 ID.AddInteger(ST->getMemoryVT().getRawBits());
4376 ID.AddInteger(ST->getRawSubclassData());
4382 ST
[all...]
/external/clang/lib/CodeGen/
H A DCGOpenMPRuntime.cpp2487 Address ST, llvm::Value *Chunk) {
2522 ST.getPointer(), // &Stride
2534 Address UB, Address ST,
2543 Ordered, IL, LB, UB, ST, Chunk);
2549 bool Ordered, Address IL, Address LB, Address UB, Address ST,
2558 UB, ST, Chunk);
2586 Address ST) {
2597 ST.getPointer() // &Stride
2482 emitForStaticInitCall( CodeGenFunction &CGF, llvm::Value *UpdateLocation, llvm::Value *ThreadId, llvm::Constant *ForStaticInitFunction, OpenMPSchedType Schedule, OpenMPScheduleClauseModifier M1, OpenMPScheduleClauseModifier M2, unsigned IVSize, bool Ordered, Address IL, Address LB, Address UB, Address ST, llvm::Value *Chunk) argument
2529 emitForStaticInit(CodeGenFunction &CGF, SourceLocation Loc, const OpenMPScheduleTy &ScheduleKind, unsigned IVSize, bool IVSigned, bool Ordered, Address IL, Address LB, Address UB, Address ST, llvm::Value *Chunk) argument
2546 emitDistributeStaticInit( CodeGenFunction &CGF, SourceLocation Loc, OpenMPDistScheduleClauseKind SchedKind, unsigned IVSize, bool IVSigned, bool Ordered, Address IL, Address LB, Address UB, Address ST, llvm::Value *Chunk) argument
2582 emitForNext(CodeGenFunction &CGF, SourceLocation Loc, unsigned IVSize, bool IVSigned, Address IL, Address LB, Address UB, Address ST) argument
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4561 static SDValue getEstimate(const AArch64Subtarget &ST, argument
4564 if (!ST.hasNEON())
10015 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
10016 VT = ST->getMemoryVT();
10017 Ptr = ST->getBasePtr();
10036 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
10037 VT = ST->getMemoryVT();
10038 Ptr = ST->getBasePtr();
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1987 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
1988 Ptr = ST->getBasePtr();
1989 VT = ST->getMemoryVT();
1990 Alignment = ST->getAlignment();
6250 StoreSDNode *ST = cast<StoreSDNode>(Op); local
6252 SDValue Chain = ST->getChain();
6253 SDValue BasePtr = ST->getBasePtr();
6254 SDValue Value = ST->getValue();
6255 MachineMemOperand *MMO = ST->getMemOperand();
10506 StoreSDNode *ST local
[all...]
/external/llvm/tools/llvm-objdump/
H A DMachODump.cpp625 SymbolRef::Type ST = *STOrErr; local
626 if (ST == SymbolRef::ST_Function || ST == SymbolRef::ST_Data ||
627 ST == SymbolRef::ST_Other) {
6614 SymbolRef::Type ST = *STOrErr; local
6615 if (ST == SymbolRef::ST_Function || ST == SymbolRef::ST_Data ||
6616 ST == SymbolRef::ST_Other) {
6685 SymbolRef::Type ST = *STOrErr; local
6686 if (ST !
[all...]
/external/mesa3d/src/mesa/x86/
H A Dassyntax.h138 #define ST st macro
208 #define ST(x) CONCAT(_STX,x) macro
863 #define X_ST ST
864 #define D_ST ST
865 #define L_ST ST
890 #define ST(n) st ## n macro
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMISelLowering.cpp2295 DMBOpt = isOnlyStoreBarrier ? ARM_MB::ST : ARM_MB::SY;
3346 const ARMSubtarget *ST) {
3350 if (!ST->hasV6T2Ops())
3358 const ARMSubtarget *ST) {
3366 assert(ST->hasNEON() && "unexpected vector shift");
3393 const ARMSubtarget *ST) {
3410 if (ST->isThumb1Only()) return SDValue();
3908 const ARMSubtarget *ST, DebugLoc dl) {
3914 if (ST->isThumb1Only()) {
3927 const ARMSubtarget *ST) cons
3345 LowerCTTZ(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
3357 LowerShift(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
3392 Expand64BitShift(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
3907 IsSingleInstrConstant(SDValue N, SelectionDAG &DAG, const ARMSubtarget *ST, DebugLoc dl) argument
7703 PerformShiftCombine(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
7738 PerformExtendCombine(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
7778 PerformSELECT_CCCombine(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
[all...]
/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
H A DMachO.h1419 static inline int CPU_SUBTYPE_INTEL_FAMILY(CPUSubTypeX86 ST) { argument
1420 return ((int)ST) & 0x0f;
1422 static inline int CPU_SUBTYPE_INTEL_MODEL(CPUSubTypeX86 ST) { argument
1423 return ((int)ST) >> 4;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp308 SDValue replaceStoreChain(StoreSDNode *ST, SDValue BetterChain);
309 SDValue replaceStoreOfFPConstant(StoreSDNode *ST);
9622 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(Use)) {
9623 if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
9625 VT = ST->getMemoryVT();
9626 AS = ST->getAddressSpace();
9674 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
9675 if (ST->isIndexed())
9677 VT = ST
10856 StoreSDNode *ST = cast<StoreSDNode>(N); local
10984 StoreSDNode *ST = cast<StoreSDNode>(N); local
11905 replaceStoreChain(StoreSDNode *ST, SDValue BetterChain) argument
11930 replaceStoreOfFPConstant(StoreSDNode *ST) argument
12014 StoreSDNode *ST = cast<StoreSDNode>(N); local
[all...]
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp4604 const ARMSubtarget *ST) {
4608 assert(ST->hasNEON());
4682 if (!ST->hasV6T2Ops())
4783 const ARMSubtarget *ST) {
4786 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON.");
4798 const ARMSubtarget *ST) {
4806 assert(ST->hasNEON() && "unexpected vector shift");
4834 const ARMSubtarget *ST) {
4850 if (ST->isThumb1Only()) return SDValue();
5174 const ARMSubtarget *ST) cons
4603 LowerCTTZ(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
4782 LowerCTPOP(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
4797 LowerShift(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
4833 Expand64BitShift(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
5628 IsSingleInstrConstant(SDValue N, SelectionDAG &DAG, const ARMSubtarget *ST, const SDLoc &dl) argument
10697 PerformShiftCombine(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
10747 PerformExtendCombine(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) argument
[all...]
/external/antlr/antlr-3.4/lib/
H A Dantlr-3.4-complete.jarMETA-INF/ META-INF/MANIFEST.MF org/ org/antlr/ org/antlr/analysis/ org/antlr/codegen/ org/ ...
/external/google-tv-pairing-protocol/java/jar/
H A Dbcprov-jdk15-143.jarMETA-INF/MANIFEST.MF META-INF/BCKEY.SF META-INF/BCKEY.DSA META ...
/external/robolectric/v3/runtime/
H A Dandroid-all-4.1.2_r1-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.2.2_r1.2-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.3_r2-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.4_r1-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...
H A Dandroid-all-5.0.0_r2-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...
H A Dandroid-all-5.1.1_r9-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...

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