Search

Home

Sort by

Searched defs:SubReg1 (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/AArch64/
H A D	AArch64AdvSIMDScalarPass.cpp	`215 unsigned SubReg1; local 233 MachineOperand MOSrc1 = getSrcFromCopy(&Def, MRI, SubReg1); 307 unsigned Src1 = 0, SubReg1; local 332 MachineOperand MOSrc1 = getSrcFromCopy(&Def, MRI, SubReg1); 356 SubReg1 = 0; 372 .addReg(Src1, getKillRegState(KillSrc1), SubReg1);`
/external/llvm/lib/Target/PowerPC/
H A D	PPCInstrInfo.cpp	`351 unsigned SubReg1 = MI.getOperand(1).getSubReg(); local 362 assert(MI.getOperand(0).getSubReg() == SubReg1 && "Tied subreg mismatch"); 394 MI.getOperand(2).setSubReg(SubReg1);`
/external/llvm/lib/CodeGen/
H A D	TargetInstrInfo.cpp	`147 unsigned SubReg1 = MI.getOperand(Idx1).getSubReg(); local 166 SubReg0 = SubReg1; 184 CommutedMI->getOperand(Idx2).setSubReg(SubReg1);`
/external/llvm/lib/Target/AMDGPU/
H A D	AMDGPUISelDAGToDAG.cpp	`364 SDValue RC, SubReg0, SubReg1; local 372 SubReg1 = CurDAG->getTargetConstant(AMDGPU::sub2_sub3, DL, MVT::i32); 376 SubReg1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); 381 N->getOperand(1), SubReg1 };`
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A D	ARMISelDAGToDAG.cpp	1457 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, MVT::i32); local 1458 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1468 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::dsub_1, MVT::i32); local 1469 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1479 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::qsub_1, MVT::i32); local 1480 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1492 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, MVT::i32); local 1495 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, 1507 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::dsub_1, MVT::i32); local 1510 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, 1522 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::qsub_1, MVT::i32); local [all...]
/external/llvm/lib/Target/ARM/
H A D	ARMISelDAGToDAG.cpp	1601 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::gsub_1, dl, MVT::i32); local 1602 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1612 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, dl, MVT::i32); local 1613 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1623 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::dsub_1, dl, MVT::i32); local 1624 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1634 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::qsub_1, dl, MVT::i32); local 1635 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1646 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, dl, MVT::i32); local 1649 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, 1661 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::dsub_1, dl, MVT::i32); local 1676 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::qsub_1, dl, MVT::i32); local [all...]
H A D	ARMISelLowering.cpp	`7109 SDValue SubReg1 = DAG.getTargetConstant(ARM::gsub_1, dl, MVT::i32); local 7110 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 };`

Completed in 448 milliseconds