/external/iproute2/include/linux/ |
H A D | bpf.h | 63 __s32 imm; /* signed immediate constant */ member in struct:bpf_insn 136 /* integer value in 'imm' field of BPF_CALL instruction selects which helper
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/external/kernel-headers/original/uapi/linux/ |
H A D | bpf.h | 63 __s32 imm; /* signed immediate constant */ member in struct:bpf_insn 488 /* integer value in 'imm' field of BPF_CALL instruction selects which helper
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/external/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 118 bool isLegalAddImmediate(int64_t imm) { argument 119 return getTLI()->isLegalAddImmediate(imm); 122 bool isLegalICmpImmediate(int64_t imm) { argument 123 return getTLI()->isLegalICmpImmediate(imm);
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/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 806 unsigned imm = fieldFromInstruction(insn, 5, 16); local 830 Inst.addOperand(MCOperand::createImm(imm)); 1356 unsigned imm; local 1364 imm = fieldFromInstruction(insn, 10, 13); 1365 if (!AArch64_AM::isValidDecodeLogicalImmediate(imm, 64)) 1373 imm = fieldFromInstruction(insn, 10, 12); 1374 if (!AArch64_AM::isValidDecodeLogicalImmediate(imm, 32)) 1377 Inst.addOperand(MCOperand::createImm(imm)); 1386 unsigned imm = fieldFromInstruction(insn, 16, 3) << 5; local 1387 imm | 1425 unsigned imm = fieldFromInstruction(insn, 16, 3) << 5; local 1441 int64_t imm = fieldFromInstruction(insn, 5, 19) << 2; local 1496 int64_t imm = fieldFromInstruction(insn, 0, 26); local [all...] |
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AddressingModes.h | 90 /// imm: 6-bit shift amount 97 /// {5-0} = imm 167 /// imm: 3-bit extend amount 274 static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) { argument 276 return processLogicalImmediate(imm, regSize, encoding); 281 static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) { argument 283 bool res = processLogicalImmediate(imm, regSize, encoding);
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/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1142 unsigned imm = fieldFromInstruction(Val, 7, 5); local 1164 if (Shift == ARM_AM::ror && imm == 0) 1167 unsigned Op = Shift | (imm << 3); 1328 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 1415 imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm); 1416 Inst.addOperand(MCOperand::createImm(imm)); 1434 imm |= U << 8; 1439 Inst.addOperand(MCOperand::createImm(imm)); 1478 unsigned imm local 1561 unsigned imm = ARM_AM::getAM2Opc(Op, amt, Opc, idx_mode); local 1583 unsigned imm = fieldFromInstruction(Val, 7, 5); local 1628 unsigned imm = fieldFromInstruction(Insn, 8, 4); local 2056 int imm = fieldFromInstruction(Insn, 0, 8); local 2071 unsigned imm = 0; local 2096 unsigned imm = 0; local 2199 unsigned imm = fieldFromInstruction(Val, 0, 12); local 2221 unsigned imm = fieldFromInstruction(Val, 0, 8); local 2241 unsigned imm = fieldFromInstruction(Val, 0, 8); local 2292 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2; local 3115 unsigned imm = fieldFromInstruction(Insn, 0, 4); local 3238 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 3301 unsigned imm = fieldFromInstruction(Val, 3, 5); local 3312 unsigned imm = Val << 2; local 3334 unsigned imm = fieldFromInstruction(Val, 0, 2); local 3445 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 3528 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 3608 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 3647 int imm = fieldFromInstruction(Insn, 0, 12); local 3699 int imm = Val & 0xFF; local 3713 unsigned imm = fieldFromInstruction(Val, 0, 9); local 3728 unsigned imm = fieldFromInstruction(Val, 0, 8); local 3740 int imm = Val & 0xFF; local 3756 unsigned imm = fieldFromInstruction(Val, 0, 9); local 3863 unsigned imm = fieldFromInstruction(Val, 0, 12); local 3886 unsigned imm = fieldFromInstruction(Insn, 0, 7); local 4021 unsigned imm = fieldFromInstruction(Insn, 0, 4); local 4047 unsigned imm = fieldFromInstruction(Val, 0, 8); local 4066 unsigned imm = (unrot >> rot) | (unrot << ((32-rot)&31)); local 4279 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 4304 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 4332 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 4357 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 5133 unsigned imm = fieldFromInstruction(Insn, 16, 6); local 5192 unsigned imm = fieldFromInstruction(Insn, 16, 6); local [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 34 static unsigned translateShiftImm(unsigned imm) { argument 36 assert((imm & ~0x1f) == 0 && "Invalid shift encoding"); 38 if (imm == 0) 40 return imm; 56 O << "<imm:"; 121 O << ", " << markup("<imm:") << "#" 279 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">"); 330 O << markup("<imm:") << "#-" << formatImm(-OffImm) << markup(">"); 332 O << markup("<imm:") << "#" << formatImm(OffImm) << markup(">"); 391 O << ", " << markup("<imm [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 739 int64_t imm = MI.getOperand(1).getImm(); local 742 if (isUInt<8>(imm)) 744 else if ((!ImmSigned && isUInt<16>(imm)) || 745 (ImmSigned && isInt<16>(imm))) 749 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1760 /// can be more efficiently represented with [r+imm]. 1764 short imm = 0; local 1766 if (isIntS16Immediate(N.getOperand(1), imm)) 1775 if (isIntS16Immediate(N.getOperand(1), imm)) 1843 /// a signed 16-bit displacement [r+imm], and if it is not better 1857 short imm = 0; local 1858 if (isIntS16Immediate(N.getOperand(1), imm) && 1859 (!Aligned || (imm & 3) == 0)) { 1860 Disp = DAG.getTargetConstant(imm, dl, N.getValueType()); 1881 short imm local [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | Sparc.h | 150 inline static unsigned HI22(int64_t imm) { argument 151 return (unsigned)((imm >> 10) & ((1 << 22)-1)); 154 inline static unsigned LO10(int64_t imm) { argument 155 return (unsigned)(imm & 0x3FF); 158 inline static unsigned HIX22(int64_t imm) { argument 159 return HI22(~imm); 162 inline static unsigned LOX10(int64_t imm) { argument 163 return ~LO10(~imm);
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H A D | SparcAsmPrinter.cpp | 200 MCOperand imm = MCOperand::createExpr(MCConstantExpr::create(12, local 202 EmitSHL(*OutStreamer, MCRegOP, imm, MCRegOP, STI); 212 MCOperand imm = MCOperand::createExpr(MCConstantExpr::create(32, local 214 EmitSHL(*OutStreamer, MCRegOP, imm, MCRegOP, STI);
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/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 273 IntelExprStateMachine(int64_t imm, bool stoponlbrac, bool addimmprefix) : argument 275 Scale(1), Imm(imm), Sym(nullptr), StopOnLBrac(stoponlbrac),
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/external/mesa3d/src/compiler/glsl/ |
H A D | builtin_functions.cpp | 613 ir_constant *imm(float f, unsigned vector_elements=1); 614 ir_constant *imm(bool b, unsigned vector_elements=1); 615 ir_constant *imm(int i, unsigned vector_elements=1); 616 ir_constant *imm(unsigned u, unsigned vector_elements=1); 617 ir_constant *imm(double d, unsigned vector_elements=1); 618 ir_constant *imm(const glsl_type *type, const ir_constant_data &); 3177 builtin_builder::imm(bool b, unsigned vector_elements) function in class:builtin_builder 3183 builtin_builder::imm(float f, unsigned vector_elements) function in class:builtin_builder 3189 builtin_builder::imm(int i, unsigned vector_elements) function in class:builtin_builder 3195 builtin_builder::imm(unsigne function in class:builtin_builder 3201 builtin_builder::imm(double d, unsigned vector_elements) function in class:builtin_builder 3207 builtin_builder::imm(const glsl_type *type, const ir_constant_data &data) function in class:builtin_builder [all...] |
/external/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_bitarit.c | 224 lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument 226 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm); 227 assert(imm < bld->type.width); 237 lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument 239 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm); 240 assert(imm < bld->type.width);
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H A D | lp_bld_tgsi_aos.c | 1010 float imm[4]; local 1014 imm[chan] = 0.0f; 1018 imm[swizzle] = parse.FullToken.FullImmediate.u[chan].Float; 1022 imm[0], imm[1], imm[2], imm[3],
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H A D | lp_bld_tgsi_info.c | 50 float imm[LP_MAX_TGSI_IMMEDIATES][4]; member in struct:analysis_context 76 assert(src->Index < ARRAY_SIZE(ctx->imm)); 77 if (src->Index < ARRAY_SIZE(ctx->imm)) { 78 chan_info->u.value = ctx->imm[src->Index][swizzle]; 583 if (ctx->num_imms < ARRAY_SIZE(ctx->imm)) { 586 ctx->imm[ctx->num_imms][chan] = value;
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H A D | lp_bld_tgsi_soa.c | 3050 const struct tgsi_full_immediate *imm) 3056 const uint size = imm->Immediate.NrTokens - 1; 3058 switch (imm->Immediate.DataType) { 3062 lp_build_const_vec(gallivm, bld_base->base.type, imm->u[i].Float); 3070 LLVMValueRef tmp = lp_build_const_vec(gallivm, bld_base->uint_bld.type, imm->u[i].Uint); 3077 LLVMValueRef tmp = lp_build_const_vec(gallivm, bld_base->int_bld.type, imm->u[i].Int); 3102 assert(imm->Immediate.NrTokens - 1 <= 4); 3048 lp_emit_immediate_soa( struct lp_build_tgsi_context *bld_base, const struct tgsi_full_immediate *imm) argument
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_aa_point.c | 87 struct tgsi_full_immediate *imm) 91 ctx->emit_immediate(ctx, imm); 104 unsigned imm; local 120 imm = ts->num_imm++; 154 TGSI_FILE_IMMEDIATE, imm, true); 172 TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_X, 178 TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_X, 201 TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_W, false); 86 aa_immediate(struct tgsi_transform_context *ctx, struct tgsi_full_immediate *imm) argument
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H A D | tgsi_lowering.c | 51 struct tgsi_full_src_register imm; member in struct:tgsi_lowering_context 109 * MOV dst.zw, imm{0.0, 1.0} 178 * ; needs: 2 tmp, imm{1.0} 190 * MOV dst.x, imm{1.0} 250 /* MOV dst.x, imm{1.0} */ 256 reg_src(&new_inst.Src[0], &ctx->imm, SWIZ(Y, _, _, _)); 267 * ; needs: 1 tmp, imm{1.0} 270 * MOV dst.w, imm{1.0} 309 /* MOV dst.w, imm{1.0} */ 315 reg_src(&new_inst.Src[0], &ctx->imm, SWI [all...] |
H A D | tgsi_parse.c | 141 struct tgsi_full_immediate *imm = &ctx->FullToken.FullImmediate; local 144 memset(imm, 0, sizeof *imm); 145 copy_token(&imm->Immediate, &token); 147 imm_count = imm->Immediate.NrTokens - 1; 149 switch (imm->Immediate.DataType) { 153 next_token(ctx, &imm->u[i].Float); 160 next_token(ctx, &imm->u[i].Uint); 167 next_token(ctx, &imm->u[i].Int);
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H A D | tgsi_point_sprite.c | 155 struct tgsi_full_immediate *imm) 159 ctx->emit_immediate(ctx, imm); 154 psprite_immediate(struct tgsi_transform_context *ctx, struct tgsi_full_immediate *imm) argument
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H A D | tgsi_text.c | 1652 struct tgsi_full_immediate imm; local 1694 imm = tgsi_default_full_immediate(); 1695 imm.Immediate.NrTokens += 4; 1696 imm.Immediate.DataType = type; 1697 parse_immediate_data(ctx, type, imm.u); 1700 &imm,
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H A D | tgsi_transform.c | 70 const struct tgsi_full_immediate *imm) 74 ti += tgsi_build_full_immediate(imm, 69 emit_immediate(struct tgsi_transform_context *ctx, const struct tgsi_full_immediate *imm) argument
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H A D | tgsi_ureg.c | 57 struct tgsi_immediate imm; member in union:tgsi_any_token 1813 out[0].imm.Type = TGSI_TOKEN_TYPE_IMMEDIATE; 1814 out[0].imm.NrTokens = 5; 1815 out[0].imm.DataType = type; 1816 out[0].imm.Padding = 0;
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/external/mesa3d/src/gallium/auxiliary/util/ |
H A D | u_simple_shaders.c | 258 struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); local 260 ureg_MOV( ureg, out, imm ); 325 struct ureg_src imm; local 351 imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); 353 ureg_MOV( ureg, out, imm ); 377 struct ureg_src imm; local 412 imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); 414 ureg_MOV( ureg, out, imm ); 441 struct ureg_src imm; local 467 imm 898 struct ureg_src imm; local [all...] |