Searched defs:reg_map (Results 1 - 8 of 8) sorted by relevance
/external/pcre/dist2/src/sljit/ |
H A D | sljitNativeARM_32.c | 58 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable 62 #define RM(rm) (reg_map[rm]) 63 #define RD(rd) (reg_map[rd] << 12) 64 #define RN(rn) (reg_map[rn] << 16) 845 push |= 1 << reg_map[i]; 848 push |= 1 << reg_map[i]; 903 pop |= 1 << reg_map[i]; 906 pop |= 1 << reg_map[i]; 941 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base [all...] |
H A D | sljitNativeARM_64.c | 46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable 51 #define RD(rd) (reg_map[rd]) 52 #define RT(rt) (reg_map[rt]) 53 #define RN(rn) (reg_map[rn] << 5) 54 #define RT2(rt2) (reg_map[rt2] << 10) 55 #define RM(rm) (reg_map[rm] << 16) 1518 return reg_map[reg];
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H A D | sljitNativeSPARC_common.c | 98 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable 106 #define D(d) (reg_map[d] << 25) 108 #define S1(s1) (reg_map[s1] << 14) 109 #define S2(s2) (reg_map[s2]) 116 #define DR(dr) (reg_map[dr]) 924 return reg_map[reg];
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H A D | sljitNativeARM_T2_32.c | 45 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable 53 #define RD3(rd) (reg_map[rd]) 54 #define RN3(rn) (reg_map[rn] << 3) 55 #define RM3(rm) (reg_map[rm] << 6) 56 #define RDN3(rdn) (reg_map[rdn] << 8) 62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4)) 64 (reg_map[reg1] <= 7 && reg_map[reg [all...] |
H A D | sljitNativeMIPS_common.c | 71 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable 79 #define S(s) (reg_map[s] << 21) 80 #define T(t) (reg_map[t] << 16) 81 #define D(d) (reg_map[d] << 11) 92 #define DR(dr) (reg_map[dr]) 1254 return reg_map[reg];
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H A D | sljitNativePPC_common.c | 108 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable 115 #define D(d) (reg_map[d] << 21) 116 #define S(s) (reg_map[s] << 21) 117 #define A(a) (reg_map[a] << 16) 118 #define B(b) (reg_map[b] << 11) 119 #define C(c) (reg_map[c] << 6) 1666 return reg_map[reg];
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H A D | sljitNativeTILEGX_64.c | 52 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable 1163 FAIL_IF(ADDLI_SOLO(reg_map[dst_ar], ZERO, imm >> 48)); 1164 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 32)); 1165 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 16)); 1166 return SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm); 1169 FAIL_IF(ADDLI(reg_map[dst_ar], ZERO, imm >> 48)); 1170 FAIL_IF(SHL16INSLI(reg_map[dst_a [all...] |
H A D | sljitNativeX86_common.c | 69 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable 92 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable 95 /* low-map. reg_map & 0x7. */ 101 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable 104 /* low-map. reg_map & 0x7. */ 701 return emit_do_imm(compiler, MOV_r_i32 + reg_map[dst], srcw); 708 return emit_do_imm32(compiler, (reg_map[dst] >= 8) ? REX_B : 0, MOV_r_i32 + reg_lmap[dst], srcw); 778 reg_map[SLJIT_R0] == 0 779 && reg_map[SLJIT_R1] == 2 780 && reg_map[TMP_REG [all...] |
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