Searched defs:spilled (Results 1 - 6 of 6) sorted by relevance
/external/r8/src/main/java/com/android/tools/r8/ir/regalloc/ |
H A D | LiveIntervals.java | 30 private boolean spilled = false; field in class:LiveIntervals 35 // Max register used for any of the non-spilled splits for these live intervals or for any of the 80 spilled = value; 84 return spilled; 91 // If one of the non-spilled splits uses a register that is higher than U8BIT_MAX we cannot
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H A D | LinearScanRegisterAllocator.java | 540 // spilled. 589 // rematerialized instead of spilled. 610 // Treat the argument interval as spilled which will require a load to a different 1457 // spilled. That will allows us to remove it afterwards if it is rematerializable. 1482 private void splitRangesForSpilledArgument(LiveIntervals spilled) { argument 1483 assert spilled.isSpilled(); 1484 assert spilled.isArgumentInterval(); 1485 // Argument intervals are spilled to the original argument register. We don't know what 1488 if (!spilled.getUses().isEmpty()) { 1489 LiveIntervals split = spilled 1494 splitRangesForSpilledInterval(LiveIntervals spilled, int registerNumber) argument 1522 splitRangesForSpilledConstant(LiveIntervals spilled, int spillRegister) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | ShrinkWrapping.cpp | 540 // Machine CFG around which CSRs must be spilled and restored. 546 /// addUsesForMEMERegion - add uses of CSRs spilled or restored in 670 /// calcSpillPlacements - determine which CSRs should be spilled 672 /// of changes to spilled reg sets. Add MBB to the set of blocks 712 // Reset all regs spilled in MBB that are also spilled in EntryBlock. 833 // Add uses for CSRs spilled or restored at branch, join points. 931 /// all CSRs spilled at MMBB are restored on all paths 934 /// all CSRs restored at MBB are spilled on all paths 948 CSRegSet spilled local 1002 CSRegSet spilled; local [all...] |
H A D | RegAllocPBQP.cpp | 145 /// spilled. Used to support stack slot coloring. 146 void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* mri); 491 void RegAllocPBQP::addStackInterval(const LiveInterval *spilled, argument 493 int stackSlot = vrm->getStackSlot(spilled->reg); 499 const TargetRegisterClass *RC = mri->getRegClass(spilled->reg); 510 LiveInterval &rhsInterval = lis->getInterval(spilled->reg); 614 // Filter out zero regs - they're for intervals that were spilled.
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H A D | RegAllocLinearScan.cpp | 1287 // Determine which intervals have to be spilled. 1290 // Set of spilled vregs (used later to rollback properly) 1291 SmallSet<unsigned, 8> spilled; local 1301 // track of the earliest start of all spilled live intervals since this will 1312 spilled.insert(sli->reg); 1325 // spilled live interval and undo each one, restoring the state of 1341 if (!spilled.count(i->reg)) 1348 if (!spilled.count(i->reg))
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/external/v8/src/compiler/ |
H A D | register-allocator.h | 339 bool spilled() const { return SpilledField::decode(bits_); } function in class:v8::internal::compiler::LiveRange 370 // Can this live range be spilled at this position. 567 // If all the children of this range are spilled in deferred blocks, and if 568 // for any non-spilled child with a use position requiring a slot, that range 572 // deferred blocks. If so, we insert here spills for non-spilled ranges 1099 // Range is guaranteed to be spilled at least until position [until].
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