/external/libpng/contrib/gregbook/ |
H A D | rpng2-x.c | 1377 uch *src, *src2=NULL; local 1428 src2 = bg_data + row*bg_rowbytes; 1459 bg_red = *src2++; 1460 bg_green = *src2++; 1461 bg_blue = *src2++; 1503 src2 = bg_data + row*bg_rowbytes; 1527 bg_red = *src2++; 1528 bg_green = *src2++; 1529 bg_blue = *src2++; 1618 uch *src, *src2 local [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
H A D | avg_msa.c | 17 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 21 LD_UB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 22 HADD_UB4_UH(src0, src1, src2, src3, sum0, sum1, sum2, sum3); 39 uint32_t src0, src1, src2, src3; local 45 LW4(src, src_stride, src0, src1, src2, src3); 46 INSERT_W4_UB(src0, src1, src2, src3, vec); 60 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; local 63 LD_SH8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 64 BUTTERFLY_8(src0, src2, src4, src6, src7, src5, src3, src1, tmp0, tmp2, tmp4, 67 src5, src7, src6, src3, src2); 84 v8i16 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local 257 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; local 567 v8i16 src0, src1, src2, src3, src4, src5, src6, src7, ref0, ref1, ref2; local [all...] |
/external/mesa3d/prebuilt-intermediates/nir/ |
H A D | nir_builder_opcodes.h | 99 nir_bcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 101 return nir_build_alu(build, nir_op_bcsel, src0, src1, src2, NULL); 104 nir_bfi(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 106 return nir_build_alu(build, nir_op_bfi, src0, src1, src2, NULL); 119 nir_bitfield_insert(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) argument 121 return nir_build_alu(build, nir_op_bitfield_insert, src0, src1, src2, src3); 244 nir_fcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 246 return nir_build_alu(build, nir_op_fcsel, src0, src1, src2, NULL); 339 nir_ffma(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 341 return nir_build_alu(build, nir_op_ffma, src0, src1, src2, NUL 364 nir_flrp(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 594 nir_ibfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 599 nir_ibitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 799 nir_ubfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 804 nir_ubitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 939 nir_vec3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 944 nir_vec4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) argument [all...] |
H A D | nir_constant_expressions.c | 1144 const uint32_t src2 = local 1147 uint32_t dst = src0 ? src1 : src2; 1162 const uint64_t src2 = local 1165 uint64_t dst = src0 ? src1 : src2; 1195 const uint32_t src2 = local 1201 unsigned mask = src0, insert = src1, base = src2; 1228 const uint32_t src2 = local 1234 unsigned mask = src0, insert = src1, base = src2; 1399 const int32_t src2 = local 1408 int offset = src2, bit 1433 const int32_t src2 = local 2707 const float32_t src2 = local 2726 const float32_t src2 = local 3735 const float32_t src2 = local 3754 const float64_t src2 = local 3987 const float32_t src2 = local 4006 const float64_t src2 = local 6023 const int32_t src2 = local 6056 const int32_t src2 = local 6103 const int32_t src2 = local 6134 const int32_t src2 = local 8167 const int32_t src2 = local 8200 const int32_t src2 = local 8247 const int32_t src2 = local 8278 const int32_t src2 = local 9784 const struct uint32_vec src2 = { local 9823 const struct uint64_vec src2 = { local 9876 const struct uint32_vec src2 = { local 9924 const struct uint64_vec src2 = { local [all...] |
/external/mesa3d/src/gallium/drivers/ilo/shader/ |
H A D | toy_compiler_disasm.c | 108 struct disasm_src_operand src2; member in union:disasm_inst::__anon15005 548 inst->u.src2.base.type = inst->src0.base.type; 556 inst->u.src2.base.type = GEN6_TYPE_F; 573 inst->u.src2.base.file = GEN6_FILE_GRF; 574 inst->u.src2.negate = (bool) (dw1 & GEN6_3SRC_SRC2_NEGATE); 575 inst->u.src2.absolute = (bool) (dw1 & GEN6_3SRC_SRC2_ABSOLUTE); 602 inst->u.src2.negate = (bool) (dw1 & GEN8_3SRC_SRC2_NEGATE); 603 inst->u.src2.absolute = (bool) (dw1 & GEN8_3SRC_SRC2_ABSOLUTE); 612 inst->u.src2.base.file = GEN6_FILE_GRF; 613 inst->u.src2 [all...] |
/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
H A D | nv50_ir_peephole.cpp | 384 ImmediateValue src0, src1, src2; local 389 i->src(2).getImmediate(src2)) 390 expr(i, src0, src1, src2); 401 if (i->srcExists(2) && i->src(2).getImmediate(src2)) 402 opnd3(i, src2);
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/external/mesa3d/src/gallium/drivers/svga/ |
H A D | svga_tgsi_insn.c | 384 struct src_register src2) 390 emit_src(emit, src2)); 401 struct src_register src2, 408 emit_src(emit, src2) && 578 struct src_register src2) 590 type2 = SVGA3dShaderGetRegType( src2.base.value ); 595 (type2 == SVGA3DREG_CONST && src0.base.num != src2.base.num))) 599 (type2 == SVGA3DREG_CONST && src1.base.num != src2.base.num)) 605 (type2 == SVGA3DREG_INPUT && src0.base.num != src2.base.num))) 609 (type2 == SVGA3DREG_INPUT && src1.base.num != src2 379 emit_op3(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2) argument 396 emit_op4(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument 573 submit_op3(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2) argument 645 submit_op4(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument 1643 const struct src_register src2 = local 2293 submit_lrp(struct svga_shader_emitter *emit, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1, struct src_register src2) argument 2340 const struct src_register src2 = translate_src_register( local [all...] |
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
H A D | utils.h | 199 void vTranspose4x16(simd16scalar(&dst)[4], const simd16scalar &src0, const simd16scalar &src1, const simd16scalar &src2, const simd16scalar &src3) variable 205 simd16scalar pre2 = _simd16_permute_ps(src2, perm); // b 324 __m128i src2 = _mm_load_si128(reinterpret_cast<const __m128i *>(pSrc) + 2); // bbbbbbbbbbbbbbbb local 329 simd16scalari cvt2 = _simd16_cvtepu8_epi32(src2); 414 simdscalar src2 = _simd_load_ps((const float*)pSrc + 16); local 418 vTranspose4x8(vDst, src0, src1, src2, src3); 437 simd16scalar src2 = _simd16_load_ps(reinterpret_cast<const float *>(pSrc) + 32); local 442 vTranspose4x16(dst, src0, src1, src2, src3); 466 simdscalar src2 = _simd_load_ps((const float*)pSrc + 16); local 469 vTranspose3x8(vDst, src0, src1, src2); 488 simd16scalar src2 = _simd16_load_ps(reinterpret_cast<const float *>(pSrc) + 32); local 601 simdscalari src2 = _simd_load_si(reinterpret_cast<const simdscalari *>(pSrc) + 2); // bbbbbbbbbbbbbbbb local 670 simdscalari src2 = _simd_load_si(reinterpret_cast<const simdscalari *>(pSrc) + 2); // bbbbbbbbbbbbbbbb local [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_eu_emit.c | 870 struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) 917 assert(src2.file == BRW_GENERAL_REGISTER_FILE); 918 assert(src2.address_mode == BRW_ADDRESS_DIRECT); 919 assert(src2.nr < 128); 920 brw_inst_set_3src_src2_swizzle(devinfo, inst, src2.swizzle); 921 brw_inst_set_3src_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2)); 922 brw_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); 923 brw_inst_set_3src_src2_abs(devinfo, inst, src2.abs); 924 brw_inst_set_3src_src2_negate(devinfo, inst, src2.negate); 926 src2 869 brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) argument [all...] |
H A D | brw_fs.cpp | 122 const fs_reg &src0, const fs_reg &src1, const fs_reg &src2) 124 const fs_reg src[3] = { src0, src1, src2 }; 121 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, const fs_reg &src0, const fs_reg &src1, const fs_reg &src2) argument
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H A D | brw_vec4_visitor.cpp | 33 const src_reg &src2) 39 this->src[2] = src2; 89 const src_reg &src1, const src_reg &src2) 91 return emit(new(mem_ctx) vec4_instruction(opcode, dst, src0, src1, src2)); 150 const src_reg &src1, const src_reg &src2) \ 154 src0, src1, src2); \ 31 vec4_instruction(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1, const src_reg &src2) argument 88 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1, const src_reg &src2) argument
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/external/mesa3d/src/mesa/main/ |
H A D | ffvertex_prog.c | 573 struct ureg src2, 611 emit_arg( &inst->SrcReg[2], src2 ); 619 #define emit_op3(p, op, dst, mask, src0, src1, src2) \ 620 emit_op3fn(p, op, dst, mask, src0, src1, src2, __func__, __LINE__) 567 emit_op3fn(struct tnl_program *p, enum prog_opcode op, struct ureg dest, GLuint mask, struct ureg src0, struct ureg src1, struct ureg src2, const char *fn, GLuint line) argument
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/external/mesa3d/src/mesa/program/ |
H A D | ir_to_mesa.cpp | 283 src_reg src0, src_reg src1, src_reg src2); 355 src_reg src0, src_reg src1, src_reg src2) 367 num_reladdr += src2.reladdr != NULL; 369 reladdr_to_temp(ir, &src2, &num_reladdr); 383 inst->src[2] = src2; 353 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument
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/external/opencv/cv/src/ |
H A D | cvlkpyramid.cpp | 238 const float* src2 = src + src_step; local 243 float t0 = (src3[x] + src[x])*smooth_k[0] + src2[x]*smooth_k[1];
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/external/pcre/dist2/src/sljit/ |
H A D | sljitLir.c | 1097 sljit_s32 src2, sljit_sw src2w) 1108 FUNCTION_CHECK_SRC(src2, src2w); 1120 sljit_verbose_param(compiler, src2, src2w); 1213 sljit_s32 src2, sljit_sw src2w) 1225 FUNCTION_FCHECK(src2, src2w); 1233 sljit_verbose_fparam(compiler, src2, src2w); 1303 sljit_s32 src2, sljit_sw src2w) 1310 FUNCTION_FCHECK(src2, src2w); 1320 sljit_verbose_fparam(compiler, src2, src2w); 1361 sljit_s32 src2, sljit_s 1094 check_sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1211 check_sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1300 check_sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1359 check_sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1382 check_sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1595 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1677 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1858 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1911 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1943 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1957 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
H A D | sljitNativeARM_32.c | 513 sljit_uw src2; local 515 src2 = get_imm(new_constant); 516 if (src2) { 517 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2; 524 src2 = get_imm(~new_constant); 525 if (src2) { 526 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2; 820 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \ 821 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2)) 826 sljit_s32 src2, sljit_s 986 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_s32 src1, sljit_s32 src2) argument 1602 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 inp_flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1932 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 2152 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 2218 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
H A D | sljitNativeARM_64.c | 1433 sljit_s32 src2, sljit_sw src2w) 1438 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w)); 1441 ADJUST_LOCAL_OFFSET(src2, src2w); 1466 if (src2 & SLJIT_MEM) { 1467 if (getput_arg_fast(compiler, mem_flags, TMP_REG2, src2, src2w)) 1474 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1475 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src2, src2w, src1, src1w)); 1479 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG1, src1, src1w, src2, src2w)); 1480 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src2, src2w, dst, dstw)); 1486 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src2, src2 1430 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1654 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1721 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
H A D | sljitNativeSPARC_common.c | 639 sljit_s32 src2, sljit_sw src2w) 656 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_S32 && !(src2 & SLJIT_MEM)) 669 if ((src2 & SLJIT_IMM) && src2w) { 681 src1 = src2; 683 src2 = SLJIT_IMM; 709 if (FAST_IS_REG(src2)) { 710 src2_r = src2; 715 else if (src2 & SLJIT_IMM) { 729 if (getput_arg_fast(compiler, flags | LOAD_DATA, sugg_src2_r, src2, src2w)) 738 if (!can_cache(src1, src1w, src2, src2 636 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 879 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1015 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1094 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
/external/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 296 void MacroAssembler::Mls(Register dst, Register src1, Register src2, argument 300 mls(dst, src1, src2, srcA, cond); 303 mul(ip, src1, src2, LeaveCC, cond); 309 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, argument 311 if (!src2.is_reg() && 312 !src2.must_output_reloc_info(this) && 313 src2.immediate() == 0) { 315 } else if (!(src2.instructions_required(this) == 1) && 316 !src2.must_output_reloc_info(this) && 318 base::bits::IsPowerOfTwo32(src2 3399 MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2) argument [all...] |
/external/v8/src/arm64/ |
H A D | macro-assembler-arm64-inl.h | 1351 void MacroAssembler::SmiTagAndPush(Register src1, Register src2) { argument 1355 Push(src1.W(), wzr, src2.W(), wzr);
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/external/v8/src/compiler/ia32/ |
H A D | code-generator-ia32.cc | 2584 Operand src2 = g.ToOperand(source); local 2585 __ pop(src2);
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/external/v8/src/compiler/mips/ |
H A D | code-generator-mips.cc | 276 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \ 277 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \ 1250 FPURegister src2 = i.InputSingleRegister(1); local 1251 auto ool = new (zone()) OutOfLineFloat32Max(this, dst, src1, src2); 1252 __ Float32Max(dst, src1, src2, ool->entry()); 1259 DoubleRegister src2 = i.InputDoubleRegister(1); local 1260 auto ool = new (zone()) OutOfLineFloat64Max(this, dst, src1, src2); 1261 __ Float64Max(dst, src1, src2, ool->entry()); 1268 FPURegister src2 = i.InputSingleRegister(1); local 1269 auto ool = new (zone()) OutOfLineFloat32Min(this, dst, src1, src2); 1277 DoubleRegister src2 = i.InputDoubleRegister(1); local [all...] |
/external/v8/src/compiler/mips64/ |
H A D | code-generator-mips64.cc | 276 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \ 277 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \ 1464 FPURegister src2 = i.InputSingleRegister(1); local 1465 auto ool = new (zone()) OutOfLineFloat32Max(this, dst, src1, src2); 1466 __ Float32Max(dst, src1, src2, ool->entry()); 1473 FPURegister src2 = i.InputDoubleRegister(1); local 1474 auto ool = new (zone()) OutOfLineFloat64Max(this, dst, src1, src2); 1475 __ Float64Max(dst, src1, src2, ool->entry()); 1482 FPURegister src2 = i.InputSingleRegister(1); local 1483 auto ool = new (zone()) OutOfLineFloat32Min(this, dst, src1, src2); 1491 FPURegister src2 = i.InputDoubleRegister(1); local [all...] |
/external/v8/src/compiler/x87/ |
H A D | code-generator-x87.cc | 2700 Operand src2 = g.ToOperand(source); local 2701 __ pop(src2);
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/external/v8/src/mips/ |
H A D | macro-assembler-mips.h | 351 Condition cond, Register src1, const Operand& src2); 358 Condition cond, Register src1, const Operand& src2); 701 void Push(Register src1, Register src2) { argument 704 sw(src2, MemOperand(sp, 0 * kPointerSize)); 708 void Push(Register src1, Register src2, Register src3) { argument 711 sw(src2, MemOperand(sp, 1 * kPointerSize)); 716 void Push(Register src1, Register src2, Register src3, Register src4) { argument 719 sw(src2, MemOperand(sp, 2 * kPointerSize)); 725 void Push(Register src1, Register src2, Register src3, Register src4, argument 729 sw(src2, MemOperan 757 Pop(Register src1, Register src2) argument 765 Pop(Register src1, Register src2, Register src3) argument [all...] |