/external/sfntly/cpp/src/sfntly/data/ |
H A D | growable_memory_byte_array.h | 40 int32_t src_offset, 42 return ByteArray::CopyTo(dst_offset, array, src_offset, length); 38 CopyTo(int32_t dst_offset, ByteArray* array, int32_t src_offset, int32_t length) argument
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H A D | memory_byte_array.h | 52 int32_t src_offset, 54 return ByteArray::CopyTo(dst_offset, array, src_offset, length); 50 CopyTo(int32_t dst_offset, ByteArray* array, int32_t src_offset, int32_t length) argument
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H A D | byte_array.cc | 106 int32_t src_offset, int32_t length) { 118 Get(index + src_offset, &(b[0]), 0, buffer_length)) > 0) { 105 CopyTo(int32_t dst_offset, ByteArray* array, int32_t src_offset, int32_t length) argument
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/external/mesa3d/src/intel/vulkan/ |
H A D | genX_gpu_memcpy.c | 57 struct anv_bo *src, uint32_t src_offset, 64 assert(src_offset + size <= src->size); 68 bs = gcd_pow2_u64(bs, src_offset); 97 .BufferStartingAddress = { src, src_offset }, 104 .EndAddress = { src, src_offset + size - 1 }, 55 cmd_buffer_gpu_memcpy(struct anv_cmd_buffer *cmd_buffer, struct anv_bo *dst, uint32_t dst_offset, struct anv_bo *src, uint32_t src_offset, uint32_t size) argument
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_blit.c | 93 unsigned src_offset, 110 src_buffer, src_pitch, src_offset, src_x, src_y, 157 OUT_RELOC_FENCED(src_buffer, I915_USAGE_2D_SOURCE, src_offset); 89 i915_copy_blit(struct i915_context *i915, unsigned cpp, unsigned short src_pitch, struct i915_winsys_buffer *src_buffer, unsigned src_offset, unsigned short dst_pitch, struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short src_x, short src_y, short dst_x, short dst_y, short w, short h) argument
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H A D | i915_surface.c | 214 unsigned dst_offset, src_offset; /* in bytes */ local 233 src_offset = i915_texture_offset(src_tex, src_level, src_box->z); 243 (unsigned short) src_tex->stride, src_tex->buffer, src_offset, local
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/external/mesa3d/src/gallium/drivers/r600/ |
H A D | evergreen_hw_context.c | 35 uint64_t src_offset, 50 src_offset += rsrc->gpu_address; 53 if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) { 73 radeon_emit(cs, src_offset & 0xffffffff); 75 radeon_emit(cs, (src_offset >> 32UL) & 0xff); 77 src_offset += csize << shift; 31 evergreen_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, uint64_t size) argument
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H A D | r600_hw_context.c | 442 struct pipe_resource *src, uint64_t src_offset, 457 src_offset += r600_resource(src)->gpu_address; 491 radeon_emit(cs, src_offset); /* SRC_ADDR_LO [31:0] */ 492 radeon_emit(cs, sync | ((src_offset >> 32) & 0xff)); /* CP_SYNC [31] | SRC_ADDR_HI [7:0] */ 503 src_offset += byte_count; 524 uint64_t src_offset, 551 radeon_emit(cs, src_offset & 0xfffffffc); 553 radeon_emit(cs, (src_offset >> 32UL) & 0xff); 555 src_offset += csize << 2; 440 r600_cp_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, uint64_t dst_offset, struct pipe_resource *src, uint64_t src_offset, unsigned size) argument 520 r600_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, uint64_t size) argument
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | intel_pixel_draw.c | 59 GLuint src_offset; local 107 src_offset = (GLintptr)pixels; 108 src_offset += _mesa_image_offset(2, unpack, width, height, 111 src_buffer = intel_bufferobj_buffer(brw, src, src_offset, 118 src_offset,
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H A D | intel_pixel_bitmap.c | 110 GLuint src_offset = (x + unpack->SkipPixels) & 0x7; local 118 DBG("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n", 119 __func__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); 141 if (test_bit(rowsrc, (col + src_offset) ^ mask)) {
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | radeon_tex_copy.c | 84 intptr_t src_offset = rrb->draw_offset; local 92 x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp); 128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_tex_copy.c | 84 intptr_t src_offset = rrb->draw_offset; local 92 x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp); 128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
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/external/mesa3d/src/gallium/auxiliary/draw/ |
H A D | draw_pt_emit.c | 86 unsigned src_offset = vinfo->attrib[i].src_index * 4 * sizeof(float); local 96 src_offset = 0; 101 src_offset = 0; 107 hw_key.element[i].input_offset = src_offset;
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H A D | draw_pipe_vbuf.c | 231 unsigned src_offset = (vinfo->attrib[i].src_index * 4 * sizeof(float) ); local 241 src_offset = 0; 246 src_offset = 0; 252 hw_key.element[i].input_offset = src_offset;
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/external/mesa3d/src/gallium/state_trackers/clover/api/ |
H A D | transfer.cpp | 142 auto src_offset = dot(src_pitch, src_orig); local 146 src_offset, src_offset + size(src_pitch, region))) 411 size_t src_offset, size_t dst_offset, size_t size, 421 vector_t src_origin = { src_offset }; 619 size_t src_offset, 632 vector_t src_origin = { src_offset };
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/external/strace/ |
H A D | file_ioctl.c | 46 uint64_t src_offset; member in struct:file_clone_range 69 uint64_t src_offset; /* in - start of extent in source */ member in struct:file_dedupe_range 143 tprintf(", src_offset=%" PRIu64 146 (uint64_t) args.src_offset, 171 tprintf("src_offset=%" PRIu64 174 (uint64_t) args.src_offset,
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/external/valgrind/none/tests/s390x/ |
H A D | mvcl.c | 175 uint32_t dst_offset, dst_len, src_offset, src_len; local 266 for (src_offset = 0; src_offset < sizeof buf; ++src_offset) 267 for (src_len = 0; src_len <= sizeof buf - src_offset; ++src_len) 268 run_test(buf + dst_offset, dst_len, buf + src_offset, src_len, 'x');
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/external/kernel-headers/original/uapi/drm/ |
H A D | qxl_drm.h | 68 * src_offset) 74 __u64 src_offset; /* offset into src_handle or src buffer */ member in struct:drm_qxl_reloc
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/external/libdrm/include/drm/ |
H A D | qxl_drm.h | 65 * src_offset) 71 uint64_t src_offset; /* offset into src_handle or src buffer */ member in struct:drm_qxl_reloc
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/external/mesa3d/src/amd/vulkan/ |
H A D | radv_meta_resolve_cs.c | 73 nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); local 74 src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); 75 src_offset->num_components = 2; 76 nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset"); 77 nir_builder_instr_insert(&b, &src_offset->instr); 85 nir_ssa_def *img_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa);
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/external/mesa3d/src/gallium/drivers/ilo/ |
H A D | ilo_blitter_blt.c | 183 struct ilo_buffer_resource *src_buf, unsigned src_offset, 195 src.offset = src_buf->vma.bo_offset + src_offset; 417 const unsigned src_offset = src_box->x; local 428 ilo_buffer_resource(src), src_offset, size); 181 buf_copy_region(struct ilo_blitter *blitter, struct ilo_buffer_resource *dst_buf, unsigned dst_offset, struct ilo_buffer_resource *src_buf, unsigned src_offset, unsigned size) argument
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
H A D | si_cp_dma.c | 305 uint64_t dst_offset, uint64_t src_offset, unsigned size, 318 if (dst != src || dst_offset != src_offset) { 327 src_offset += r600_resource(src)->gpu_address; 343 if (src_offset % CP_DMA_ALIGNMENT) { 344 skipped_size = CP_DMA_ALIGNMENT - (src_offset % CP_DMA_ALIGNMENT); 358 main_src_offset = src_offset + skipped_size; 384 si_emit_cp_dma(sctx, dst_offset, src_offset, skipped_size, 397 if (dst_offset != src_offset) 303 si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, unsigned size, unsigned user_flags) argument
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | intel_pixel_bitmap.c | 113 GLuint src_offset = (x + unpack->SkipPixels) & 0x7; local 121 DBG("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n", 122 __func__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); 144 if (test_bit(rowsrc, (col + src_offset) ^ mask)) {
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H A D | intel_tex_image.c | 115 GLuint src_offset; local 150 src_buffer = intel_bufferobj_source(intel, pbo, 64, &src_offset); 152 src_offset += (GLuint) (unsigned long) pixels; 161 src_offset,
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/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
H A D | nv04_surface.c | 288 unsigned src_offset = src->offset + sy * src->pitch + sx * src->cpp; local 310 src_offset += src->pitch * count;
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