| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| H A D | fd5_draw.h | 42 enum pc_di_vis_cull_mode vismode,
57 if (vismode == USE_VISIBILITY) {
64 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
82 enum pc_di_vis_cull_mode vismode,
108 fd5_draw(batch, ring, primtype, vismode, src_sel,
40 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances, enum a4xx_index_size idx_type, uint32_t idx_size, uint32_t idx_offset, struct pipe_resource *idx_buffer) argument
80 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, const struct pipe_draw_info *info) argument
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| H A D | fd5_gmem.c | 211 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) argument
216 *patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
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| /external/mesa3d/src/gallium/drivers/freedreno/ |
| H A D | freedreno_draw.h | 47 enum pc_di_vis_cull_mode vismode,
79 if (vismode == USE_VISIBILITY) {
86 OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
117 enum pc_di_vis_cull_mode vismode,
143 fd_draw(batch, ring, primtype, vismode, src_sel,
45 fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, enum pc_di_src_sel src_sel, uint32_t count, uint8_t instances, enum pc_di_index_size idx_type, uint32_t idx_size, uint32_t idx_offset, struct pipe_resource *idx_buffer) argument
115 fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, const struct pipe_draw_info *info) argument
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| H A D | fd4_draw.h | 53 enum pc_di_vis_cull_mode vismode,
68 if (vismode == USE_VISIBILITY) {
75 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
106 enum pc_di_vis_cull_mode vismode,
132 fd4_draw(batch, ring, primtype, vismode, src_sel,
51 fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances, enum a4xx_index_size idx_type, uint32_t idx_size, uint32_t idx_offset, struct pipe_resource *idx_buffer) argument
104 fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, const struct pipe_draw_info *info) argument
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| H A D | fd4_gmem.c | 511 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) argument
516 *patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| H A D | fd3_gmem.c | 698 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) argument
703 *patch->cs = patch->val | DRAW(0, 0, 0, vismode, 0);
|