/external/clang/test/SemaCXX/ |
H A D | function-extern-c.cpp | 34 extern "C" void f6( S s );
|
/external/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_ppc_regs.h | 39 #define f6 6 macro
|
/external/llvm/test/MC/ARM/ |
H A D | aligned-blx.s | 34 @ CHECK: ff f7 f6 ef blx _aligned
|
/external/autotest/server/cros/ |
H A D | rf_switch_1_ap_box_3_ap_list.conf | 382 [34:97:f6:51:aa:20] 388 bss = 34:97:f6:51:aa:20 389 wan mac = 34:97:f6:51:aa:20 395 [34:97:f6:51:aa:24] 401 bss5 = 34:97:f6:51:aa:24 402 wan mac = 34:97:f6:51:aa:20 408 [34:97:f6:51:aa:28] 414 bss5 = 34:97:f6:51:aa:28 415 wan mac = 34:97:f6:51:aa:20
|
/external/llvm/test/MC/Mips/mips1/ |
H A D | invalid-mips5-wrong-error.s | 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 23 c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips2/ |
H A D | invalid-mips5-wrong-error.s | 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 23 c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips3/ |
H A D | invalid-mips5-wrong-error.s | 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 23 c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
H A D | invalid-mips4.s | 14 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
/external/llvm/test/MC/Mips/mips4/ |
H A D | invalid-mips5-wrong-error.s | 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 23 c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips64r6/ |
H A D | invalid-mips5-wrong-error.s | 22 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 26 c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/v8/src/s390/ |
H A D | disasm-s390.cc | 218 } else if (format[1] == '6') { // 'f6: register resides in bit 29-32 740 Format(instr, "ledbr\t'f5,'f6"); 743 Format(instr, "ldebr\t'f5,'f6"); 749 Format(instr, "ltdbr\t'f5,'f6"); 752 Format(instr, "ltebr\t'f5,'f6"); 764 Format(instr, "lgdr\t'r5,'f6"); 947 Format(instr, "cfdbr\t'r5,'m2,'f6"); 953 Format(instr, "cfebr\t'r5,'m2,'f6"); 962 Format(instr, "cgebr\t'r5,'m2,'f6"); 965 Format(instr, "cgdbr\t'r5,'m2,'f6"); [all...] |
/external/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/ |
H A D | p1.cpp | 70 template<typename T> T f6(T); // expected-note {{here}} 71 template<typename T> constexpr T f6(T); // expected-error {{constexpr declaration of 'f6' follows non-constexpr declaration}}
|
/external/clang/test/CodeGen/ |
H A D | regparm-struct.c | 47 __attribute__((regparm(3))) void f6(struct s3 a, int b); 48 // CHECK: declare void @f6(i32 inreg, i32 inreg, i32 inreg, i32) 51 f6(x, 44);
|
H A D | init.c | 56 void f6() { function
|
H A D | ppc64le-aggregates.c | 10 struct f6 { float f[6]; }; struct 36 struct f6 func_f6(struct f6 x) { return x; } 87 // CHECK: %[[TMP:[^ ]+]] = load [6 x float], [6 x float]* getelementptr inbounds (%struct.f6, %struct.f6* @global_f6, i32 0, i32 0), align 4 89 struct f6 global_f6;
|
/external/clang/test/CodeGenCXX/ |
H A D | vtable-available-externally.cpp | 159 virtual void f6 (); 162 void f6 ();
|
H A D | aarch64-mangle-neon-vectors.cpp | 50 void f6(float16x4_t) {} function
|
H A D | mangle-abi-tag.cpp | 101 E<char>* f6() { function
|
H A D | mangle-ms-return-qualifiers.cpp | 155 struct S& f6() { return *(struct S*)0; } function 156 // CHECK: "\01?f6@@YAAAUS@@XZ"
|
H A D | temp-order.cpp | 121 static unsigned f6() { function 191 print("f6", f6()); 192 if (f6() != ORDER6(3, 7, 11, 5, 13, 2))
|
/external/clang/test/Analysis/ |
H A D | array-struct.c | 57 void f6() { function
|
H A D | outofbound.c | 47 void f6() { function
|
H A D | range_casts.c | 56 void f6(long foo) function
|
/external/clang/test/Sema/ |
H A D | builtin-object-size.c | 48 void f6(void) function
|
H A D | varargs.c | 41 void f6(int a, ...) { function
|