Searched refs:ANDI (Results 1 - 17 of 17) sorted by relevance
/external/valgrind/none/tests/mips64/ |
H A D | logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, enumerator in enum:__anon25306 27 case ANDI:
|
/external/pcre/dist2/src/sljit/ |
H A D | sljitNativeMIPS_32.c | 94 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); 112 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); 316 EMIT_LOGICAL(ANDI, AND);
|
H A D | sljitNativeMIPS_64.c | 181 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); 195 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); 411 EMIT_LOGICAL(ANDI, AND);
|
H A D | sljitNativePPC_32.c | 174 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm);
|
H A D | sljitNativeMIPS_common.c | 103 #define ANDI (HI(12)) macro 1386 FAIL_IF(push_inst(compiler, ANDI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG)); 1394 FAIL_IF(push_inst(compiler, ANDI | SA(ULESS_FLAG) | TA(ULESS_FLAG) | IMM(1), ULESS_FLAG)); 1397 FAIL_IF(push_inst(compiler, ANDI | SA(UGREATER_FLAG) | TA(UGREATER_FLAG) | IMM(1), UGREATER_FLAG)); 2085 FAIL_IF(push_inst(compiler, ANDI | SA(sugg_dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
|
H A D | sljitNativeARM_T2_32.c | 99 #define ANDI 0xf0000000 macro 617 return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm); 2009 ins = (op == SLJIT_AND ? ANDI : (op == SLJIT_OR ? ORRI : EORI));
|
H A D | sljitNativePPC_64.c | 301 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm);
|
H A D | sljitNativeARM_64.c | 69 #define ANDI 0x92000000 macro 598 return push_inst(compiler, (ANDI ^ inv_bits) | RD(dst) | RN(reg) | inst_bits);
|
H A D | sljitNativePPC_common.c | 144 #define ANDI (HI(28)) macro
|
/external/v8/src/mips/ |
H A D | constants-mips.h | 356 ANDI = ((1U << 3) + 4) << kOpcodeShift, 909 OpcodeToBitNumber(ANDI) | OpcodeToBitNumber(ORI) |
|
H A D | assembler-mips.cc | 700 return GetOpcodeField(instr) == ANDI; 1681 GenInstrImmediate(ANDI, rs, rt, j);
|
H A D | simulator-mips.cc | 4428 case ANDI:
|
/external/v8/src/mips64/ |
H A D | constants-mips64.h | 327 ANDI = ((1U << 3) + 4) << kOpcodeShift, 941 OpcodeToBitNumber(SLTIU) | OpcodeToBitNumber(ANDI) |
|
H A D | assembler-mips64.cc | 672 return GetOpcodeField(instr) == ANDI; 1765 GenInstrImmediate(ANDI, rs, rt, j);
|
H A D | simulator-mips64.cc | 4635 case ANDI:
|
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
H A D | MBlazeDisassembler.cpp | 53 MBlaze::ORI, MBlaze::ANDI, MBlaze::XORI, MBlaze::ANDNI, //28,29,2A,2B
|
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 293 BuildMI(MBB, dl, TII->get(MBlaze::ANDI), IAMT)
|
Completed in 968 milliseconds