Searched refs:MOV32ri (Results 1 - 16 of 16) sorted by relevance
/external/llvm/lib/Target/X86/ |
H A D | X86WinAllocaExpander.cpp | 92 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) ||
|
H A D | X86FrameLowering.cpp | 271 unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri; 1175 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) 1190 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) 1570 // MOV32ri $TargetMBB, %eax 1571 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg) 2234 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2) 2261 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
|
H A D | X86FastISel.cpp | 3513 case MVT::i32: Opc = X86::MOV32ri; break; 3516 Opc = X86::MOV32ri; 3524 if (VT == MVT::i64 && Opc == X86::MOV32ri) {
|
H A D | X86InstrInfo.cpp | 328 { X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE }, 2509 // The instruction clobbers EFLAGS. Re-materialize as MOV32ri to avoid side 2521 BuildMI(MBB, I, DL, get(X86::MOV32ri)) 5455 MIB->setDesc(get(MIB->getOpcode() == X86::MOV32ImmSExti8 ? X86::MOV32ri 5565 MI.setDesc(get(X86::MOV32ri));
|
H A D | X86ISelLowering.cpp | 12807 // into MOV32ri. 18869 // This is storing the opcode for MOV32ri. 18870 const unsigned char MOV32ri = 0xB8; // X86::MOV32ri's opcode byte. local 18873 DAG.getConstant(MOV32ri|N86Reg, dl, MVT::i8), 22583 BuildMI(mainMBB, DL, TII->get(X86::MOV32ri), X86::EAX).addImm(-1); 23868 BuildMI(restoreMBB, DL, TII->get(X86::MOV32ri), restoreDstReg).addImm(1); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 360 case X86::MOV64ri64i32: LowerSubReg32_Op0(OutMI, X86::MOV32ri); break;
|
H A D | X86FrameLowering.cpp | 848 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
|
H A D | X86InstrInfo.cpp | 309 { X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE }, 1288 case X86::MOV32r0: Opc = X86::MOV32ri; break;
|
H A D | X86GenDisassemblerTables.inc | 17407 "MOV32ri"
[all...] |
H A D | X86GenFastISel.inc | 4873 return FastEmitInst_i(X86::MOV32ri, X86::GR32RegisterClass, imm0);
|
H A D | X86ISelLowering.cpp | 7171 // into MOV32ri. 9614 // This is storing the opcode for MOV32ri. 9615 const unsigned char MOV32ri = 0xB8; // X86::MOV32ri's opcode byte. local 9618 DAG.getConstant(MOV32ri|N86Reg, MVT::i8), 12283 X86::MOV32ri, X86::MOV32ri,
|
H A D | X86GenInstrInfo.inc | 1465 MOV32ri = 1449,
5633 { 1449, 2, 1, 0, 0, "MOV32ri", 0|(1<<MCID::Rematerializable)|(1<<MCID::CheapAsAMove), 0x170014002ULL, NULL, NULL, OperandInfo70 }, // Inst #1449 = MOV32ri
|
H A D | X86GenAsmWriter.inc | 1462 1145050693U, // MOV32ri
6015 "2mr\000MOV32ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri"
|
H A D | X86GenAsmWriter1.inc | 1462 139333928U, // MOV32ri
6758 "2mr\000MOV32ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri"
|
H A D | X86GenDAGISel.inc | [all...] |
H A D | X86GenAsmMatcher.inc | 3900 { X86::MOV32ri, "movl", Convert__Reg1_1__Imm1_0, { MCK_Imm, MCK_GR32 }, 0},
|
Completed in 2579 milliseconds