/external/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-rn-rm-a32.cc | 222 {{NFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 223 {ZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 224 {CFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 225 {VFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 226 {NZFlag, NoFlag, NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32.cc | 221 {{NFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 222 {ZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 223 {CFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 224 {VFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 225 {NZFlag, NoFlag, NoFlag, [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000, 0}, 187 {NoFlag, 0x00000001, 0x00000001, 0}, 188 {NoFlag, 0x00000002, 0x00000002, 0}, 189 {NoFlag, 0x00000020, 0x00000020, 0}, 190 {NoFlag, 0x0000007d, 0x0000007d, 0}, 191 {NoFlag, 0x0000007e, 0x0000007e, 0}, 192 {NoFlag, 0x0000007f, 0x0000007f, 0}, 193 {NoFlag, 0x00007ffd, 0x00007ffd, 0}, 194 {NoFlag, 0x00007ffe, 0x00007ffe, 0}, 195 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-t32.cc | 180 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000, 0}, 181 {NoFlag, 0x00000001, 0x00000001, 0}, 182 {NoFlag, 0x00000002, 0x00000002, 0}, 183 {NoFlag, 0x00000020, 0x00000020, 0}, 184 {NoFlag, 0x0000007d, 0x0000007d, 0}, 185 {NoFlag, 0x0000007e, 0x0000007e, 0}, 186 {NoFlag, 0x0000007f, 0x0000007f, 0}, 187 {NoFlag, 0x00007ffd, 0x00007ffd, 0}, 188 {NoFlag, 0x00007ffe, 0x00007ffe, 0}, 189 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 202 {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002, 0}, 203 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff, 0}, 204 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0, 0}, 205 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002, 0}, 206 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd, 0}, 207 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff, 0}, 208 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83, 0}, 209 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001, 0}, 210 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003, 0}, 211 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-const-a32.cc | 196 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 197 {NoFlag, 0x00000001, 0x00000001}, 198 {NoFlag, 0x00000002, 0x00000002}, 199 {NoFlag, 0x00000020, 0x00000020}, 200 {NoFlag, 0x0000007d, 0x0000007d}, 201 {NoFlag, 0x0000007e, 0x0000007e}, 202 {NoFlag, 0x0000007f, 0x0000007f}, 203 {NoFlag, 0x00007ffd, 0x00007ffd}, 204 {NoFlag, 0x00007ffe, 0x00007ffe}, 205 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-const-t32.cc | 180 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 181 {NoFlag, 0x00000001, 0x00000001}, 182 {NoFlag, 0x00000002, 0x00000002}, 183 {NoFlag, 0x00000020, 0x00000020}, 184 {NoFlag, 0x0000007d, 0x0000007d}, 185 {NoFlag, 0x0000007e, 0x0000007e}, 186 {NoFlag, 0x0000007f, 0x0000007f}, 187 {NoFlag, 0x00007ffd, 0x00007ffd}, 188 {NoFlag, 0x00007ffe, 0x00007ffe}, 189 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-ge.cc | 176 {{NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00007ffe, 0x00007fff}, 177 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00000001, 0xffffff83}, 178 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffffff80, 0x00007ffd}, 179 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8002, 0xffffffe0}, 180 {NoFlag, NoFla [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-ge.cc | 176 {{NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00007ffe, 0x00007fff}, 177 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00000001, 0xffffff83}, 178 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffffff80, 0x00007ffd}, 179 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8002, 0xffffffe0}, 180 {NoFlag, NoFla [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-q.cc | 168 {{NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff80, 0x0000007f}, 169 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000001, 0xffff8001}, 170 {NoFlag, QFlag, NoFlag, 0xabababab, 0x0000007f, 0x00007fff}, 171 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8001, 0x80000000}, 172 {NoFlag, QFlag, NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-q.cc | 168 {{NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff80, 0x0000007f}, 169 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000001, 0xffff8001}, 170 {NoFlag, QFlag, NoFlag, 0xabababab, 0x0000007f, 0x00007fff}, 171 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8001, 0x80000000}, 172 {NoFlag, QFlag, NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-a32.cc | 182 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 183 {NoFlag, 0x00000001, 0x00000001}, 184 {NoFlag, 0x00000002, 0x00000002}, 185 {NoFlag, 0x00000020, 0x00000020}, 186 {NoFlag, 0x0000007d, 0x0000007d}, 187 {NoFlag, 0x0000007e, 0x0000007e}, 188 {NoFlag, 0x0000007f, 0x0000007f}, 189 {NoFlag, 0x00007ffd, 0x00007ffd}, 190 {NoFlag, 0x00007ffe, 0x00007ffe}, 191 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-t32.cc | 182 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 183 {NoFlag, 0x00000001, 0x00000001}, 184 {NoFlag, 0x00000002, 0x00000002}, 185 {NoFlag, 0x00000020, 0x00000020}, 186 {NoFlag, 0x0000007d, 0x0000007d}, 187 {NoFlag, 0x0000007e, 0x0000007e}, 188 {NoFlag, 0x0000007f, 0x0000007f}, 189 {NoFlag, 0x00007ffd, 0x00007ffd}, 190 {NoFlag, 0x00007ffe, 0x00007ffe}, 191 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 212 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 213 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 214 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 215 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 216 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 217 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 218 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 219 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 220 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 221 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-sel.cc | 164 {{NoFlag, NoFlag, GE123Flag, 0xabababab, 0xfffffffe, 0x0000007e}, 165 {NoFlag, NoFlag, GE23Flag, 0xabababab, 0x7fffffff, 0xffffff82}, 166 {NoFlag, NoFlag, GE123Flag, 0xabababab, 0x7ffffffe, 0xffffff81}, 167 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x7fffffff, 0x0000007d}, 168 {NoFlag, NoFlag, NoFla [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-sel.cc | 164 {{NoFlag, NoFlag, GE123Flag, 0xabababab, 0xfffffffe, 0x0000007e}, 165 {NoFlag, NoFlag, GE23Flag, 0xabababab, 0x7fffffff, 0xffffff82}, 166 {NoFlag, NoFlag, GE123Flag, 0xabababab, 0x7ffffffe, 0xffffff81}, 167 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x7fffffff, 0x0000007d}, 168 {NoFlag, NoFlag, NoFla [all...] |
H A D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 181 {{NoFlag, 0x7ffffffe, 0xffffff81, 0x7ffffffe}, 182 {NoFlag, 0xfffffffd, 0x00000000, 0xfffffffd}, 183 {NoFlag, 0xfffffffe, 0x33333333, 0xfffffffe}, 184 {NoFlag, 0x0000007e, 0x7fffffff, 0x0000007e}, 185 {NoFlag, 0xffffffff, 0x7fffffff, 0xffffffff}, 186 {NoFlag, 0x00000020, 0x7ffffffe, 0x00000020}, 187 {NoFlag, 0x00000020, 0xffffff83, 0x00000020}, 188 {NoFlag, 0x0000007e, 0xffffff80, 0x0000007e}, 189 {NoFlag, 0x0000007f, 0xffff8003, 0x0000007f}, 190 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 183 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 184 {NoFlag, 0x00000001, 0x00000001}, 185 {NoFlag, 0x00000002, 0x00000002}, 186 {NoFlag, 0x00000020, 0x00000020}, 187 {NoFlag, 0x0000007d, 0x0000007d}, 188 {NoFlag, 0x0000007e, 0x0000007e}, 189 {NoFlag, 0x0000007f, 0x0000007f}, 190 {NoFlag, 0x00007ffd, 0x00007ffd}, 191 {NoFlag, 0x00007ffe, 0x00007ffe}, 192 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 183 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 184 {NoFlag, 0x00000001, 0x00000001}, 185 {NoFlag, 0x00000002, 0x00000002}, 186 {NoFlag, 0x00000020, 0x00000020}, 187 {NoFlag, 0x0000007d, 0x0000007d}, 188 {NoFlag, 0x0000007e, 0x0000007e}, 189 {NoFlag, 0x0000007f, 0x0000007f}, 190 {NoFlag, 0x00007ffd, 0x00007ffd}, 191 {NoFlag, 0x00007ffe, 0x00007ffe}, 192 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 187 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 188 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 189 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 190 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 191 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 192 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 193 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 194 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 195 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 187 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 188 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 189 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 190 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 191 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 192 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 193 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 194 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 195 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 201 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 202 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 203 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 204 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 205 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 206 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 207 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 208 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 209 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 201 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 202 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 203 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 204 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 205 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 206 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 207 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 208 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 209 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 201 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 202 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 203 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 204 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 205 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 206 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 207 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 208 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 209 {NoFlag, [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 201 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 202 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 203 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 204 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 205 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 206 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 207 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 208 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 209 {NoFlag, [all...] |