Searched refs:ShiftBits (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp518 // rlwinm rA, rA, ShiftBits, 0, 31.
563 unsigned ShiftBits = getEncodingValue(DestReg)*4; local
564 // rlwinm r11, r11, 32-ShiftBits, 0, 31.
566 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0)
607 // rlwinm rA, rA, ShiftBits, 0, 0.
650 unsigned ShiftBits = getEncodingValue(DestReg); local
651 // rlwimi r11, r10, 32-ShiftBits, ..., ...
655 .addImm(ShiftBits ? 32 - ShiftBits : 0)
656 .addImm(ShiftBits)
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp405 unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4; local
406 // rlwinm scratch, scratch, ShiftBits, 0, 31.
408 .addReg(ScratchReg).addImm(ShiftBits)
540 unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; local
541 // rlwinm r11, r11, 32-ShiftBits, 0, 31.
543 .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0)
/external/swiftshader/third_party/LLVM/lib/Analysis/
H A DBasicAliasAnalysis.cpp372 if (unsigned ShiftBits = 64-TD->getPointerSizeInBits()) {
373 Scale <<= ShiftBits; local
374 Scale = (int64_t)Scale >> ShiftBits;
/external/llvm/lib/Analysis/
H A DBasicAliasAnalysis.cpp329 unsigned ShiftBits = 64 - PointerSize; local
330 return (int64_t)((uint64_t)Offset << ShiftBits) >> ShiftBits;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1863 unsigned ShiftBits = AndRHSC.countTrailingZeros(); local
1870 DAG.getConstant(ShiftBits, dl,
1872 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, CmpTy);
1883 unsigned ShiftBits; local
1887 ShiftBits = C1.countTrailingOnes();
1891 ShiftBits = C1.countTrailingZeros();
1893 NewC = NewC.lshr(ShiftBits);
1894 if (ShiftBits && NewC.getMinSignedBits() <= 64 &&
1902 DAG.getConstant(ShiftBits, dl, ShiftTy));
H A DDAGCombiner.cpp2969 unsigned ShiftBits = CShift->getZExtValue(); local
2976 (ShiftBits + MaskBits <= Size / 2) &&
2988 assert(ShiftBits != 0 && MaskBits <= Size);
2996 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4604 SDValue ShiftBits = DAG.getConstant(IdxVal, dl, MVT::i8); local
4605 WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, ShiftBits);
4623 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); local
4625 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits);
4626 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits);
4640 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); local
4642 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits);
4643 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits);
[all...]

Completed in 1106 milliseconds