Searched refs:TGSI_OPCODE_EX2 (Results 1 - 23 of 23) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_util.c | 253 case TGSI_OPCODE_EX2:
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| H A D | tgsi_info.c | 68 { 1, 1, 0, 0, 0, 0, 0, REPL, "EX2", TGSI_OPCODE_EX2 },
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| H A D | tgsi_lowering.c | 527 new_inst.Instruction.Opcode = TGSI_OPCODE_EX2;
608 new_inst.Instruction.Opcode = TGSI_OPCODE_EX2;
716 new_inst.Instruction.Opcode = TGSI_OPCODE_EX2;
740 new_inst.Instruction.Opcode = TGSI_OPCODE_EX2;
851 new_inst.Instruction.Opcode = TGSI_OPCODE_EX2;
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| H A D | tgsi_exec.c | 5249 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/r300/ |
| H A D | r300_tgsi_to_rc.c | 59 case TGSI_OPCODE_EX2: return RC_OPCODE_EX2;
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| /external/mesa3d/src/gallium/include/pipe/ |
| H A D | p_shader_tokens.h | 359 #define TGSI_OPCODE_EX2 28 macro
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| /external/mesa3d/src/mesa/state_tracker/ |
| H A D | st_atifs_to_tgsi.c | 745 inst.Instruction.Opcode = TGSI_OPCODE_EX2;
782 inst.Instruction.Opcode = TGSI_OPCODE_EX2;
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| H A D | st_mesa_to_tgsi.c | 445 return TGSI_OPCODE_EX2;
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| H A D | st_glsl_to_tgsi.cpp | 1625 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi_action.c | 368 TGSI_OPCODE_EX2, floor_x);
376 TGSI_OPCODE_EX2, emit_data->args[0] /* src0.x */);
515 ex2_flr_log_abs_x = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_EX2,
1322 bld_base->op_actions[TGSI_OPCODE_EX2].fetch_args = scalar_unary_fetch_args;
1512 /* TGSI_OPCODE_EX2 (CPU Only) */
2560 bld_base->op_actions[TGSI_OPCODE_EX2].emit = ex2_emit_cpu;
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| H A D | lp_bld_tgsi_aos.c | 630 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/ilo/shader/ |
| H A D | toy_tgsi.c | 57 [TGSI_OPCODE_EX2] = { TOY_OPCODE_EXP, 1, 1 },
168 case TGSI_OPCODE_EX2:
782 [TGSI_OPCODE_EX2] = aos_simple,
988 case TGSI_OPCODE_EX2:
1323 [TGSI_OPCODE_EX2] = soa_scalar_replicate,
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_shader_tgsi_alu.c | 800 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
801 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name =
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| H A D | fd2_compiler.c | 1076 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_fpc_optimize.c | 91 [ TGSI_OPCODE_EX2 ] = { false, false, 0, 1, 1 },
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| H A D | i915_fpc_translate.c | 639 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| H A D | tgsi_to_nir.c | 1545 [TGSI_OPCODE_EX2] = nir_op_fexp2,
1726 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| H A D | nvfx_vertprog.c | 596 case TGSI_OPCODE_EX2:
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| H A D | nvfx_fragprog.c | 601 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_from_tgsi.cpp | 285 case TGSI_OPCODE_EX2:
3091 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_insn.c | 2971 case TGSI_OPCODE_EX2:
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| H A D | svga_tgsi_vgpu10.c | 3747 * Emit code for TGSI_OPCODE_EX2 (2^x) instruction.
3753 /* Note that TGSI_OPCODE_EX2 computes only one value from src.x
5735 case TGSI_OPCODE_EX2:
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| /external/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_shader.c | 9089 [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate},
9287 [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate},
9510 [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, cayman_emit_float_instr},
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