Searched refs:TGSI_OPCODE_RET (Results 1 - 17 of 17) sorted by relevance

/external/mesa3d/src/gallium/include/pipe/
H A Dp_shader_tokens.h395 #define TGSI_OPCODE_RET 64 macro
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_info.c454 case TGSI_OPCODE_RET:
H A Dlp_bld_tgsi_aos.c763 case TGSI_OPCODE_RET:
H A Dlp_bld_tgsi_soa.c4005 bld.bld_base.op_actions[TGSI_OPCODE_RET].emit = ret_emit;
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_info.c104 { 0, 0, 0, 0, 0, 0, 0, NONE, "RET", TGSI_OPCODE_RET },
H A Dtgsi_exec.c5441 case TGSI_OPCODE_RET:
/external/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c107 [ TGSI_OPCODE_RET ] = { false, false, 0, 0, 0 },
H A Di915_fpc_translate.c793 case TGSI_OPCODE_RET:
/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dtoy_tgsi.c809 [TGSI_OPCODE_RET] = aos_unsupported,
1350 [TGSI_OPCODE_RET] = soa_unsupported,
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
H A Dnvfx_vertprog.c719 case TGSI_OPCODE_RET:
H A Dnvfx_fragprog.c830 case TGSI_OPCODE_RET:
/external/mesa3d/src/gallium/auxiliary/nir/
H A Dtgsi_to_nir.c1574 [TGSI_OPCODE_RET] = 0, /* XXX */
/external/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_vgpu10.c535 case TGSI_OPCODE_RET:
5688 case TGSI_OPCODE_RET:
H A Dsvga_tgsi_insn.c2993 case TGSI_OPCODE_RET:
/external/mesa3d/src/mesa/state_tracker/
H A Dst_glsl_to_tgsi.cpp4276 emit_asm(ir, TGSI_OPCODE_RET);
4517 inst->op == TGSI_OPCODE_RET) {
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_tgsi.cpp3544 case TGSI_OPCODE_RET:
/external/mesa3d/src/gallium/drivers/r600/
H A Dr600_shader.c9125 [TGSI_OPCODE_RET] = { ALU_OP0_NOP, tgsi_unsupported},
9323 [TGSI_OPCODE_RET] = { ALU_OP0_NOP, tgsi_unsupported},
9546 [TGSI_OPCODE_RET] = { ALU_OP0_NOP, tgsi_unsupported},

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