Searched refs:TGSI_WRITEMASK_ZW (Results 1 - 18 of 18) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/vl/ |
| H A D | vl_deint_filter.c | 107 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW),
110 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW),
162 ureg_MOV(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_ZW),
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| H A D | vl_matrix_filter.c | 115 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
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| H A D | vl_median_filter.c | 125 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
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| H A D | vl_idct.c | 179 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
305 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
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| H A D | vl_mc.c | 76 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
149 ureg_MUL(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_ZW), mv_scale, vmv[i]);
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| H A D | vl_bicubic_filter.c | 213 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
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| H A D | vl_zscan.c | 144 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
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| /external/mesa3d/src/mesa/state_tracker/ |
| H A D | st_cb_drawpixels_shader.c | 181 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_ZW;
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| H A D | st_pbo.c | 504 ureg_MOV(ureg, ureg_writemask(temp1, TGSI_WRITEMASK_ZW), ureg_imm1u(ureg, 0));
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| H A D | st_glsl_to_tgsi.cpp | 6069 tgsi_usage_mask = TGSI_WRITEMASK_ZW;
6134 tgsi_usage_mask = TGSI_WRITEMASK_ZW;
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| /external/mesa3d/src/gallium/include/pipe/ |
| H A D | p_shader_tokens.h | 94 #define TGSI_WRITEMASK_ZW 0x0C macro
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_exec.c | 3739 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) {
3773 if (wmask & TGSI_WRITEMASK_ZW) {
3803 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) {
3829 if (wmask & TGSI_WRITEMASK_ZW) {
3851 if (((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW)) {
3877 if (wmask & TGSI_WRITEMASK_ZW) {
4581 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW)
[all...] |
| H A D | tgsi_lowering.c | 373 if (dst->Register.WriteMask & TGSI_WRITEMASK_ZW) {
378 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_ZW);
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| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_surface.c | 991 mask &= ~TGSI_WRITEMASK_ZW;
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| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_insn.c | 3319 writemask(depth, TGSI_WRITEMASK_ZW),
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| H A D | svga_tgsi_vgpu10.c | 4371 writemask_dst(&inst->Dst[0], TGSI_WRITEMASK_ZW);
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| /external/mesa3d/src/gallium/state_trackers/nine/ |
| H A D | nine_ff.c | 690 ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_ZW), ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
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| /external/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_shader.c | 4236 inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW);
4354 inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW);
4407 inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW);
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