Searched refs:cpsr (Results 1 - 25 of 31) sorted by relevance

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/external/compiler-rt/test/builtins/Unit/arm/
H A Daeabi_cdcmple_test.c50 union cpsr cpsr = { .value = cpsr_value }; local
51 if (expected_z != cpsr.flags.z || expected_c != cpsr.flags.c) {
53 a, b, cpsr.flags.z, cpsr.flags.c, expected_z, expected_c);
57 cpsr.value = r_cpsr_value;
58 if (expected_z != cpsr.flags.z || expected_c != cpsr.flags.c) {
60 a, b, cpsr
[all...]
H A Daeabi_cfcmple_test.c50 union cpsr cpsr = { .value = cpsr_value }; local
51 if (expected_z != cpsr.flags.z || expected_c != cpsr.flags.c) {
53 a, b, cpsr.flags.z, cpsr.flags.c, expected_z, expected_c);
57 cpsr.value = r_cpsr_value;
58 if (expected_z != cpsr.flags.z || expected_c != cpsr.flags.c) {
60 a, b, cpsr
[all...]
H A Daeabi_cdcmpeq_test.c27 union cpsr cpsr = { .value = cpsr_value }; local
28 if (expected != cpsr.flags.z) {
30 a, b, cpsr.flags.z, expected);
H A Daeabi_cfcmpeq_test.c27 union cpsr cpsr = { .value = cpsr_value }; local
28 if (expected != cpsr.flags.z) {
30 a, b, cpsr.flags.z, expected);
H A Dcall_apsr.h22 union cpsr { union
/external/valgrind/none/tests/arm/
H A Dv6intARM.stdout.exp2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
4 mov r0, #0 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000
5 mov r0, #1 :: rd 0x00000001 rm 0x00000000, carryin 0, cpsr 0x00000000
6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z
8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N
9 movs r0, #0 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z
10 movs r0, #1 :: rd 0x00000001 rm 0x00000000, carryin 0, cpsr 0x00000000
11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr
[all...]
H A Dv6media.stdout.exp2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr
[all...]
H A Dv6intThumb.stdout.exp2 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC
3 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C
4 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N
5 cmp r3, r6 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
6 cmp r3, r6 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, c:v-in 0, cpsr 0x00000000
7 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N V
8 cmp r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
9 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC
10 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C
11 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr
[all...]
H A Dv6intARM.c12 unsigned int cpsr; \
25 "mrs %1,cpsr;" \
26 : "=&r" (out), "=&r" (cpsr) \
30 printf("%s :: rd 0x%08x rm 0x%08x, carryin %d, cpsr 0x%08x %c%c%c%c\n", \
33 cpsr & 0xff0f0000, \
34 ((1<<31) & cpsr) ? 'N' : ' ', \
35 ((1<<30) & cpsr) ? 'Z' : ' ', \
36 ((1<<29) & cpsr) ? 'C' : ' ', \
37 ((1<<28) & cpsr) ? 'V' : ' ' \
44 unsigned int cpsr; \
[all...]
H A Dv6intThumb.c22 unsigned int cpsr; \
28 "mrs %1,cpsr;" \
29 : "=&r" (out), "=&r" (cpsr) \
33 printf("%s :: rd 0x%08x, c:v-in %d, cpsr 0x%08x %c%c%c%c\n", \
36 cpsr & 0xff0f0000, \
37 ((1<<31) & cpsr) ? 'N' : ' ', \
38 ((1<<30) & cpsr) ? 'Z' : ' ', \
39 ((1<<29) & cpsr) ? 'C' : ' ', \
40 ((1<<28) & cpsr) ? 'V' : ' ' \
50 unsigned int cpsr; \
354 unsigned int cpsr; local
[all...]
H A Dv6media.c21 unsigned int cpsr; \
32 "mrs %1,cpsr;" \
33 : "=&r" (out), "=&r" (cpsr) \
37 printf("%s :: rd 0x%08x rm 0x%08x, carryin %d, cpsr 0x%08x %c%c%c%c%c ge[3:0]=%d%d%d%d\n", \
40 cpsr & 0xff0f0000, \
41 ((1<<31) & cpsr) ? 'N' : ' ', \
42 ((1<<30) & cpsr) ? 'Z' : ' ', \
43 ((1<<29) & cpsr) ? 'C' : ' ', \
44 ((1<<28) & cpsr) ? 'V' : ' ', \
45 ((1<<27) & cpsr)
[all...]
/external/google-breakpad/src/google_breakpad/common/
H A Dminidump_cpu_arm.h112 uint32_t cpsr; member in struct:__anon6897
H A Dminidump_cpu_arm64.h107 uint32_t cpsr; member in struct:__anon6899
/external/valgrind/coregrind/m_gdbserver/
H A Dvalgrind-low-arm.c58 { "", 512, 0 }, // some floating point registers here. So, cpsr
65 { "cpsr", 512, 32 },
225 UInt cpsr = LibVEX_GuestARM_get_cpsr (arm); local
227 VG_(transfer) (&cpsr, buf, dir, size, mod);
232 *mod = newcpsr != cpsr;
/external/valgrind/VEX/priv/
H A Dguest_arm_helpers.c1224 UInt cpsr = 0; local
1226 cpsr |= armg_calculate_flags_nzcv(
1232 vassert(0 == (cpsr & 0x0FFFFFFF));
1235 cpsr |= (1 << 27);
1238 cpsr |= (1 << 16);
1240 cpsr |= (1 << 17);
1242 cpsr |= (1 << 18);
1244 cpsr |= (1 << 19);
1246 cpsr |= (1 << 4); // 0b10000 means user-mode
1250 cpsr |
[all...]
/external/google-breakpad/src/client/linux/dump_writer_common/
H A Dthread_info.cc199 out->cpsr = 0;
218 out->cpsr = static_cast<uint32_t>(regs.pstate);
H A Ducontext_reader.cc177 out->cpsr = uc->uc_mcontext.arm_cpsr;
199 out->cpsr = static_cast<uint32_t>(uc->uc_mcontext.pstate);
/external/google-breakpad/src/processor/
H A Ddump_context.cc517 printf(" cpsr = 0x%x\n", context_arm->cpsr);
547 printf(" cpsr = 0x%x\n", context_arm64->cpsr);
H A Dminidump_unittest.cc1007 raw_context.cpsr = 0x2e951ef7;
1066 EXPECT_EQ(0x2e951ef7U, raw_context.cpsr);
1091 raw_context.cpsr = 0x2e951ef7;
1150 EXPECT_EQ(0x2e951ef7U, raw_context.cpsr);
H A Dsynth_minidump.cc189 D32(context.cpsr);
/external/libunwind_llvm/src/
H A DUnwindRegistersSave.S271 // skip cpsr
326 @ T1 does not have a non-cpsr-clobbering register-zeroing instruction.
327 @ It is safe to use here though because we are about to return, and cpsr is
/external/google-breakpad/src/client/mac/handler/
H A Dminidump_generator.cc486 context_ptr->cpsr = REGISTER_FROM_THREADSTATE(machine_state, cpsr);
546 context_ptr->cpsr = REGISTER_FROM_THREADSTATE(machine_state, cpsr);
/external/libopus/celt/arm/
H A Darm2gnu.pl204 s/CPSR/cpsr/;
/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
H A DMachO.h1733 uint32_t cpsr; member in struct:llvm::MachO::arm_thread_state32_t
1742 sys::swapByteOrder(x.cpsr);
1751 uint32_t cpsr; member in struct:llvm::MachO::arm_thread_state64_t
1762 sys::swapByteOrder(x.cpsr);
/external/google-breakpad/src/tools/linux/md2core/
H A Dminidump-2-core.cc364 thread->regs.uregs[16] = rawregs->cpsr;

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