Searched refs:f17 (Results 1 - 25 of 93) sorted by relevance

1234

/external/clang/test/CXX/except/except.spec/
H A Dp3.cpp77 void f17();
78 void f17() noexcept(false);
/external/clang/test/CodeGen/
H A Dfunction-attributes.c82 // CHECK: call void @f17()
85 __attribute__ ((returns_twice)) void f17(void);
87 f17();
H A Dregparm-struct.c161 __attribute__((regparm(3))) struct s12 f17(int a, int b, int c);
162 // CHECK: declare void @f17(%struct.s12* inreg sret, i32 inreg, i32 inreg, i32)
164 f17(41, 42, 43);
H A Darm-arguments.c97 // APCS-GNU-LABEL: define i32 @f17()
98 // AAPCS-LABEL: define arm_aapcscc i32 @f17()
100 struct s17 f17(void) {} function
H A Dexprs.c180 // CHECK-LABEL: define void @f17()
181 void f17() {
H A Dstruct.c173 int f17() { function
/external/compiler-rt/lib/builtins/ppc/
H A DrestFP.S26 lfd f17,-120(r1)
H A DsaveFP.S24 stfd f17,-120(r1)
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5-wrong-error.s25 c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips5-wrong-error.s25 c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips5-wrong-error.s25 c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips4/
H A Dinvalid-mips5-wrong-error.s25 c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
41 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips5-wrong-error.s28 c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
38 movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
39 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
43 nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/linux-kselftest/tools/testing/selftests/powerpc/include/
H A Dfpu_asm.h29 stfd f17,(stack_size + STACK_FRAME_MIN_SIZE - 112)(%r1); \
49 lfd f17,(stack_size + STACK_FRAME_MIN_SIZE - 112)(%r1); \
62 lfd f17,24(r3) variable
/external/clang/test/Sema/
H A Dattr-ownership.c25 void f17(void*) __attribute__((ownership_takes(__, 1)));
/external/compiler-rt/lib/tsan/rtl/
H A Dtsan_ppc_regs.h50 #define f17 17 macro
/external/llvm/test/MC/ARM/
H A Dsymbol-variants.s59 .word f17(target2)
61 @CHECK: 44 R_ARM_TARGET2 f17
/external/clang/test/Analysis/
H A Darray-struct.c159 void f17() { function
/external/clang/test/CodeGenCXX/
H A Daarch64-mangle-neon-vectors.cpp72 void f17(int32x4_t) {} function
H A Ddebug-info-line.cpp207 void f17(int *x) { function
/external/clang/test/SemaObjCXX/Inputs/
H A Dnullability-pragmas-1.h40 void f17(CFErrorRef *error); // expected-note{{no known conversion from 'A * _Nonnull' to 'CFErrorRef _Nullable * _Nullable' (aka '__CFError **') for 1st argument}}
/external/libjpeg-turbo/simd/
H A Djsimd_mips_dspr2_asm.h76 #define f17 $f17 macro
/external/valgrind/none/tests/ppc32/
H A Dtest_isa_2_06_part2.c57 register double f17 __asm__ ("fr17");
1056 __asm__ __volatile__ ("fctiduz. %0, %1" : "=d" (f17) : "d" (f14));
1058 __asm__ __volatile__ ("fctiduz %0, %1" : "=d" (f17) : "d" (f14));
1064 __asm__ __volatile__ ("fctidu. %0, %1" : "=d" (f17) : "d" (f14));
1066 __asm__ __volatile__ ("fctidu %0, %1" : "=d" (f17) : "d" (f14));
1072 __asm__ __volatile__ ("fctiwuz. %0, %1" : "=d" (f17) : "d" (f14));
1074 __asm__ __volatile__ ("fctiwuz %0, %1" : "=d" (f17) : "d" (f14));
1080 __asm__ __volatile__ ("fctiwu. %0, %1" : "=d" (f17) : "d" (f14));
1082 __asm__ __volatile__ ("fctiwu %0, %1" : "=d" (f17) : "d" (f14));
1713 result = f17;
[all...]
H A Dtest_dfp3.c33 register double f17 __asm__ ("fr17");
833 f17 = d0x;
901 f17 = d1x;
960 f17 = d0x;
1042 f17 = d0x;
1119 f17 = d0x;
1198 f17 = d1x;
/external/valgrind/none/tests/ppc64/
H A Dtest_isa_2_06_part2.c57 register double f17 __asm__ ("fr17");
1056 __asm__ __volatile__ ("fctiduz. %0, %1" : "=d" (f17) : "d" (f14));
1058 __asm__ __volatile__ ("fctiduz %0, %1" : "=d" (f17) : "d" (f14));
1064 __asm__ __volatile__ ("fctidu. %0, %1" : "=d" (f17) : "d" (f14));
1066 __asm__ __volatile__ ("fctidu %0, %1" : "=d" (f17) : "d" (f14));
1072 __asm__ __volatile__ ("fctiwuz. %0, %1" : "=d" (f17) : "d" (f14));
1074 __asm__ __volatile__ ("fctiwuz %0, %1" : "=d" (f17) : "d" (f14));
1080 __asm__ __volatile__ ("fctiwu. %0, %1" : "=d" (f17) : "d" (f14));
1082 __asm__ __volatile__ ("fctiwu %0, %1" : "=d" (f17) : "d" (f14));
1713 result = f17;
[all...]

Completed in 1388 milliseconds

1234