| /external/llvm/test/MC/Hexagon/ |
| H A D | pcrel.s | 4 # make sure the fixups emitted match what is
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| H A D | got.s | 4 # make sure the fixups emitted match what is
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| /external/llvm/test/MC/Mips/ |
| H A D | mips64eb-fixups.s | 3 .section .fixups,"",@progbits
27 # CHECK: Name: .fixups (12)
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| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| H A D | nvc0_program.h | 67 void *fixups; member in struct:nvc0_program
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| H A D | nvc0_program.c | 618 prog->fixups = info->bin.fixupData;
752 if (prog->fixups) {
753 nv50_ir_apply_fixups(prog->fixups, prog->code,
910 FREE(prog->fixups);
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| /external/dtc/libfdt/ |
| H A D | fdt_overlay.c | 188 * @fixup_node: Node offset of the matching local fixups node
309 int fixups; local
311 fixups = fdt_path_offset(fdto, "/__local_fixups__");
312 if (fixups < 0) {
314 if (fixups == -FDT_ERR_NOTFOUND)
317 return fixups;
323 return overlay_update_local_node_references(fdto, 0, fixups,
396 * @property: Property offset in the overlay holding the list of fixups
497 /* We can have overlays without any fixups */
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| /external/llvm/test/MC/Sparc/ |
| H A D | sparc-little-endian.s | 13 ! ...and that fixups are applied to the correct bytes.
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| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_program.h | 111 void *fixups; /* relocation records */ member in struct:nv50_program
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| H A D | nv50_program.c | 379 prog->fixups = info->bin.relocData;
491 if (prog->fixups)
492 nv50_ir_relocate_code(prog->fixups, prog->code, prog->code_base, 0, 0);
520 FREE(p->fixups);
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | arm-memory-instructions.s | 30 @ to the use of non-contiguous bit ranges for fixups in ARM. Once that's
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| H A D | elf-movt.s | 17 @@ make sure that the text section fixups are sane too
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| /external/llvm/test/MC/ARM/ |
| H A D | arm-memory-instructions.s | 32 @ to the use of non-contiguous bit ranges for fixups in ARM. Once that's
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| H A D | elf-movt.s | 17 @@ make sure that the text section fixups are sane too
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceAssembler.h | 21 /// from this base class. This base class manages buffers and fixups for
198 const FixupRefList &fixups() const { return Fixups; } function in class:Ice::AssemblerBuffer
216 /// List of pool-allocated fixups relative to the current function.
306 const FixupRefList &fixups() const { return Buffer.fixups(); } function in class:Ice::Assembler
355 /// all changes to label bindings, label links, and relocation fixups are
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| H A D | IceAssembler.cpp | 156 for (const AssemblerFixup *NextFixup : fixups()) {
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| H A D | IceELFObjectWriter.cpp | 264 const auto &Fixups = Asm->fixups();
273 RelSection->addRelocations(OffsetInSection, Asm->fixups(), SymTab);
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| /external/llvm/test/MC/Mips/micromips32r6/ |
| H A D | relocations.s | 6 # Check that the assembler can handle the documented syntax for fixups.
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| /external/llvm/test/MC/PowerPC/ |
| H A D | ppc64-fixup-apply.s | 7 # This checks that fixups that can be resolved within the same
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| H A D | ppc64-localentry.s | 45 # Verify that fixups to local function symbols are performed only
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| /external/llvm/test/MC/Mips/micromips64r6/ |
| H A D | relocations.s | 6 # Check that the assembler can handle the documented syntax for fixups.
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| /external/llvm/test/MC/Mips/mips32r6/ |
| H A D | relocations.s | 6 # Check that the assembler can handle the documented syntax for fixups.
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| /external/llvm/test/MC/Mips/mips64r6/ |
| H A D | relocations.s | 6 # Check that the assembler can handle the documented syntax for fixups.
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| /external/python/cpython2/Lib/logging/ |
| H A D | config.py | 148 fixups = [] #for inter-handler references
175 fixups.append((h, target))
178 for h, t in fixups:
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| H A D | TestUtil.h | 757 for (const auto *Fixup : assembler()->fixups()) {
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| H A D | TestUtil.h | 214 // require creating fixups, which would, in turn, require creating a global
943 for (const auto *Fixup : assembler()->fixups()) {
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