| /external/vixl/test/aarch32/ |
| H A D | test-simulator-cond-rd-operand-rn-a32.cc | 221 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25637
533 ARRAY_SIZE(kRdIsNotRn),
534 kRdIsNotRn},
538 ARRAY_SIZE(kRdIsNotRn),
539 kRdIsNotRn},
543 ARRAY_SIZE(kRdIsNotRn),
544 kRdIsNotRn},
548 ARRAY_SIZE(kRdIsNotRn),
549 kRdIsNotRn},
553 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 215 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25638
598 ARRAY_SIZE(kRdIsNotRn),
599 kRdIsNotRn},
603 ARRAY_SIZE(kRdIsNotRn),
604 kRdIsNotRn},
608 ARRAY_SIZE(kRdIsNotRn),
609 kRdIsNotRn},
613 ARRAY_SIZE(kRdIsNotRn),
614 kRdIsNotRn},
618 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 215 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25639
598 ARRAY_SIZE(kRdIsNotRn),
599 kRdIsNotRn},
603 ARRAY_SIZE(kRdIsNotRn),
604 kRdIsNotRn},
608 ARRAY_SIZE(kRdIsNotRn),
609 kRdIsNotRn},
613 ARRAY_SIZE(kRdIsNotRn),
614 kRdIsNotRn},
618 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-t32.cc | 221 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25646
533 ARRAY_SIZE(kRdIsNotRn),
534 kRdIsNotRn},
538 ARRAY_SIZE(kRdIsNotRn),
539 kRdIsNotRn},
543 ARRAY_SIZE(kRdIsNotRn),
544 kRdIsNotRn},
548 ARRAY_SIZE(kRdIsNotRn),
549 kRdIsNotRn},
553 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 217 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25640
600 ARRAY_SIZE(kRdIsNotRn),
601 kRdIsNotRn},
605 ARRAY_SIZE(kRdIsNotRn),
606 kRdIsNotRn},
610 ARRAY_SIZE(kRdIsNotRn),
611 kRdIsNotRn},
615 ARRAY_SIZE(kRdIsNotRn),
616 kRdIsNotRn},
620 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 217 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25641
600 ARRAY_SIZE(kRdIsNotRn),
601 kRdIsNotRn},
605 ARRAY_SIZE(kRdIsNotRn),
606 kRdIsNotRn},
610 ARRAY_SIZE(kRdIsNotRn),
611 kRdIsNotRn},
615 ARRAY_SIZE(kRdIsNotRn),
616 kRdIsNotRn},
620 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 217 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25642
600 ARRAY_SIZE(kRdIsNotRn),
601 kRdIsNotRn},
605 ARRAY_SIZE(kRdIsNotRn),
606 kRdIsNotRn},
610 ARRAY_SIZE(kRdIsNotRn),
611 kRdIsNotRn},
615 ARRAY_SIZE(kRdIsNotRn),
616 kRdIsNotRn},
620 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 217 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, member in namespace:vixl::aarch32::__anon25643
600 ARRAY_SIZE(kRdIsNotRn),
601 kRdIsNotRn},
605 ARRAY_SIZE(kRdIsNotRn),
606 kRdIsNotRn},
610 ARRAY_SIZE(kRdIsNotRn),
611 kRdIsNotRn},
615 ARRAY_SIZE(kRdIsNotRn),
616 kRdIsNotRn},
620 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc | 467 static const Inputs kRdIsNotRn[] = {{NZCVFlag, 0xffff8000, 0xffffffff}, member in namespace:vixl::aarch32::__anon25670
1174 ARRAY_SIZE(kRdIsNotRn),
1175 kRdIsNotRn},
1179 ARRAY_SIZE(kRdIsNotRn),
1180 kRdIsNotRn},
1184 ARRAY_SIZE(kRdIsNotRn),
1185 kRdIsNotRn},
1189 ARRAY_SIZE(kRdIsNotRn),
1190 kRdIsNotRn},
1194 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-rn-operand-imm12-t32.cc | 193 static const Inputs kRdIsNotRn[] = {{0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25650
1242 ARRAY_SIZE(kRdIsNotRn),
1243 kRdIsNotRn},
1247 ARRAY_SIZE(kRdIsNotRn),
1248 kRdIsNotRn},
1252 ARRAY_SIZE(kRdIsNotRn),
1253 kRdIsNotRn},
1257 ARRAY_SIZE(kRdIsNotRn),
1258 kRdIsNotRn},
1262 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 218 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc, 0}, member in namespace:vixl::aarch32::__anon25644
1593 ARRAY_SIZE(kRdIsNotRn),
1594 kRdIsNotRn},
1598 ARRAY_SIZE(kRdIsNotRn),
1599 kRdIsNotRn},
1603 ARRAY_SIZE(kRdIsNotRn),
1604 kRdIsNotRn},
1608 ARRAY_SIZE(kRdIsNotRn),
1609 kRdIsNotRn},
1613 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-operand-rn-shift-rs-t32.cc | 212 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc, 0}, member in namespace:vixl::aarch32::__anon25645
1587 ARRAY_SIZE(kRdIsNotRn),
1588 kRdIsNotRn},
1592 ARRAY_SIZE(kRdIsNotRn),
1593 kRdIsNotRn},
1597 ARRAY_SIZE(kRdIsNotRn),
1598 kRdIsNotRn},
1602 ARRAY_SIZE(kRdIsNotRn),
1603 kRdIsNotRn},
1607 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-rn-a32.cc | 214 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000000, 0x00000001}, member in namespace:vixl::aarch32::__anon25647
1256 ARRAY_SIZE(kRdIsNotRn),
1257 kRdIsNotRn},
1261 ARRAY_SIZE(kRdIsNotRn),
1262 kRdIsNotRn},
1266 ARRAY_SIZE(kRdIsNotRn),
1267 kRdIsNotRn},
1271 ARRAY_SIZE(kRdIsNotRn),
1272 kRdIsNotRn},
1276 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-rn-operand-const-a32.cc | 228 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25648
1352 ARRAY_SIZE(kRdIsNotRn),
1353 kRdIsNotRn},
1357 ARRAY_SIZE(kRdIsNotRn),
1358 kRdIsNotRn},
1362 ARRAY_SIZE(kRdIsNotRn),
1363 kRdIsNotRn},
1367 ARRAY_SIZE(kRdIsNotRn),
1368 kRdIsNotRn},
1372 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-rn-operand-const-t32.cc | 212 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25649
1261 ARRAY_SIZE(kRdIsNotRn),
1262 kRdIsNotRn},
1266 ARRAY_SIZE(kRdIsNotRn),
1267 kRdIsNotRn},
1271 ARRAY_SIZE(kRdIsNotRn),
1272 kRdIsNotRn},
1276 ARRAY_SIZE(kRdIsNotRn),
1277 kRdIsNotRn},
1281 ARRAY_SIZE(kRdIsNotRn),
[all...] |
| H A D | test-simulator-cond-rd-rn-t32.cc | 214 static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000000, 0x00000001}, member in namespace:vixl::aarch32::__anon25668
1256 ARRAY_SIZE(kRdIsNotRn),
1257 kRdIsNotRn},
1261 ARRAY_SIZE(kRdIsNotRn),
1262 kRdIsNotRn},
1266 ARRAY_SIZE(kRdIsNotRn),
1267 kRdIsNotRn},
1271 ARRAY_SIZE(kRdIsNotRn),
1272 kRdIsNotRn},
1276 ARRAY_SIZE(kRdIsNotRn),
[all...] |