/external/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-operand-rn-a32.cc | 189 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25637 500 {{al, r0, r0}, "al r0 r0", "RdIsRn_al_r0_r0", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 501 {{al, r1, r1}, "al r1 r1", "RdIsRn_al_r1_r1", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 502 {{al, r2, r2}, "al r2 r2", "RdIsRn_al_r2_r2", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 503 {{al, r3, r3}, "al r3 r3", "RdIsRn_al_r3_r3", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 504 {{al, r4, r4}, "al r4 r4", "RdIsRn_al_r4_r4", ARRAY_SIZE(kRdIsRn), kRdIsR [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 183 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25638 528 ARRAY_SIZE(kRdIsRn), 529 kRdIsRn}, 533 ARRAY_SIZE(kRdIsRn), 534 kRdIsRn}, 538 ARRAY_SIZE(kRdIsRn), 539 kRdIsRn}, 543 ARRAY_SIZE(kRdIsRn), 544 kRdIsRn}, 548 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 183 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25639 528 ARRAY_SIZE(kRdIsRn), 529 kRdIsRn}, 533 ARRAY_SIZE(kRdIsRn), 534 kRdIsRn}, 538 ARRAY_SIZE(kRdIsRn), 539 kRdIsRn}, 543 ARRAY_SIZE(kRdIsRn), 544 kRdIsRn}, 548 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-t32.cc | 189 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25646 500 {{al, r0, r0}, "al r0 r0", "RdIsRn_al_r0_r0", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 501 {{al, r1, r1}, "al r1 r1", "RdIsRn_al_r1_r1", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 502 {{al, r2, r2}, "al r2 r2", "RdIsRn_al_r2_r2", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 503 {{al, r3, r3}, "al r3 r3", "RdIsRn_al_r3_r3", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 504 {{al, r4, r4}, "al r4 r4", "RdIsRn_al_r4_r4", ARRAY_SIZE(kRdIsRn), kRdIsR [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 185 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25640 530 ARRAY_SIZE(kRdIsRn), 531 kRdIsRn}, 535 ARRAY_SIZE(kRdIsRn), 536 kRdIsRn}, 540 ARRAY_SIZE(kRdIsRn), 541 kRdIsRn}, 545 ARRAY_SIZE(kRdIsRn), 546 kRdIsRn}, 550 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 185 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25641 530 ARRAY_SIZE(kRdIsRn), 531 kRdIsRn}, 535 ARRAY_SIZE(kRdIsRn), 536 kRdIsRn}, 540 ARRAY_SIZE(kRdIsRn), 541 kRdIsRn}, 545 ARRAY_SIZE(kRdIsRn), 546 kRdIsRn}, 550 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 185 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25642 530 ARRAY_SIZE(kRdIsRn), 531 kRdIsRn}, 535 ARRAY_SIZE(kRdIsRn), 536 kRdIsRn}, 540 ARRAY_SIZE(kRdIsRn), 541 kRdIsRn}, 545 ARRAY_SIZE(kRdIsRn), 546 kRdIsRn}, 550 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 185 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25643 530 ARRAY_SIZE(kRdIsRn), 531 kRdIsRn}, 535 ARRAY_SIZE(kRdIsRn), 536 kRdIsRn}, 540 ARRAY_SIZE(kRdIsRn), 541 kRdIsRn}, 545 ARRAY_SIZE(kRdIsRn), 546 kRdIsRn}, 550 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc | 166 static const Inputs kRdIsRn[] = {{ZFlag, 0x00007fff, 0x00007fff}, member in namespace:vixl::aarch32::__anon25670 1074 ARRAY_SIZE(kRdIsRn), 1075 kRdIsRn}, 1079 ARRAY_SIZE(kRdIsRn), 1080 kRdIsRn}, 1084 ARRAY_SIZE(kRdIsRn), 1085 kRdIsRn}, 1089 ARRAY_SIZE(kRdIsRn), 1090 kRdIsRn}, 1094 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-imm12-t32.cc | 161 static const Inputs kRdIsRn[] = {{0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25650 1192 ARRAY_SIZE(kRdIsRn), 1193 kRdIsRn}, 1197 ARRAY_SIZE(kRdIsRn), 1198 kRdIsRn}, 1202 ARRAY_SIZE(kRdIsRn), 1203 kRdIsRn}, 1207 ARRAY_SIZE(kRdIsRn), 1208 kRdIsRn}, 1212 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 212 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25651 896 ARRAY_SIZE(kRdIsRn), 897 kRdIsRn}, 901 ARRAY_SIZE(kRdIsRn), 902 kRdIsRn}, 906 ARRAY_SIZE(kRdIsRn), 907 kRdIsRn}, 911 ARRAY_SIZE(kRdIsRn), 912 kRdIsRn}, 916 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 212 static const Inputs kRdIsRn[] = {{ZCFlag, 0x00000000, 0x00000000, 0xffffff80}, member in namespace:vixl::aarch32::__anon25659 896 ARRAY_SIZE(kRdIsRn), 897 kRdIsRn}, 901 ARRAY_SIZE(kRdIsRn), 902 kRdIsRn}, 906 ARRAY_SIZE(kRdIsRn), 907 kRdIsRn}, 911 ARRAY_SIZE(kRdIsRn), 912 kRdIsRn}, 916 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000, 0}, member in namespace:vixl::aarch32::__anon25644 1523 ARRAY_SIZE(kRdIsRn), 1524 kRdIsRn}, 1528 ARRAY_SIZE(kRdIsRn), 1529 kRdIsRn}, 1533 ARRAY_SIZE(kRdIsRn), 1534 kRdIsRn}, 1538 ARRAY_SIZE(kRdIsRn), 1539 kRdIsRn}, 1543 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-t32.cc | 180 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000, 0}, member in namespace:vixl::aarch32::__anon25645 1517 ARRAY_SIZE(kRdIsRn), 1518 kRdIsRn}, 1522 ARRAY_SIZE(kRdIsRn), 1523 kRdIsRn}, 1527 ARRAY_SIZE(kRdIsRn), 1528 kRdIsRn}, 1532 ARRAY_SIZE(kRdIsRn), 1533 kRdIsRn}, 1537 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-a32.cc | 182 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25647 1223 {{al, r0, r0}, "al r0 r0", "RdIsRn_al_r0_r0", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1224 {{al, r1, r1}, "al r1 r1", "RdIsRn_al_r1_r1", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1225 {{al, r2, r2}, "al r2 r2", "RdIsRn_al_r2_r2", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1226 {{al, r3, r3}, "al r3 r3", "RdIsRn_al_r3_r3", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1227 {{al, r4, r4}, "al r4 r4", "RdIsRn_al_r4_r4", ARRAY_SIZE(kRdIsRn), kRdIsR [all...] |
H A D | test-simulator-cond-rd-rn-t32.cc | 182 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25668 1223 {{al, r0, r0}, "al r0 r0", "RdIsRn_al_r0_r0", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1224 {{al, r1, r1}, "al r1 r1", "RdIsRn_al_r1_r1", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1225 {{al, r2, r2}, "al r2 r2", "RdIsRn_al_r2_r2", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1226 {{al, r3, r3}, "al r3 r3", "RdIsRn_al_r3_r3", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 1227 {{al, r4, r4}, "al r4 r4", "RdIsRn_al_r4_r4", ARRAY_SIZE(kRdIsRn), kRdIsR [all...] |
H A D | test-simulator-cond-rd-rn-operand-const-a32.cc | 196 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25648 1302 ARRAY_SIZE(kRdIsRn), 1303 kRdIsRn}, 1307 ARRAY_SIZE(kRdIsRn), 1308 kRdIsRn}, 1312 ARRAY_SIZE(kRdIsRn), 1313 kRdIsRn}, 1317 ARRAY_SIZE(kRdIsRn), 1318 kRdIsRn}, 1322 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-const-t32.cc | 180 static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, member in namespace:vixl::aarch32::__anon25649 1211 ARRAY_SIZE(kRdIsRn), 1212 kRdIsRn}, 1216 ARRAY_SIZE(kRdIsRn), 1217 kRdIsRn}, 1221 ARRAY_SIZE(kRdIsRn), 1222 kRdIsRn}, 1226 ARRAY_SIZE(kRdIsRn), 1227 kRdIsRn}, 1231 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25652 903 ARRAY_SIZE(kRdIsRn), 904 kRdIsRn}, 908 ARRAY_SIZE(kRdIsRn), 909 kRdIsRn}, 913 ARRAY_SIZE(kRdIsRn), 914 kRdIsRn}, 918 ARRAY_SIZE(kRdIsRn), 919 kRdIsRn}, 923 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc | 186 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25653 903 ARRAY_SIZE(kRdIsRn), 904 kRdIsRn}, 908 ARRAY_SIZE(kRdIsRn), 909 kRdIsRn}, 913 ARRAY_SIZE(kRdIsRn), 914 kRdIsRn}, 918 ARRAY_SIZE(kRdIsRn), 919 kRdIsRn}, 923 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25654 917 ARRAY_SIZE(kRdIsRn), 918 kRdIsRn}, 922 ARRAY_SIZE(kRdIsRn), 923 kRdIsRn}, 927 ARRAY_SIZE(kRdIsRn), 928 kRdIsRn}, 932 ARRAY_SIZE(kRdIsRn), 933 kRdIsRn}, 937 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25655 917 ARRAY_SIZE(kRdIsRn), 918 kRdIsRn}, 922 ARRAY_SIZE(kRdIsRn), 923 kRdIsRn}, 927 ARRAY_SIZE(kRdIsRn), 928 kRdIsRn}, 932 ARRAY_SIZE(kRdIsRn), 933 kRdIsRn}, 937 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25656 917 ARRAY_SIZE(kRdIsRn), 918 kRdIsRn}, 922 ARRAY_SIZE(kRdIsRn), 923 kRdIsRn}, 927 ARRAY_SIZE(kRdIsRn), 928 kRdIsRn}, 932 ARRAY_SIZE(kRdIsRn), 933 kRdIsRn}, 937 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 200 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, member in namespace:vixl::aarch32::__anon25657 917 ARRAY_SIZE(kRdIsRn), 918 kRdIsRn}, 922 ARRAY_SIZE(kRdIsRn), 923 kRdIsRn}, 927 ARRAY_SIZE(kRdIsRn), 928 kRdIsRn}, 932 ARRAY_SIZE(kRdIsRn), 933 kRdIsRn}, 937 ARRAY_SIZE(kRdIsRn), [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 201 static const Inputs kRdIsRn[] = member in namespace:vixl::aarch32::__anon25658 1912 ARRAY_SIZE(kRdIsRn), 1913 kRdIsRn}, 1917 ARRAY_SIZE(kRdIsRn), 1918 kRdIsRn}, 1922 ARRAY_SIZE(kRdIsRn), 1923 kRdIsRn}, 1927 ARRAY_SIZE(kRdIsRn), 1928 kRdIsRn}, 1932 ARRAY_SIZE(kRdIsRn), [all...] |