/external/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-operand-const-a32.cc | 536 Register nzcv_bits = temp_registers.Acquire(); local 542 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 543 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 544 __ Msr(APSR_nzcvq, nzcv_bits); 552 Register nzcv_bits = temp_registers.Acquire(); local 553 __ Mrs(nzcv_bits, APSR); 555 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 556 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-const-t32.cc | 651 Register nzcv_bits = temp_registers.Acquire(); local 657 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 658 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 659 __ Msr(APSR_nzcvq, nzcv_bits); 667 Register nzcv_bits = temp_registers.Acquire(); local 668 __ Mrs(nzcv_bits, APSR); 670 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 671 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-imm16-t32.cc | 489 Register nzcv_bits = temp_registers.Acquire(); local 495 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 496 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 497 __ Msr(APSR_nzcvq, nzcv_bits); 505 Register nzcv_bits = temp_registers.Acquire(); local 506 __ Mrs(nzcv_bits, APSR); 508 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 509 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-a32.cc | 667 Register nzcv_bits = temp_registers.Acquire(); local 673 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 674 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 675 __ Msr(APSR_nzcvq, nzcv_bits); 684 Register nzcv_bits = temp_registers.Acquire(); local 685 __ Mrs(nzcv_bits, APSR); 687 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 688 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 746 Register nzcv_bits = temp_registers.Acquire(); local 752 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 753 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 754 __ Msr(APSR_nzcvq, nzcv_bits); 763 Register nzcv_bits = temp_registers.Acquire(); local 764 __ Mrs(nzcv_bits, APSR); 766 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 767 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 746 Register nzcv_bits = temp_registers.Acquire(); local 752 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 753 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 754 __ Msr(APSR_nzcvq, nzcv_bits); 763 Register nzcv_bits = temp_registers.Acquire(); local 764 __ Mrs(nzcv_bits, APSR); 766 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 767 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-t32.cc | 667 Register nzcv_bits = temp_registers.Acquire(); local 673 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 674 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 675 __ Msr(APSR_nzcvq, nzcv_bits); 684 Register nzcv_bits = temp_registers.Acquire(); local 685 __ Mrs(nzcv_bits, APSR); 687 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 688 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 1040 Register nzcv_bits = temp_registers.Acquire(); local 1046 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1047 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1048 __ Msr(APSR_nzcvq, nzcv_bits); 1057 Register nzcv_bits = temp_registers.Acquire(); local 1058 __ Mrs(nzcv_bits, APSR); 1060 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1061 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 1040 Register nzcv_bits = temp_registers.Acquire(); local 1046 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1047 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1048 __ Msr(APSR_nzcvq, nzcv_bits); 1057 Register nzcv_bits = temp_registers.Acquire(); local 1058 __ Mrs(nzcv_bits, APSR); 1060 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1061 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 1050 Register nzcv_bits = temp_registers.Acquire(); local 1056 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1057 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1058 __ Msr(APSR_nzcvq, nzcv_bits); 1067 Register nzcv_bits = temp_registers.Acquire(); local 1068 __ Mrs(nzcv_bits, APSR); 1070 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1071 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 1050 Register nzcv_bits = temp_registers.Acquire(); local 1056 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1057 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1058 __ Msr(APSR_nzcvq, nzcv_bits); 1067 Register nzcv_bits = temp_registers.Acquire(); local 1068 __ Mrs(nzcv_bits, APSR); 1070 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1071 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-ge.cc | 471 Register nzcv_bits = temp_registers.Acquire(); local 477 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 478 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 479 __ Msr(APSR_nzcvq, nzcv_bits); 507 Register nzcv_bits = temp_registers.Acquire(); local 508 __ Mrs(nzcv_bits, APSR); 510 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 511 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-q.cc | 455 Register nzcv_bits = temp_registers.Acquire(); local 461 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 462 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 463 __ Msr(APSR_nzcvq, nzcv_bits); 491 Register nzcv_bits = temp_registers.Acquire(); local 492 __ Mrs(nzcv_bits, APSR); 494 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 495 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-a32-sel.cc | 448 Register nzcv_bits = temp_registers.Acquire(); local 454 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 455 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 456 __ Msr(APSR_nzcvq, nzcv_bits); 484 Register nzcv_bits = temp_registers.Acquire(); local 485 __ Mrs(nzcv_bits, APSR); 487 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 488 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-ge.cc | 471 Register nzcv_bits = temp_registers.Acquire(); local 477 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 478 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 479 __ Msr(APSR_nzcvq, nzcv_bits); 507 Register nzcv_bits = temp_registers.Acquire(); local 508 __ Mrs(nzcv_bits, APSR); 510 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 511 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-q.cc | 455 Register nzcv_bits = temp_registers.Acquire(); local 461 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 462 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 463 __ Msr(APSR_nzcvq, nzcv_bits); 491 Register nzcv_bits = temp_registers.Acquire(); local 492 __ Mrs(nzcv_bits, APSR); 494 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 495 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-rm-t32-sel.cc | 448 Register nzcv_bits = temp_registers.Acquire(); local 454 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 455 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 456 __ Msr(APSR_nzcvq, nzcv_bits); 484 Register nzcv_bits = temp_registers.Acquire(); local 485 __ Mrs(nzcv_bits, APSR); 487 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 488 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rdlow-operand-imm8-t32.cc | 1641 Register nzcv_bits = temp_registers.Acquire(); local 1647 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1648 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1649 __ Msr(APSR_nzcvq, nzcv_bits); 1657 Register nzcv_bits = temp_registers.Acquire(); local 1658 __ Mrs(nzcv_bits, APSR); 1660 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1661 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 1153 Register nzcv_bits = temp_registers.Acquire(); local 1159 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1160 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1161 __ Msr(APSR_nzcvq, nzcv_bits); 1171 Register nzcv_bits = temp_registers.Acquire(); local 1172 __ Mrs(nzcv_bits, APSR); 1174 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1175 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 1153 Register nzcv_bits = temp_registers.Acquire(); local 1159 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1160 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1161 __ Msr(APSR_nzcvq, nzcv_bits); 1171 Register nzcv_bits = temp_registers.Acquire(); local 1172 __ Mrs(nzcv_bits, APSR); 1174 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1175 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 936 Register nzcv_bits = temp_registers.Acquire(); local 942 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 943 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 944 __ Msr(APSR_nzcvq, nzcv_bits); 954 Register nzcv_bits = temp_registers.Acquire(); local 955 __ Mrs(nzcv_bits, APSR); 957 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 958 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 1744 Register nzcv_bits = temp_registers.Acquire(); local 1750 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1751 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1752 __ Msr(APSR_nzcvq, nzcv_bits); 1762 Register nzcv_bits = temp_registers.Acquire(); local 1763 __ Mrs(nzcv_bits, APSR); 1765 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1766 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-rs-t32.cc | 1732 Register nzcv_bits = temp_registers.Acquire(); local 1738 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1739 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1740 __ Msr(APSR_nzcvq, nzcv_bits); 1750 Register nzcv_bits = temp_registers.Acquire(); local 1751 __ Mrs(nzcv_bits, APSR); 1753 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1754 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-a32.cc | 1380 Register nzcv_bits = temp_registers.Acquire(); local 1386 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1387 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1388 __ Msr(APSR_nzcvq, nzcv_bits); 1397 Register nzcv_bits = temp_registers.Acquire(); local 1398 __ Mrs(nzcv_bits, APSR); 1400 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1401 __ Str(nzcv_bits, MemOperan [all...] |
H A D | test-simulator-cond-rd-rn-operand-const-a32.cc | 1659 Register nzcv_bits = temp_registers.Acquire(); local 1665 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1666 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 1667 __ Msr(APSR_nzcvq, nzcv_bits); 1676 Register nzcv_bits = temp_registers.Acquire(); local 1677 __ Mrs(nzcv_bits, APSR); 1679 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 1680 __ Str(nzcv_bits, MemOperan [all...] |