1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPIVFIO_H
20#define _UAPIVFIO_H
21#include <linux/types.h>
22#include <linux/ioctl.h>
23#define VFIO_API_VERSION 0
24#define VFIO_TYPE1_IOMMU 1
25#define VFIO_SPAPR_TCE_IOMMU 2
26#define VFIO_TYPE1v2_IOMMU 3
27#define VFIO_DMA_CC_IOMMU 4
28#define VFIO_EEH 5
29#define VFIO_TYPE1_NESTING_IOMMU 6
30#define VFIO_SPAPR_TCE_v2_IOMMU 7
31#define VFIO_NOIOMMU_IOMMU 8
32#define VFIO_TYPE (';')
33#define VFIO_BASE 100
34struct vfio_info_cap_header {
35  __u16 id;
36  __u16 version;
37  __u32 next;
38};
39#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
40#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
41#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
42struct vfio_group_status {
43  __u32 argsz;
44  __u32 flags;
45#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
46#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
47};
48#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
49#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
50#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
51#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
52struct vfio_device_info {
53  __u32 argsz;
54  __u32 flags;
55#define VFIO_DEVICE_FLAGS_RESET (1 << 0)
56#define VFIO_DEVICE_FLAGS_PCI (1 << 1)
57#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)
58#define VFIO_DEVICE_FLAGS_AMBA (1 << 3)
59  __u32 num_regions;
60  __u32 num_irqs;
61};
62#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
63#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
64#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform"
65#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba"
66struct vfio_region_info {
67  __u32 argsz;
68  __u32 flags;
69#define VFIO_REGION_INFO_FLAG_READ (1 << 0)
70#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1)
71#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2)
72#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3)
73  __u32 index;
74  __u32 cap_offset;
75  __u64 size;
76  __u64 offset;
77};
78#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
79#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1
80struct vfio_region_sparse_mmap_area {
81  __u64 offset;
82  __u64 size;
83};
84struct vfio_region_info_cap_sparse_mmap {
85  struct vfio_info_cap_header header;
86  __u32 nr_areas;
87  __u32 reserved;
88  struct vfio_region_sparse_mmap_area areas[];
89};
90#define VFIO_REGION_INFO_CAP_TYPE 2
91struct vfio_region_info_cap_type {
92  struct vfio_info_cap_header header;
93  __u32 type;
94  __u32 subtype;
95};
96#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
97#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
98#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
99#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
100#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
101struct vfio_irq_info {
102  __u32 argsz;
103  __u32 flags;
104#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
105#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
106#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
107#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
108  __u32 index;
109  __u32 count;
110};
111#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
112struct vfio_irq_set {
113  __u32 argsz;
114  __u32 flags;
115#define VFIO_IRQ_SET_DATA_NONE (1 << 0)
116#define VFIO_IRQ_SET_DATA_BOOL (1 << 1)
117#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2)
118#define VFIO_IRQ_SET_ACTION_MASK (1 << 3)
119#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4)
120#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5)
121  __u32 index;
122  __u32 start;
123  __u32 count;
124  __u8 data[];
125};
126#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
127#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_DATA_BOOL | VFIO_IRQ_SET_DATA_EVENTFD)
128#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | VFIO_IRQ_SET_ACTION_UNMASK | VFIO_IRQ_SET_ACTION_TRIGGER)
129#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
130enum {
131  VFIO_PCI_BAR0_REGION_INDEX,
132  VFIO_PCI_BAR1_REGION_INDEX,
133  VFIO_PCI_BAR2_REGION_INDEX,
134  VFIO_PCI_BAR3_REGION_INDEX,
135  VFIO_PCI_BAR4_REGION_INDEX,
136  VFIO_PCI_BAR5_REGION_INDEX,
137  VFIO_PCI_ROM_REGION_INDEX,
138  VFIO_PCI_CONFIG_REGION_INDEX,
139  VFIO_PCI_VGA_REGION_INDEX,
140  VFIO_PCI_NUM_REGIONS = 9
141};
142enum {
143  VFIO_PCI_INTX_IRQ_INDEX,
144  VFIO_PCI_MSI_IRQ_INDEX,
145  VFIO_PCI_MSIX_IRQ_INDEX,
146  VFIO_PCI_ERR_IRQ_INDEX,
147  VFIO_PCI_REQ_IRQ_INDEX,
148  VFIO_PCI_NUM_IRQS
149};
150struct vfio_pci_dependent_device {
151  __u32 group_id;
152  __u16 segment;
153  __u8 bus;
154  __u8 devfn;
155};
156struct vfio_pci_hot_reset_info {
157  __u32 argsz;
158  __u32 flags;
159  __u32 count;
160  struct vfio_pci_dependent_device devices[];
161};
162#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
163struct vfio_pci_hot_reset {
164  __u32 argsz;
165  __u32 flags;
166  __u32 count;
167  __s32 group_fds[];
168};
169#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
170struct vfio_iommu_type1_info {
171  __u32 argsz;
172  __u32 flags;
173#define VFIO_IOMMU_INFO_PGSIZES (1 << 0)
174  __u64 iova_pgsizes;
175};
176#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
177struct vfio_iommu_type1_dma_map {
178  __u32 argsz;
179  __u32 flags;
180#define VFIO_DMA_MAP_FLAG_READ (1 << 0)
181#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)
182  __u64 vaddr;
183  __u64 iova;
184  __u64 size;
185};
186#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
187struct vfio_iommu_type1_dma_unmap {
188  __u32 argsz;
189  __u32 flags;
190  __u64 iova;
191  __u64 size;
192};
193#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
194#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
195#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
196struct vfio_iommu_spapr_tce_ddw_info {
197  __u64 pgsizes;
198  __u32 max_dynamic_windows_supported;
199  __u32 levels;
200};
201struct vfio_iommu_spapr_tce_info {
202  __u32 argsz;
203  __u32 flags;
204#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0)
205  __u32 dma32_window_start;
206  __u32 dma32_window_size;
207  struct vfio_iommu_spapr_tce_ddw_info ddw;
208};
209#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
210struct vfio_eeh_pe_err {
211  __u32 type;
212  __u32 func;
213  __u64 addr;
214  __u64 mask;
215};
216struct vfio_eeh_pe_op {
217  __u32 argsz;
218  __u32 flags;
219  __u32 op;
220  union {
221    struct vfio_eeh_pe_err err;
222  };
223};
224#define VFIO_EEH_PE_DISABLE 0
225#define VFIO_EEH_PE_ENABLE 1
226#define VFIO_EEH_PE_UNFREEZE_IO 2
227#define VFIO_EEH_PE_UNFREEZE_DMA 3
228#define VFIO_EEH_PE_GET_STATE 4
229#define VFIO_EEH_PE_STATE_NORMAL 0
230#define VFIO_EEH_PE_STATE_RESET 1
231#define VFIO_EEH_PE_STATE_STOPPED 2
232#define VFIO_EEH_PE_STATE_STOPPED_DMA 4
233#define VFIO_EEH_PE_STATE_UNAVAIL 5
234#define VFIO_EEH_PE_RESET_DEACTIVATE 5
235#define VFIO_EEH_PE_RESET_HOT 6
236#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7
237#define VFIO_EEH_PE_CONFIGURE 8
238#define VFIO_EEH_PE_INJECT_ERR 9
239#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
240struct vfio_iommu_spapr_register_memory {
241  __u32 argsz;
242  __u32 flags;
243  __u64 vaddr;
244  __u64 size;
245};
246#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
247#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
248struct vfio_iommu_spapr_tce_create {
249  __u32 argsz;
250  __u32 flags;
251  __u32 page_shift;
252  __u32 __resv1;
253  __u64 window_size;
254  __u32 levels;
255  __u32 __resv2;
256  __u64 start_addr;
257};
258#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
259struct vfio_iommu_spapr_tce_remove {
260  __u32 argsz;
261  __u32 flags;
262  __u64 start_addr;
263};
264#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
265#endif
266