1// REQUIRES: powerpc-registered-target 2// RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s 3// RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE 4#include <altivec.h> 5 6vector bool char vbc = { 0, 1, 0, 1, 0, 1, 0, 1, 7 0, 1, 0, 1, 0, 1, 0, 1 }; 8vector signed char vsc = { -8, 9, -10, 11, -12, 13, -14, 15, 9 -0, 1, -2, 3, -4, 5, -6, 7}; 10vector unsigned char vuc = { 8, 9, 10, 11, 12, 13, 14, 15, 11 0, 1, 2, 3, 4, 5, 6, 7}; 12vector float vf = { -1.5, 2.5, -3.5, 4.5 }; 13vector double vd = { 3.5, -7.5 }; 14vector bool short vbs = { 0, 1, 0, 1, 0, 1, 0, 1 }; 15vector signed short vss = { -1, 2, -3, 4, -5, 6, -7, 8 }; 16vector unsigned short vus = { 0, 1, 2, 3, 4, 5, 6, 7 }; 17vector bool int vbi = { 0, 1, 0, 1 }; 18vector signed int vsi = { -1, 2, -3, 4 }; 19vector unsigned int vui = { 0, 1, 2, 3 }; 20vector bool long long vbll = { 1, 0 }; 21vector signed long long vsll = { 255LL, -937LL }; 22vector unsigned long long vull = { 1447LL, 2894LL }; 23double d = 23.4; 24float af[4] = {23.4f, 56.7f, 89.0f, 12.3f}; 25double ad[2] = {23.4, 56.7}; 26signed char asc[16] = { -8, 9, -10, 11, -12, 13, -14, 15, 27 -0, 1, -2, 3, -4, 5, -6, 7}; 28unsigned char auc[16] = { 8, 9, 10, 11, 12, 13, 14, 15, 29 0, 1, 2, 3, 4, 5, 6, 7}; 30signed short ass[8] = { -1, 2, -3, 4, -5, 6, -7, 8 }; 31unsigned short aus[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; 32signed int asi[4] = { -1, 2, -3, 4 }; 33unsigned int aui[4] = { 0, 1, 2, 3 }; 34signed long asl[2] = { -1L, 2L }; 35unsigned long aul[2] = { 1L, 2L }; 36 37vector float res_vf; 38vector double res_vd; 39vector bool char res_vbc; 40vector signed char res_vsc; 41vector unsigned char res_vuc; 42vector bool short res_vbs; 43vector signed short res_vss; 44vector unsigned short res_vus; 45vector bool int res_vbi; 46vector signed int res_vsi; 47vector unsigned int res_vui; 48vector bool long long res_vbll; 49vector signed long long res_vsll; 50vector unsigned long long res_vull; 51 52double res_d; 53float res_af[4]; 54double res_ad[2]; 55signed char res_asc[16]; 56unsigned char res_auc[16]; 57signed short res_ass[8]; 58unsigned short res_aus[8]; 59signed int res_asi[4]; 60unsigned int res_aui[4]; 61 62void dummy() { } 63 64void test1() { 65// CHECK-LABEL: define void @test1 66// CHECK-LE-LABEL: define void @test1 67 68 res_vf = vec_abs(vf); 69// CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}}) 70// CHECK-LE: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}}) 71 72 dummy(); 73// CHECK: call void @dummy() 74// CHECK-LE: call void @dummy() 75 76 res_vd = vec_add(vd, vd); 77// CHECK: fadd <2 x double> 78// CHECK-LE: fadd <2 x double> 79 80 res_vd = vec_and(vbll, vd); 81// CHECK: and <2 x i64> 82// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 83// CHECK-LE: and <2 x i64> 84// CHECK-LE: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 85 86 res_vd = vec_and(vd, vbll); 87// CHECK: and <2 x i64> 88// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 89// CHECK-LE: and <2 x i64> 90// CHECK-LE: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 91 92 res_vd = vec_and(vd, vd); 93// CHECK: and <2 x i64> 94// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 95// CHECK-LE: and <2 x i64> 96// CHECK-LE: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 97 98 dummy(); 99// CHECK: call void @dummy() 100// CHECK-LE: call void @dummy() 101 102 res_vd = vec_andc(vbll, vd); 103// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> 104// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> 105// CHECK: and <2 x i64> 106// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 107// CHECK-LE: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> 108// CHECK-LE: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> 109// CHECK-LE: and <2 x i64> 110// CHECK-LE: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 111 112 dummy(); 113// CHECK: call void @dummy() 114// CHECK-LE: call void @dummy() 115 116 res_vd = vec_andc(vd, vbll); 117// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> 118// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> 119// CHECK: and <2 x i64> 120// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 121// CHECK-LE: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> 122// CHECK-LE: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> 123// CHECK-LE: and <2 x i64> 124// CHECK-LE: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 125 126 dummy(); 127// CHECK: call void @dummy() 128 129 res_vd = vec_andc(vd, vd); 130// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> 131// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> 132// CHECK: and <2 x i64> 133// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> 134 135 dummy(); 136// CHECK: call void @dummy() 137// CHECK-LE: call void @dummy() 138 139 res_vd = vec_ceil(vd); 140// CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double> %{{[0-9]*}}) 141// CHECK-LE: call <2 x double> @llvm.ceil.v2f64(<2 x double> %{{[0-9]*}}) 142 143 res_vf = vec_ceil(vf); 144// CHECK: call <4 x float> @llvm.ceil.v4f32(<4 x float> %{{[0-9]*}}) 145// CHECK-LE: call <4 x float> @llvm.ceil.v4f32(<4 x float> %{{[0-9]*}}) 146 147 res_vbll = vec_cmpeq(vd, vd); 148// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 149// CHECK-LE: call <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 150 151 res_vbi = vec_cmpeq(vf, vf); 152// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 153// CHECK-LE: call <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 154 155 res_vbll = vec_cmpge(vd, vd); 156// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 157// CHECK-LE: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 158 159 res_vbi = vec_cmpge(vf, vf); 160// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 161// CHECK-LE: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 162 163 res_vbll = vec_cmpgt(vd, vd); 164// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 165// CHECK-LE: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 166 167 res_vbi = vec_cmpgt(vf, vf); 168// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 169// CHECK-LE: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 170 171 res_vbll = vec_cmple(vd, vd); 172// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 173// CHECK-LE: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 174 175 res_vbi = vec_cmple(vf, vf); 176// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 177// CHECK-LE: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 178 179 res_vbll = vec_cmplt(vd, vd); 180// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 181// CHECK-LE: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) 182 183 res_vbi = vec_cmplt(vf, vf); 184// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 185// CHECK-LE: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) 186 187 /* vec_cpsgn */ 188 res_vf = vec_cpsgn(vf, vf); 189// CHECK: call <4 x float> @llvm.copysign.v4f32(<4 x float> %{{.+}}, <4 x float> %{{.+}}) 190// CHECK-LE: call <4 x float> @llvm.copysign.v4f32(<4 x float> %{{.+}}, <4 x float> %{{.+}}) 191 192 res_vd = vec_cpsgn(vd, vd); 193// CHECK: call <2 x double> @llvm.copysign.v2f64(<2 x double> %{{.+}}, <2 x double> %{{.+}}) 194// CHECK-LE: call <2 x double> @llvm.copysign.v2f64(<2 x double> %{{.+}}, <2 x double> %{{.+}}) 195 196 /* vec_div */ 197 res_vsll = vec_div(vsll, vsll); 198// CHECK: sdiv <2 x i64> 199// CHECK-LE: sdiv <2 x i64> 200 201 res_vull = vec_div(vull, vull); 202// CHECK: udiv <2 x i64> 203// CHECK-LE: udiv <2 x i64> 204 205 res_vf = vec_div(vf, vf); 206// CHECK: fdiv <4 x float> 207// CHECK-LE: fdiv <4 x float> 208 209 res_vd = vec_div(vd, vd); 210// CHECK: fdiv <2 x double> 211// CHECK-LE: fdiv <2 x double> 212 213 /* vec_max */ 214 res_vf = vec_max(vf, vf); 215// CHECK: @llvm.ppc.vsx.xvmaxsp 216// CHECK-LE: @llvm.ppc.vsx.xvmaxsp 217 218 res_vd = vec_max(vd, vd); 219// CHECK: @llvm.ppc.vsx.xvmaxdp 220// CHECK-LE: @llvm.ppc.vsx.xvmaxdp 221 222 res_vf = vec_vmaxfp(vf, vf); 223// CHECK: @llvm.ppc.vsx.xvmaxsp 224// CHECK-LE: @llvm.ppc.vsx.xvmaxsp 225 226 /* vec_min */ 227 res_vf = vec_min(vf, vf); 228// CHECK: @llvm.ppc.vsx.xvminsp 229// CHECK-LE: @llvm.ppc.vsx.xvminsp 230 231 res_vd = vec_min(vd, vd); 232// CHECK: @llvm.ppc.vsx.xvmindp 233// CHECK-LE: @llvm.ppc.vsx.xvmindp 234 235 res_vf = vec_vminfp(vf, vf); 236// CHECK: @llvm.ppc.vsx.xvminsp 237// CHECK-LE: @llvm.ppc.vsx.xvminsp 238 239 res_d = __builtin_vsx_xsmaxdp(d, d); 240// CHECK: @llvm.ppc.vsx.xsmaxdp 241// CHECK-LE: @llvm.ppc.vsx.xsmaxdp 242 243 res_d = __builtin_vsx_xsmindp(d, d); 244// CHECK: @llvm.ppc.vsx.xsmindp 245// CHECK-LE: @llvm.ppc.vsx.xsmindp 246 247 /* vec_perm */ 248 res_vsll = vec_perm(vsll, vsll, vuc); 249// CHECK: @llvm.ppc.altivec.vperm 250// CHECK-LE: @llvm.ppc.altivec.vperm 251 252 res_vull = vec_perm(vull, vull, vuc); 253// CHECK: @llvm.ppc.altivec.vperm 254// CHECK-LE: @llvm.ppc.altivec.vperm 255 256 res_vbll = vec_perm(vbll, vbll, vuc); 257// CHECK: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 258// CHECK: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 259// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 260// CHECK-LE: xor <16 x i8> 261// CHECK-LE: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 262// CHECK-LE: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 263// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 264 265 res_vf = vec_round(vf); 266// CHECK: call <4 x float> @llvm.round.v4f32(<4 x float> 267// CHECK-LE: call <4 x float> @llvm.round.v4f32(<4 x float> 268 269 res_vd = vec_round(vd); 270// CHECK: call <2 x double> @llvm.round.v2f64(<2 x double> 271// CHECK-LE: call <2 x double> @llvm.round.v2f64(<2 x double> 272 273 res_vd = vec_perm(vd, vd, vuc); 274// CHECK: @llvm.ppc.altivec.vperm 275// CHECK-LE: @llvm.ppc.altivec.vperm 276 277 res_vd = vec_splat(vd, 1); 278// CHECK: [[T1:%.+]] = bitcast <2 x double> {{.+}} to <4 x i32> 279// CHECK: [[T2:%.+]] = bitcast <2 x double> {{.+}} to <4 x i32> 280// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 281// CHECK-LE: xor <16 x i8> 282// CHECK-LE: [[T1:%.+]] = bitcast <2 x double> {{.+}} to <4 x i32> 283// CHECK-LE: [[T2:%.+]] = bitcast <2 x double> {{.+}} to <4 x i32> 284// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 285 286 res_vbll = vec_splat(vbll, 1); 287// CHECK: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 288// CHECK: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 289// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 290// CHECK-LE: xor <16 x i8> 291// CHECK-LE: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 292// CHECK-LE: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 293// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 294 295 res_vsll = vec_splat(vsll, 1); 296// CHECK: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 297// CHECK: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 298// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 299// CHECK-LE: xor <16 x i8> 300// CHECK-LE: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 301// CHECK-LE: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 302// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 303 304 res_vull = vec_splat(vull, 1); 305// CHECK: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 306// CHECK: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 307// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 308// CHECK-LE: xor <16 x i8> 309// CHECK-LE: [[T1:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 310// CHECK-LE: [[T2:%.+]] = bitcast <2 x i64> {{.+}} to <4 x i32> 311// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> 312 313 res_vsi = vec_pack(vsll, vsll); 314// CHECK: @llvm.ppc.altivec.vperm 315// CHECK-LE: @llvm.ppc.altivec.vperm 316 317 res_vui = vec_pack(vull, vull); 318// CHECK: @llvm.ppc.altivec.vperm 319// CHECK-LE: @llvm.ppc.altivec.vperm 320 321 res_vbi = vec_pack(vbll, vbll); 322// CHECK: @llvm.ppc.altivec.vperm 323// CHECK-LE: @llvm.ppc.altivec.vperm 324 325 res_vsll = vec_vperm(vsll, vsll, vuc); 326// CHECK: @llvm.ppc.altivec.vperm 327// CHECK-LE: @llvm.ppc.altivec.vperm 328 329 res_vull = vec_vperm(vull, vull, vuc); 330// CHECK: @llvm.ppc.altivec.vperm 331// CHECK-LE: @llvm.ppc.altivec.vperm 332 333 res_vd = vec_vperm(vd, vd, vuc); 334// CHECK: @llvm.ppc.altivec.vperm 335// CHECK-LE: @llvm.ppc.altivec.vperm 336 337 /* vec_vsx_ld */ 338 339 res_vbi = vec_vsx_ld(0, &vbi); 340// CHECK: @llvm.ppc.vsx.lxvw4x 341// CHECK-LE: @llvm.ppc.vsx.lxvw4x 342 343 res_vsi = vec_vsx_ld(0, &vsi); 344// CHECK: @llvm.ppc.vsx.lxvw4x 345// CHECK-LE: @llvm.ppc.vsx.lxvw4x 346 347 res_vsi = vec_vsx_ld(0, asi); 348// CHECK: @llvm.ppc.vsx.lxvw4x 349// CHECK-LE: @llvm.ppc.vsx.lxvw4x 350 351 res_vui = vec_vsx_ld(0, &vui); 352// CHECK: @llvm.ppc.vsx.lxvw4x 353// CHECK-LE: @llvm.ppc.vsx.lxvw4x 354 355 res_vui = vec_vsx_ld(0, aui); 356// CHECK: @llvm.ppc.vsx.lxvw4x 357// CHECK-LE: @llvm.ppc.vsx.lxvw4x 358 359 res_vf = vec_vsx_ld (0, &vf); 360// CHECK: @llvm.ppc.vsx.lxvw4x 361// CHECK-LE: @llvm.ppc.vsx.lxvw4x 362 363 res_vf = vec_vsx_ld (0, af); 364// CHECK: @llvm.ppc.vsx.lxvw4x 365// CHECK-LE: @llvm.ppc.vsx.lxvw4x 366 367 res_vsll = vec_vsx_ld(0, &vsll); 368// CHECK: @llvm.ppc.vsx.lxvd2x 369// CHECK-LE: @llvm.ppc.vsx.lxvd2x 370 371 res_vull = vec_vsx_ld(0, &vull); 372// CHECK: @llvm.ppc.vsx.lxvd2x 373// CHECK-LE: @llvm.ppc.vsx.lxvd2x 374 375 res_vd = vec_vsx_ld(0, &vd); 376// CHECK: @llvm.ppc.vsx.lxvd2x 377// CHECK-LE: @llvm.ppc.vsx.lxvd2x 378 379 res_vd = vec_vsx_ld(0, ad); 380// CHECK: @llvm.ppc.vsx.lxvd2x 381// CHECK-LE: @llvm.ppc.vsx.lxvd2x 382 383 res_vbs = vec_vsx_ld(0, &vbs); 384// CHECK: @llvm.ppc.vsx.lxvw4x 385// CHECK-LE: @llvm.ppc.vsx.lxvw4x 386 387 res_vss = vec_vsx_ld(0, &vss); 388// CHECK: @llvm.ppc.vsx.lxvw4x 389// CHECK-LE: @llvm.ppc.vsx.lxvw4x 390 391 res_vss = vec_vsx_ld(0, ass); 392// CHECK: @llvm.ppc.vsx.lxvw4x 393// CHECK-LE: @llvm.ppc.vsx.lxvw4x 394 395 res_vus = vec_vsx_ld(0, &vus); 396// CHECK: @llvm.ppc.vsx.lxvw4x 397// CHECK-LE: @llvm.ppc.vsx.lxvw4x 398 399 res_vus = vec_vsx_ld(0, aus); 400// CHECK: @llvm.ppc.vsx.lxvw4x 401// CHECK-LE: @llvm.ppc.vsx.lxvw4x 402 403 res_vbc = vec_vsx_ld(0, &vbc); 404// CHECK: @llvm.ppc.vsx.lxvw4x 405// CHECK-LE: @llvm.ppc.vsx.lxvw4x 406 407 res_vsc = vec_vsx_ld(0, &vsc); 408// CHECK: @llvm.ppc.vsx.lxvw4x 409// CHECK-LE: @llvm.ppc.vsx.lxvw4x 410 411 res_vuc = vec_vsx_ld(0, &vuc); 412// CHECK: @llvm.ppc.vsx.lxvw4x 413// CHECK-LE: @llvm.ppc.vsx.lxvw4x 414 415 res_vsc = vec_vsx_ld(0, asc); 416// CHECK: @llvm.ppc.vsx.lxvw4x 417// CHECK-LE: @llvm.ppc.vsx.lxvw4x 418 419 res_vuc = vec_vsx_ld(0, auc); 420// CHECK: @llvm.ppc.vsx.lxvw4x 421// CHECK-LE: @llvm.ppc.vsx.lxvw4x 422 423 /* vec_vsx_st */ 424 425 vec_vsx_st(vbi, 0, &res_vbi); 426// CHECK: @llvm.ppc.vsx.stxvw4x 427// CHECK-LE: @llvm.ppc.vsx.stxvw4x 428 429 vec_vsx_st(vbi, 0, res_aui); 430// CHECK: @llvm.ppc.vsx.stxvw4x 431// CHECK-LE: @llvm.ppc.vsx.stxvw4x 432 433 vec_vsx_st(vbi, 0, res_asi); 434// CHECK: @llvm.ppc.vsx.stxvw4x 435// CHECK-LE: @llvm.ppc.vsx.stxvw4x 436 437 vec_vsx_st(vsi, 0, &res_vsi); 438// CHECK: @llvm.ppc.vsx.stxvw4x 439// CHECK-LE: @llvm.ppc.vsx.stxvw4x 440 441 vec_vsx_st(vsi, 0, res_asi); 442// CHECK: @llvm.ppc.vsx.stxvw4x 443// CHECK-LE: @llvm.ppc.vsx.stxvw4x 444 445 vec_vsx_st(vui, 0, &res_vui); 446// CHECK: @llvm.ppc.vsx.stxvw4x 447// CHECK-LE: @llvm.ppc.vsx.stxvw4x 448 449 vec_vsx_st(vui, 0, res_aui); 450// CHECK: @llvm.ppc.vsx.stxvw4x 451// CHECK-LE: @llvm.ppc.vsx.stxvw4x 452 453 vec_vsx_st(vf, 0, &res_vf); 454// CHECK: @llvm.ppc.vsx.stxvw4x 455// CHECK-LE: @llvm.ppc.vsx.stxvw4x 456 457 vec_vsx_st(vf, 0, res_af); 458// CHECK: @llvm.ppc.vsx.stxvw4x 459// CHECK-LE: @llvm.ppc.vsx.stxvw4x 460 461 vec_vsx_st(vsll, 0, &res_vsll); 462// CHECK: @llvm.ppc.vsx.stxvd2x 463// CHECK-LE: @llvm.ppc.vsx.stxvd2x 464 465 vec_vsx_st(vull, 0, &res_vull); 466// CHECK: @llvm.ppc.vsx.stxvd2x 467// CHECK-LE: @llvm.ppc.vsx.stxvd2x 468 469 vec_vsx_st(vd, 0, &res_vd); 470// CHECK: @llvm.ppc.vsx.stxvd2x 471// CHECK-LE: @llvm.ppc.vsx.stxvd2x 472 473 vec_vsx_st(vd, 0, res_ad); 474// CHECK: @llvm.ppc.vsx.stxvd2x 475// CHECK-LE: @llvm.ppc.vsx.stxvd2x 476 477 vec_vsx_st(vbs, 0, &res_vbs); 478// CHECK: @llvm.ppc.vsx.stxvw4x 479// CHECK-LE: @llvm.ppc.vsx.stxvw4x 480 481 vec_vsx_st(vbs, 0, res_aus); 482// CHECK: @llvm.ppc.vsx.stxvw4x 483// CHECK-LE: @llvm.ppc.vsx.stxvw4x 484 485 vec_vsx_st(vbs, 0, res_ass); 486// CHECK: @llvm.ppc.vsx.stxvw4x 487// CHECK-LE: @llvm.ppc.vsx.stxvw4x 488 489 vec_vsx_st(vss, 0, &res_vss); 490// CHECK: @llvm.ppc.vsx.stxvw4x 491// CHECK-LE: @llvm.ppc.vsx.stxvw4x 492 493 vec_vsx_st(vss, 0, res_ass); 494// CHECK: @llvm.ppc.vsx.stxvw4x 495// CHECK-LE: @llvm.ppc.vsx.stxvw4x 496 497 vec_vsx_st(vus, 0, &res_vus); 498// CHECK: @llvm.ppc.vsx.stxvw4x 499// CHECK-LE: @llvm.ppc.vsx.stxvw4x 500 501 vec_vsx_st(vus, 0, res_aus); 502// CHECK: @llvm.ppc.vsx.stxvw4x 503// CHECK-LE: @llvm.ppc.vsx.stxvw4x 504 505 vec_vsx_st(vsc, 0, &res_vsc); 506// CHECK: @llvm.ppc.vsx.stxvw4x 507// CHECK-LE: @llvm.ppc.vsx.stxvw4x 508 509 vec_vsx_st(vsc, 0, res_asc); 510// CHECK: @llvm.ppc.vsx.stxvw4x 511// CHECK-LE: @llvm.ppc.vsx.stxvw4x 512 513 vec_vsx_st(vuc, 0, &res_vuc); 514// CHECK: @llvm.ppc.vsx.stxvw4x 515// CHECK-LE: @llvm.ppc.vsx.stxvw4x 516 517 vec_vsx_st(vuc, 0, res_auc); 518// CHECK: @llvm.ppc.vsx.stxvw4x 519// CHECK-LE: @llvm.ppc.vsx.stxvw4x 520 521 vec_vsx_st(vbc, 0, &res_vbc); 522// CHECK: @llvm.ppc.vsx.stxvw4x 523// CHECK-LE: @llvm.ppc.vsx.stxvw4x 524 525 vec_vsx_st(vbc, 0, res_asc); 526// CHECK: @llvm.ppc.vsx.stxvw4x 527// CHECK-LE: @llvm.ppc.vsx.stxvw4x 528 529 vec_vsx_st(vbc, 0, res_auc); 530// CHECK: @llvm.ppc.vsx.stxvw4x 531// CHECK-LE: @llvm.ppc.vsx.stxvw4x 532 533 /* vec_and */ 534 res_vsll = vec_and(vsll, vsll); 535// CHECK: and <2 x i64> 536// CHECK-LE: and <2 x i64> 537 538 res_vsll = vec_and(vbll, vsll); 539// CHECK: and <2 x i64> 540// CHECK-LE: and <2 x i64> 541 542 res_vsll = vec_and(vsll, vbll); 543// CHECK: and <2 x i64> 544// CHECK-LE: and <2 x i64> 545 546 res_vull = vec_and(vull, vull); 547// CHECK: and <2 x i64> 548// CHECK-LE: and <2 x i64> 549 550 res_vull = vec_and(vbll, vull); 551// CHECK: and <2 x i64> 552// CHECK-LE: and <2 x i64> 553 554 res_vull = vec_and(vull, vbll); 555// CHECK: and <2 x i64> 556// CHECK-LE: and <2 x i64> 557 558 res_vbll = vec_and(vbll, vbll); 559// CHECK: and <2 x i64> 560// CHECK-LE: and <2 x i64> 561 562 /* vec_vand */ 563 res_vsll = vec_vand(vsll, vsll); 564// CHECK: and <2 x i64> 565// CHECK-LE: and <2 x i64> 566 567 res_vsll = vec_vand(vbll, vsll); 568// CHECK: and <2 x i64> 569// CHECK-LE: and <2 x i64> 570 571 res_vsll = vec_vand(vsll, vbll); 572// CHECK: and <2 x i64> 573// CHECK-LE: and <2 x i64> 574 575 res_vull = vec_vand(vull, vull); 576// CHECK: and <2 x i64> 577// CHECK-LE: and <2 x i64> 578 579 res_vull = vec_vand(vbll, vull); 580// CHECK: and <2 x i64> 581// CHECK-LE: and <2 x i64> 582 583 res_vull = vec_vand(vull, vbll); 584// CHECK: and <2 x i64> 585// CHECK-LE: and <2 x i64> 586 587 res_vbll = vec_vand(vbll, vbll); 588// CHECK: and <2 x i64> 589// CHECK-LE: and <2 x i64> 590 591 /* vec_andc */ 592 res_vsll = vec_andc(vsll, vsll); 593// CHECK: xor <2 x i64> 594// CHECK: and <2 x i64> 595// CHECK-LE: xor <2 x i64> 596// CHECK-LE: and <2 x i64> 597 598 res_vsll = vec_andc(vbll, vsll); 599// CHECK: xor <2 x i64> 600// CHECK: and <2 x i64> 601// CHECK-LE: xor <2 x i64> 602// CHECK-LE: and <2 x i64> 603 604 res_vsll = vec_andc(vsll, vbll); 605// CHECK: xor <2 x i64> 606// CHECK: and <2 x i64> 607// CHECK-LE: xor <2 x i64> 608// CHECK-LE: and <2 x i64> 609 610 res_vull = vec_andc(vull, vull); 611// CHECK: xor <2 x i64> 612// CHECK: and <2 x i64> 613// CHECK-LE: xor <2 x i64> 614// CHECK-LE: and <2 x i64> 615 616 res_vull = vec_andc(vbll, vull); 617// CHECK: xor <2 x i64> 618// CHECK: and <2 x i64> 619// CHECK-LE: xor <2 x i64> 620// CHECK-LE: and <2 x i64> 621 622 res_vull = vec_andc(vull, vbll); 623// CHECK: xor <2 x i64> 624// CHECK: and <2 x i64> 625// CHECK-LE: xor <2 x i64> 626// CHECK-LE: and <2 x i64> 627 628 res_vbll = vec_andc(vbll, vbll); 629// CHECK: xor <2 x i64> 630// CHECK: and <2 x i64> 631// CHECK-LE: xor <2 x i64> 632// CHECK-LE: and <2 x i64> 633 634 res_vf = vec_floor(vf); 635// CHECK: call <4 x float> @llvm.floor.v4f32(<4 x float> %{{[0-9]+}}) 636// CHECK-LE: call <4 x float> @llvm.floor.v4f32(<4 x float> %{{[0-9]+}}) 637 638 res_vd = vec_floor(vd); 639// CHECK: call <2 x double> @llvm.floor.v2f64(<2 x double> %{{[0-9]+}}) 640// CHECK-LE: call <2 x double> @llvm.floor.v2f64(<2 x double> %{{[0-9]+}}) 641 642 res_vf = vec_madd(vf, vf, vf); 643// CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}) 644// CHECK-LE: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}) 645 646 res_vd = vec_madd(vd, vd, vd); 647// CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}) 648// CHECK-LE: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}) 649 650 /* vec_mergeh */ 651 res_vsll = vec_mergeh(vsll, vsll); 652// CHECK: @llvm.ppc.altivec.vperm 653// CHECK-LE: @llvm.ppc.altivec.vperm 654 655 res_vsll = vec_mergeh(vsll, vbll); 656// CHECK: @llvm.ppc.altivec.vperm 657// CHECK-LE: @llvm.ppc.altivec.vperm 658 659 res_vsll = vec_mergeh(vbll, vsll); 660// CHECK: @llvm.ppc.altivec.vperm 661// CHECK-LE: @llvm.ppc.altivec.vperm 662 663 res_vull = vec_mergeh(vull, vull); 664// CHECK: @llvm.ppc.altivec.vperm 665// CHECK-LE: @llvm.ppc.altivec.vperm 666 667 res_vull = vec_mergeh(vull, vbll); 668// CHECK: @llvm.ppc.altivec.vperm 669// CHECK-LE: @llvm.ppc.altivec.vperm 670 671 res_vull = vec_mergeh(vbll, vull); 672// CHECK: @llvm.ppc.altivec.vperm 673// CHECK-LE: @llvm.ppc.altivec.vperm 674 675 /* vec_mergel */ 676 res_vsll = vec_mergel(vsll, vsll); 677// CHECK: @llvm.ppc.altivec.vperm 678// CHECK-LE: @llvm.ppc.altivec.vperm 679 680 res_vsll = vec_mergel(vsll, vbll); 681// CHECK: @llvm.ppc.altivec.vperm 682// CHECK-LE: @llvm.ppc.altivec.vperm 683 684 res_vsll = vec_mergel(vbll, vsll); 685// CHECK: @llvm.ppc.altivec.vperm 686// CHECK-LE: @llvm.ppc.altivec.vperm 687 688 res_vull = vec_mergel(vull, vull); 689// CHECK: @llvm.ppc.altivec.vperm 690// CHECK-LE: @llvm.ppc.altivec.vperm 691 692 res_vull = vec_mergel(vull, vbll); 693// CHECK: @llvm.ppc.altivec.vperm 694// CHECK-LE: @llvm.ppc.altivec.vperm 695 696 res_vull = vec_mergel(vbll, vull); 697// CHECK: @llvm.ppc.altivec.vperm 698// CHECK-LE: @llvm.ppc.altivec.vperm 699 700 /* vec_msub */ 701 res_vf = vec_msub(vf, vf, vf); 702// CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 703// CHECK-NEXT: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> 704// CHECK-LE: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 705// CHECK-LE-NEXT: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> 706 707 res_vd = vec_msub(vd, vd, vd); 708// CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %{{[0-9]+}} 709// CHECK-NEXT: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> 710// CHECK-LE: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %{{[0-9]+}} 711// CHECK-LE-NEXT: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> 712 713 res_vsll = vec_mul(vsll, vsll); 714// CHECK: mul <2 x i64> 715// CHECK-LE: mul <2 x i64> 716 717 res_vull = vec_mul(vull, vull); 718// CHECK: mul <2 x i64> 719// CHECK-LE: mul <2 x i64> 720 721 res_vf = vec_mul(vf, vf); 722// CHECK: fmul <4 x float> %{{[0-9]+}}, %{{[0-9]+}} 723// CHECK-LE: fmul <4 x float> %{{[0-9]+}}, %{{[0-9]+}} 724 725 res_vd = vec_mul(vd, vd); 726// CHECK: fmul <2 x double> %{{[0-9]+}}, %{{[0-9]+}} 727// CHECK-LE: fmul <2 x double> %{{[0-9]+}}, %{{[0-9]+}} 728 729 res_vf = vec_nearbyint(vf); 730// CHECK: call <4 x float> @llvm.round.v4f32(<4 x float> %{{[0-9]+}}) 731// CHECK-LE: call <4 x float> @llvm.round.v4f32(<4 x float> %{{[0-9]+}}) 732 733 res_vd = vec_nearbyint(vd); 734// CHECK: call <2 x double> @llvm.round.v2f64(<2 x double> %{{[0-9]+}}) 735// CHECK-LE: call <2 x double> @llvm.round.v2f64(<2 x double> %{{[0-9]+}}) 736 737 res_vf = vec_nmadd(vf, vf, vf); 738// CHECK: [[FM:[0-9]+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}) 739// CHECK-NEXT: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %[[FM]] 740// CHECK-LE: [[FM:[0-9]+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}) 741// CHECK-LE-NEXT: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %[[FM]] 742 743 res_vd = vec_nmadd(vd, vd, vd); 744// CHECK: [[FM:[0-9]+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}) 745// CHECK-NEXT: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %[[FM]] 746// CHECK-LE: [[FM:[0-9]+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}) 747// CHECK-LE-NEXT: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %[[FM]] 748 749 res_vf = vec_nmsub(vf, vf, vf); 750// CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 751// CHECK-NEXT: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> 752// CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 753// CHECK-LE: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 754// CHECK-LE-NEXT: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{[0-9]+}}, <4 x float> %{{[0-9]+}}, <4 x float> 755// CHECK-LE: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{[0-9]+}} 756 757 res_vd = vec_nmsub(vd, vd, vd); 758// CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %{{[0-9]+}} 759// CHECK-NEXT: [[FM:[0-9]+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> 760// CHECK-NEXT: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %[[FM]] 761// CHECK-LE: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %{{[0-9]+}} 762// CHECK-LE-NEXT: [[FM:[0-9]+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x double> 763// CHECK-LE-NEXT: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %[[FM]] 764 765 /* vec_nor */ 766 res_vsll = vec_nor(vsll, vsll); 767// CHECK: or <2 x i64> 768// CHECK: xor <2 x i64> 769// CHECK-LE: or <2 x i64> 770// CHECK-LE: xor <2 x i64> 771 772 res_vull = vec_nor(vull, vull); 773// CHECK: or <2 x i64> 774// CHECK: xor <2 x i64> 775// CHECK-LE: or <2 x i64> 776// CHECK-LE: xor <2 x i64> 777 778 res_vull = vec_nor(vbll, vbll); 779// CHECK: or <2 x i64> 780// CHECK: xor <2 x i64> 781// CHECK-LE: or <2 x i64> 782// CHECK-LE: xor <2 x i64> 783 784 res_vd = vec_nor(vd, vd); 785// CHECK: bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 786// CHECK: [[OR:%.+]] = or <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 787// CHECK-NEXT: xor <2 x i64> [[OR]], <i64 -1, i64 -1> 788// CHECK-LE: bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 789// CHECK-LE: [[OR:%.+]] = or <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 790// CHECK-LE-NEXT: xor <2 x i64> [[OR]], <i64 -1, i64 -1> 791 792 /* vec_or */ 793 res_vsll = vec_or(vsll, vsll); 794// CHECK: or <2 x i64> 795// CHECK-LE: or <2 x i64> 796 797 res_vsll = vec_or(vbll, vsll); 798// CHECK: or <2 x i64> 799// CHECK-LE: or <2 x i64> 800 801 res_vsll = vec_or(vsll, vbll); 802// CHECK: or <2 x i64> 803// CHECK-LE: or <2 x i64> 804 805 res_vull = vec_or(vull, vull); 806// CHECK: or <2 x i64> 807// CHECK-LE: or <2 x i64> 808 809 res_vull = vec_or(vbll, vull); 810// CHECK: or <2 x i64> 811// CHECK-LE: or <2 x i64> 812 813 res_vull = vec_or(vull, vbll); 814// CHECK: or <2 x i64> 815// CHECK-LE: or <2 x i64> 816 817 res_vbll = vec_or(vbll, vbll); 818// CHECK: or <2 x i64> 819// CHECK-LE: or <2 x i64> 820 821 res_vd = vec_or(vd, vd); 822// CHECK: bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 823// CHECK: or <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 824// CHECK-LE: bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 825// CHECK-LE: or <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 826 827 res_vd = vec_or(vbll, vd); 828// CHECK: [[T1:%.+]] = bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 829// CHECK: [[T2:%.+]] = or <2 x i64> %{{[0-9]+}}, [[T1]] 830// CHECK: bitcast <2 x i64> [[T2]] to <2 x double> 831// CHECK-LE: [[T1:%.+]] = bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 832// CHECK-LE: [[T2:%.+]] = or <2 x i64> %{{[0-9]+}}, [[T1]] 833// CHECK-LE: bitcast <2 x i64> [[T2]] to <2 x double> 834 835 res_vd = vec_or(vd, vbll); 836// CHECK: [[T1:%.+]] = bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 837// CHECK: [[T2:%.+]] = or <2 x i64> [[T1]], %{{[0-9]+}} 838// CHECK: bitcast <2 x i64> [[T2]] to <2 x double> 839// CHECK-LE: [[T1:%.+]] = bitcast <2 x double> %{{[0-9]+}} to <2 x i64> 840// CHECK-LE: [[T2:%.+]] = or <2 x i64> [[T1]], %{{[0-9]+}} 841// CHECK-LE: bitcast <2 x i64> [[T2]] to <2 x double> 842 843 res_vf = vec_re(vf); 844// CHECK: call <4 x float> @llvm.ppc.vsx.xvresp(<4 x float> 845// CHECK-LE: call <4 x float> @llvm.ppc.vsx.xvresp(<4 x float> 846 847 res_vd = vec_re(vd); 848// CHECK: call <2 x double> @llvm.ppc.vsx.xvredp(<2 x double> 849// CHECK-LE: call <2 x double> @llvm.ppc.vsx.xvredp(<2 x double> 850 851 res_vf = vec_rint(vf); 852// CHECK: call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %{{[0-9]+}}) 853// CHECK-LE: call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %{{[0-9]+}}) 854 855 res_vd = vec_rint(vd); 856// CHECK: call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %{{[0-9]+}}) 857// CHECK-LE: call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %{{[0-9]+}}) 858 859 res_vf = vec_rsqrte(vf); 860// CHECK: call <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float> %{{[0-9]+}}) 861// CHECK-LE: call <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float> %{{[0-9]+}}) 862 863 res_vd = vec_rsqrte(vd); 864// CHECK: call <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double> %{{[0-9]+}}) 865// CHECK-LE: call <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double> %{{[0-9]+}}) 866 867 dummy(); 868// CHECK: call void @dummy() 869// CHECK-LE: call void @dummy() 870 871 res_vf = vec_sel(vd, vd, vbll); 872// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> 873// CHECK: and <2 x i64> %{{[0-9]+}}, 874// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 875// CHECK: or <2 x i64> 876// CHECK: bitcast <2 x i64> %{{[0-9]+}} to <2 x double> 877// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> 878// CHECK-LE: and <2 x i64> %{{[0-9]+}}, 879// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 880// CHECK-LE: or <2 x i64> 881// CHECK-LE: bitcast <2 x i64> %{{[0-9]+}} to <2 x double> 882 883 dummy(); 884// CHECK: call void @dummy() 885// CHECK-LE: call void @dummy() 886 887 res_vd = vec_sel(vd, vd, vull); 888// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> 889// CHECK: and <2 x i64> %{{[0-9]+}}, 890// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 891// CHECK: or <2 x i64> 892// CHECK: bitcast <2 x i64> %{{[0-9]+}} to <2 x double> 893// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> 894// CHECK-LE: and <2 x i64> %{{[0-9]+}}, 895// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 896// CHECK-LE: or <2 x i64> 897// CHECK-LE: bitcast <2 x i64> %{{[0-9]+}} to <2 x double> 898 899 res_vf = vec_sqrt(vf); 900// CHECK: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %{{[0-9]+}}) 901// CHECK-LE: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %{{[0-9]+}}) 902 903 res_vd = vec_sqrt(vd); 904// CHECK: call <2 x double> @llvm.sqrt.v2f64(<2 x double> %{{[0-9]+}}) 905// CHECK-LE: call <2 x double> @llvm.sqrt.v2f64(<2 x double> %{{[0-9]+}}) 906 907 res_vd = vec_sub(vd, vd); 908// CHECK: fsub <2 x double> %{{[0-9]+}}, %{{[0-9]+}} 909// CHECK-LE: fsub <2 x double> %{{[0-9]+}}, %{{[0-9]+}} 910 911 res_vf = vec_trunc(vf); 912// CHECK: call <4 x float> @llvm.trunc.v4f32(<4 x float> %{{[0-9]+}}) 913// CHECK-LE: call <4 x float> @llvm.trunc.v4f32(<4 x float> %{{[0-9]+}}) 914 915 res_vd = vec_trunc(vd); 916// CHECK: call <2 x double> @llvm.trunc.v2f64(<2 x double> %{{[0-9]+}}) 917// CHECK-LE: call <2 x double> @llvm.trunc.v2f64(<2 x double> %{{[0-9]+}}) 918 919 /* vec_vor */ 920 res_vsll = vec_vor(vsll, vsll); 921// CHECK: or <2 x i64> 922// CHECK-LE: or <2 x i64> 923 924 res_vsll = vec_vor(vbll, vsll); 925// CHECK: or <2 x i64> 926// CHECK-LE: or <2 x i64> 927 928 res_vsll = vec_vor(vsll, vbll); 929// CHECK: or <2 x i64> 930// CHECK-LE: or <2 x i64> 931 932 res_vull = vec_vor(vull, vull); 933// CHECK: or <2 x i64> 934// CHECK-LE: or <2 x i64> 935 936 res_vull = vec_vor(vbll, vull); 937// CHECK: or <2 x i64> 938// CHECK-LE: or <2 x i64> 939 940 res_vull = vec_vor(vull, vbll); 941// CHECK: or <2 x i64> 942// CHECK-LE: or <2 x i64> 943 944 res_vbll = vec_vor(vbll, vbll); 945// CHECK: or <2 x i64> 946// CHECK-LE: or <2 x i64> 947 948 /* vec_xor */ 949 res_vsll = vec_xor(vsll, vsll); 950// CHECK: xor <2 x i64> 951// CHECK-LE: xor <2 x i64> 952 953 res_vsll = vec_xor(vbll, vsll); 954// CHECK: xor <2 x i64> 955// CHECK-LE: xor <2 x i64> 956 957 res_vsll = vec_xor(vsll, vbll); 958// CHECK: xor <2 x i64> 959// CHECK-LE: xor <2 x i64> 960 961 res_vull = vec_xor(vull, vull); 962// CHECK: xor <2 x i64> 963// CHECK-LE: xor <2 x i64> 964 965 res_vull = vec_xor(vbll, vull); 966// CHECK: xor <2 x i64> 967// CHECK-LE: xor <2 x i64> 968 969 res_vull = vec_xor(vull, vbll); 970// CHECK: xor <2 x i64> 971// CHECK-LE: xor <2 x i64> 972 973 res_vbll = vec_xor(vbll, vbll); 974// CHECK: xor <2 x i64> 975// CHECK-LE: xor <2 x i64> 976 977 dummy(); 978// CHECK: call void @dummy() 979// CHECK-LE: call void @dummy() 980 981 res_vd = vec_xor(vd, vd); 982// CHECK: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 983// CHECK: bitcast <2 x i64> [[X1]] to <2 x double> 984// CHECK-LE: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 985// CHECK-LE: bitcast <2 x i64> [[X1]] to <2 x double> 986 987 dummy(); 988// CHECK: call void @dummy() 989// CHECK-LE: call void @dummy() 990 991 res_vd = vec_xor(vd, vbll); 992// CHECK: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 993// CHECK: bitcast <2 x i64> [[X1]] to <2 x double> 994// CHECK-LE: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 995// CHECK-LE: bitcast <2 x i64> [[X1]] to <2 x double> 996 997 dummy(); 998// CHECK: call void @dummy() 999// CHECK-LE: call void @dummy() 1000 1001 res_vd = vec_xor(vbll, vd); 1002// CHECK: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 1003// CHECK: bitcast <2 x i64> [[X1]] to <2 x double> 1004// CHECK-LE: [[X1:%.+]] = xor <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} 1005// CHECK-LE: bitcast <2 x i64> [[X1]] to <2 x double> 1006 1007 /* vec_vxor */ 1008 res_vsll = vec_vxor(vsll, vsll); 1009// CHECK: xor <2 x i64> 1010// CHECK-LE: xor <2 x i64> 1011 1012 res_vsll = vec_vxor(vbll, vsll); 1013// CHECK: xor <2 x i64> 1014// CHECK-LE: xor <2 x i64> 1015 1016 res_vsll = vec_vxor(vsll, vbll); 1017// CHECK: xor <2 x i64> 1018// CHECK-LE: xor <2 x i64> 1019 1020 res_vull = vec_vxor(vull, vull); 1021// CHECK: xor <2 x i64> 1022// CHECK-LE: xor <2 x i64> 1023 1024 res_vull = vec_vxor(vbll, vull); 1025// CHECK: xor <2 x i64> 1026// CHECK-LE: xor <2 x i64> 1027 1028 res_vull = vec_vxor(vull, vbll); 1029// CHECK: xor <2 x i64> 1030// CHECK-LE: xor <2 x i64> 1031 1032 res_vbll = vec_vxor(vbll, vbll); 1033// CHECK: xor <2 x i64> 1034// CHECK-LE: xor <2 x i64> 1035 1036 res_vsll = vec_cts(vd, 0); 1037// CHECK: fmul <2 x double> 1038// CHECK: fptosi <2 x double> %{{.*}} to <2 x i64> 1039// CHECK-LE: fmul <2 x double> 1040// CHECK-LE: fptosi <2 x double> %{{.*}} to <2 x i64> 1041 1042 res_vsll = vec_cts(vd, 31); 1043// CHECK: fmul <2 x double> 1044// CHECK: fptosi <2 x double> %{{.*}} to <2 x i64> 1045// CHECK-LE: fmul <2 x double> 1046// CHECK-LE: fptosi <2 x double> %{{.*}} to <2 x i64> 1047 1048 res_vsll = vec_ctu(vd, 0); 1049// CHECK: fmul <2 x double> 1050// CHECK: fptoui <2 x double> %{{.*}} to <2 x i64> 1051// CHECK-LE: fmul <2 x double> 1052// CHECK-LE: fptoui <2 x double> %{{.*}} to <2 x i64> 1053 1054 res_vsll = vec_ctu(vd, 31); 1055// CHECK: fmul <2 x double> 1056// CHECK: fptoui <2 x double> %{{.*}} to <2 x i64> 1057// CHECK-LE: fmul <2 x double> 1058// CHECK-LE: fptoui <2 x double> %{{.*}} to <2 x i64> 1059 1060 res_vd = vec_ctf(vsll, 0); 1061// CHECK: sitofp <2 x i64> %{{.*}} to <2 x double> 1062// CHECK: fmul <2 x double> 1063// CHECK-LE: sitofp <2 x i64> %{{.*}} to <2 x double> 1064// CHECK-LE: fmul <2 x double> 1065 1066 res_vd = vec_ctf(vsll, 31); 1067// CHECK: sitofp <2 x i64> %{{.*}} to <2 x double> 1068// CHECK: fmul <2 x double> 1069// CHECK-LE: sitofp <2 x i64> %{{.*}} to <2 x double> 1070// CHECK-LE: fmul <2 x double> 1071 1072 res_vd = vec_ctf(vull, 0); 1073// CHECK: uitofp <2 x i64> %{{.*}} to <2 x double> 1074// CHECK: fmul <2 x double> 1075// CHECK-LE: uitofp <2 x i64> %{{.*}} to <2 x double> 1076// CHECK-LE: fmul <2 x double> 1077 1078 res_vd = vec_ctf(vull, 31); 1079// CHECK: uitofp <2 x i64> %{{.*}} to <2 x double> 1080// CHECK: fmul <2 x double> 1081// CHECK-LE: uitofp <2 x i64> %{{.*}} to <2 x double> 1082// CHECK-LE: fmul <2 x double> 1083} 1084