1c91ee5b5642fcc4969150f73d5f6848f88bf1638flim/* Copyright (c) 2014, Cisco Systems, INC
2c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   Written by XiangMingZhu WeiZhou MinPeng YanWang
3c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
4c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   Redistribution and use in source and binary forms, with or without
5c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   modification, are permitted provided that the following conditions
6c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   are met:
7c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
8c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   - Redistributions of source code must retain the above copyright
9c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   notice, this list of conditions and the following disclaimer.
10c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
11c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   - Redistributions in binary form must reproduce the above copyright
12c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   notice, this list of conditions and the following disclaimer in the
13c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   documentation and/or other materials provided with the distribution.
14c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
15c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
19c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25c91ee5b5642fcc4969150f73d5f6848f88bf1638flim   SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26c91ee5b5642fcc4969150f73d5f6848f88bf1638flim*/
27c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
28c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#ifndef SIGPROC_FIX_SSE_H
29c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#define SIGPROC_FIX_SSE_H
30c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
31c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#ifdef HAVE_CONFIG_H
32c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#include "config.h"
33c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#endif
34c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
35c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#if defined(OPUS_X86_MAY_HAVE_SSE4_1)
36c91ee5b5642fcc4969150f73d5f6848f88bf1638flimvoid silk_burg_modified_sse4_1(
37c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int32                  *res_nrg,           /* O    Residual energy                                             */
38c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int                    *res_nrg_Q,         /* O    Residual energy Q value                                     */
39c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int32                  A_Q16[],            /* O    Prediction coefficients (length order)                      */
40c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int16            x[],                /* I    Input signal, length: nb_subfr * ( D + subfr_length )       */
41c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int32            minInvGain_Q30,     /* I    Inverse of max prediction gain                              */
42c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              subfr_length,       /* I    Input signal subframe length (incl. D preceding samples)    */
43c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              nb_subfr,           /* I    Number of subframes stacked in x                            */
44c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              D,                  /* I    Order                                                       */
45c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    int                         arch                /* I    Run-time architecture                                       */
46c91ee5b5642fcc4969150f73d5f6848f88bf1638flim);
47c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
48c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#if defined(OPUS_X86_PRESUME_SSE4_1)
49c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#define silk_burg_modified(res_nrg, res_nrg_Q, A_Q16, x, minInvGain_Q30, subfr_length, nb_subfr, D, arch) \
50c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    ((void)(arch), silk_burg_modified_sse4_1(res_nrg, res_nrg_Q, A_Q16, x, minInvGain_Q30, subfr_length, nb_subfr, D, arch))
51c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
52c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#else
53c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
54c91ee5b5642fcc4969150f73d5f6848f88bf1638flimextern void (*const SILK_BURG_MODIFIED_IMPL[OPUS_ARCHMASK + 1])(
55c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int32                  *res_nrg,           /* O    Residual energy                                             */
56c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int                    *res_nrg_Q,         /* O    Residual energy Q value                                     */
57c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    opus_int32                  A_Q16[],            /* O    Prediction coefficients (length order)                      */
58c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int16            x[],                /* I    Input signal, length: nb_subfr * ( D + subfr_length )       */
59c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int32            minInvGain_Q30,     /* I    Inverse of max prediction gain                              */
60c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              subfr_length,       /* I    Input signal subframe length (incl. D preceding samples)    */
61c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              nb_subfr,           /* I    Number of subframes stacked in x                            */
62c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int              D,                  /* I    Order                                                       */
63c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    int                         arch                /* I    Run-time architecture                                       */);
64c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
65c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#  define silk_burg_modified(res_nrg, res_nrg_Q, A_Q16, x, minInvGain_Q30, subfr_length, nb_subfr, D, arch) \
66c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    ((*SILK_BURG_MODIFIED_IMPL[(arch) & OPUS_ARCHMASK])(res_nrg, res_nrg_Q, A_Q16, x, minInvGain_Q30, subfr_length, nb_subfr, D, arch))
67c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
68c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#endif
69c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
70c91ee5b5642fcc4969150f73d5f6848f88bf1638flimopus_int64 silk_inner_prod16_aligned_64_sse4_1(
71c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int16 *inVec1,
72c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int16 *inVec2,
73c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    const opus_int   len
74c91ee5b5642fcc4969150f73d5f6848f88bf1638flim);
75c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
76c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
77c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#if defined(OPUS_X86_PRESUME_SSE4_1)
78c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
79c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#define silk_inner_prod16_aligned_64(inVec1, inVec2, len, arch) \
80c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    ((void)(arch),silk_inner_prod16_aligned_64_sse4_1(inVec1, inVec2, len))
81c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
82c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#else
83c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
84c91ee5b5642fcc4969150f73d5f6848f88bf1638flimextern opus_int64 (*const SILK_INNER_PROD16_ALIGNED_64_IMPL[OPUS_ARCHMASK + 1])(
85c91ee5b5642fcc4969150f73d5f6848f88bf1638flim                    const opus_int16 *inVec1,
86c91ee5b5642fcc4969150f73d5f6848f88bf1638flim                    const opus_int16 *inVec2,
87c91ee5b5642fcc4969150f73d5f6848f88bf1638flim                    const opus_int   len);
88c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
89c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#  define silk_inner_prod16_aligned_64(inVec1, inVec2, len, arch) \
90c91ee5b5642fcc4969150f73d5f6848f88bf1638flim    ((*SILK_INNER_PROD16_ALIGNED_64_IMPL[(arch) & OPUS_ARCHMASK])(inVec1, inVec2, len))
91c91ee5b5642fcc4969150f73d5f6848f88bf1638flim
92c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#endif
93c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#endif
94c91ee5b5642fcc4969150f73d5f6848f88bf1638flim#endif
95