1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief Interface definition for R600RegisterInfo 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 15de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#ifndef LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H 16de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#define LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPURegisterInfo.h" 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardnamespace llvm { 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 22c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hinesclass AMDGPUSubtarget; 23f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 24de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainarstruct R600RegisterInfo final : public AMDGPURegisterInfo { 2576fc2d077f955174c14e658bf179620ef49dd792Vincent Lejeune RegClassWeight RCW; 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 274c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar R600RegisterInfo(); 28f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 29dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BitVector getReservedRegs(const MachineFunction &MF) const override; 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 31f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// \brief get the HW encoding for a register's channel. 32f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned getHWRegChan(unsigned reg) const; 33f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 34de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar unsigned getHWRegIndex(unsigned Reg) const; 35a2b4eb6d15a13de257319ac6231b5ab622cd02b1Tom Stellard 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// \brief get the register class of the specified type to use in the 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// CFGStructurizer 38f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar const TargetRegisterClass *getCFGStructurizerRegClass(MVT VT) const; 39f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 40dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const RegClassWeight & 41dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getRegClassWeight(const TargetRegisterClass *RC) const override; 4276fc2d077f955174c14e658bf179620ef49dd792Vincent Lejeune 43de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar // \returns true if \p Reg can be defined in one ALU clause and used in 44de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar // another. 45dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isPhysRegLiveAcrossClauses(unsigned Reg) const; 46de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 47de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, 48de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar unsigned FIOperandNum, 49de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar RegScavenger *RS = nullptr) const override; 50f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard}; 51f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 52f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} // End namespace llvm 53f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 5437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#endif 55