ARMTargetMachine.cpp revision ff7a562751604a9fe13efc75bd59622244b54d35
1//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "ARMTargetMachine.h" 14#include "ARMMCAsmInfo.h" 15#include "ARMFrameInfo.h" 16#include "ARM.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/Passes.h" 19#include "llvm/Support/FormattedStream.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetRegistry.h" 22using namespace llvm; 23 24static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { 25 Triple TheTriple(TT); 26 switch (TheTriple.getOS()) { 27 case Triple::Darwin: 28 return new ARMMCAsmInfoDarwin(); 29 default: 30 return new ARMELFMCAsmInfo(); 31 } 32} 33 34 35extern "C" void LLVMInitializeARMTarget() { 36 // Register the target. 37 RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget); 38 RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget); 39 40 // Register the target asm info. 41 RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo); 42 RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo); 43} 44 45/// TargetMachine ctor - Create an ARM architecture model. 46/// 47ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, 48 const std::string &TT, 49 const std::string &FS, 50 bool isThumb) 51 : LLVMTargetMachine(T, TT), 52 Subtarget(TT, FS, isThumb), 53 FrameInfo(Subtarget), 54 JITInfo(), 55 InstrItins(Subtarget.getInstrItineraryData()) { 56 DefRelocModel = getRelocationModel(); 57} 58 59ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT, 60 const std::string &FS) 61 : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget), 62 DataLayout(Subtarget.isAPCS_ABI() ? 63 std::string("e-p:32:32-f64:32:32-i64:32:32-n32") : 64 std::string("e-p:32:32-f64:64:64-i64:64:64-n32")), 65 TLInfo(*this), 66 TSInfo(*this) { 67} 68 69ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT, 70 const std::string &FS) 71 : ARMBaseTargetMachine(T, TT, FS, true), 72 InstrInfo(Subtarget.hasThumb2() 73 ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget)) 74 : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), 75 DataLayout(Subtarget.isAPCS_ABI() ? 76 std::string("e-p:32:32-f64:32:32-i64:32:32-" 77 "i16:16:32-i8:8:32-i1:8:32-a:0:32-n32") : 78 std::string("e-p:32:32-f64:64:64-i64:64:64-" 79 "i16:16:32-i8:8:32-i1:8:32-a:0:32-n32")), 80 TLInfo(*this), 81 TSInfo(*this) { 82} 83 84 85 86// Pass Pipeline Configuration 87bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM, 88 CodeGenOpt::Level OptLevel) { 89 PM.add(createARMISelDag(*this, OptLevel)); 90 return false; 91} 92 93bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM, 94 CodeGenOpt::Level OptLevel) { 95 if (Subtarget.hasNEON()) 96 PM.add(createNEONPreAllocPass()); 97 98 // FIXME: temporarily disabling load / store optimization pass for Thumb1. 99 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only()) 100 PM.add(createARMLoadStoreOptimizationPass(true)); 101 return true; 102} 103 104bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM, 105 CodeGenOpt::Level OptLevel) { 106 // FIXME: temporarily disabling load / store optimization pass for Thumb1. 107 if (OptLevel != CodeGenOpt::None) { 108 if (!Subtarget.isThumb1Only()) 109 PM.add(createARMLoadStoreOptimizationPass()); 110 if (Subtarget.hasNEON()) 111 PM.add(createNEONMoveFixPass()); 112 } 113 114 // Expand some pseudo instructions into multiple instructions to allow 115 // proper scheduling. 116 PM.add(createARMExpandPseudoPass()); 117 118 return true; 119} 120 121bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM, 122 CodeGenOpt::Level OptLevel) { 123 // FIXME: temporarily disabling load / store optimization pass for Thumb1. 124 if (OptLevel != CodeGenOpt::None) { 125 if (!Subtarget.isThumb1Only()) 126 PM.add(createIfConverterPass()); 127 } 128 129 if (Subtarget.isThumb2()) { 130 PM.add(createThumb2ITBlockPass()); 131 PM.add(createThumb2SizeReductionPass()); 132 } 133 134 PM.add(createARMConstantIslandPass()); 135 return true; 136} 137 138bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, 139 CodeGenOpt::Level OptLevel, 140 JITCodeEmitter &JCE) { 141 // FIXME: Move this to TargetJITInfo! 142 if (DefRelocModel == Reloc::Default) 143 setRelocationModel(Reloc::Static); 144 145 // Machine code emitter pass for ARM. 146 PM.add(createARMJITCodeEmitterPass(*this, JCE)); 147 return false; 148} 149