1c5707112e7635d1dd2f2cc9c4f42e79a51302ccaJia Liu//===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax ------===// 2794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// 3794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// The LLVM Compiler Infrastructure 4794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// 5794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// This file is distributed under the University of Illinois Open Source 6794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// License. See LICENSE.TXT for details. 7794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// 8794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka//===----------------------------------------------------------------------===// 9794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// 10794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// This class prints an Mips MCInst to a .s file. 11794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka// 12794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka//===----------------------------------------------------------------------===// 13794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 14794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka#include "MipsInstPrinter.h" 1536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "MCTargetDesc/MipsMCExpr.h" 16a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka#include "MipsInstrInfo.h" 17ce1a538ab5b7ae7e0ed48d18c02571280fe105aaBruno Cardoso Lopes#include "llvm/ADT/StringExtras.h" 18794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka#include "llvm/MC/MCExpr.h" 19794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka#include "llvm/MC/MCInst.h" 207c0b3c1fb6395475e262d66ee403645f0c67dee2Craig Topper#include "llvm/MC/MCInstrInfo.h" 21ce1a538ab5b7ae7e0ed48d18c02571280fe105aaBruno Cardoso Lopes#include "llvm/MC/MCSymbol.h" 2270629abe31ec9737766f47611e72b422f6d7d129Benjamin Kramer#include "llvm/Support/ErrorHandling.h" 23794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka#include "llvm/Support/raw_ostream.h" 24794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakausing namespace llvm; 25794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 26dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#define DEBUG_TYPE "asm-printer" 27dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2837ef65b9c1b93c386d13089d9ace6a1cc00e82dcJack Carter#define PRINT_ALIAS_INSTR 29794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka#include "MipsGenAsmWriter.inc" 30794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 319b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanakatemplate<unsigned R> 329b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanakastatic bool isReg(const MCInst &MI, unsigned OpNo) { 339b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka assert(MI.getOperand(OpNo).isReg() && "Register operand expected."); 349b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka return MI.getOperand(OpNo).getReg() == R; 359b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka} 369b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka 37794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakaconst char* Mips::MipsFCCToString(Mips::CondCode CC) { 38794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka switch (CC) { 39794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_F: 40794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_T: return "f"; 41794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_UN: 42794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OR: return "un"; 43794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OEQ: 44794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_UNE: return "eq"; 45794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_UEQ: 46794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_ONE: return "ueq"; 47794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OLT: 48794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_UGE: return "olt"; 49794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_ULT: 50794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OGE: return "ult"; 51794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OLE: 52794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_UGT: return "ole"; 53794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_ULE: 54794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_OGT: return "ule"; 55794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_SF: 56794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_ST: return "sf"; 57794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NGLE: 58794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_GLE: return "ngle"; 59794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_SEQ: 60794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_SNE: return "seq"; 61794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NGL: 62794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_GL: return "ngl"; 63794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_LT: 64794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NLT: return "lt"; 65794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NGE: 66794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_GE: return "nge"; 67794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_LE: 68794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NLE: return "le"; 69794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_NGT: 70794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka case FCOND_GT: return "ngt"; 71794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka } 7270629abe31ec9737766f47611e72b422f6d7d129Benjamin Kramer llvm_unreachable("Impossible condition code!"); 73794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 74794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 75794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakavoid MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 76590853667345d6fb191764b9d0bd2ff13589e3a3Benjamin Kramer OS << '$' << StringRef(getRegisterName(RegNo)).lower(); 77794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 78794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 7998c5ddabca1debf935a07d14d0cbc9732374bdb8Owen Andersonvoid MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O, 800c7f116bb6950ef819323d855415b2f2b0aad987Pirama Arumuga Nainar StringRef Annot, const MCSubtargetInfo &STI) { 81a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka switch (MI->getOpcode()) { 82a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka default: 83a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka break; 84a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka case Mips::RDHWR: 85a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka case Mips::RDHWR64: 86a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka O << "\t.set\tpush\n"; 87a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka O << "\t.set\tmips32r2\n"; 8836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines break; 8936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines case Mips::Save16: 9036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\tsave\t"; 9136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines printSaveRestore(MI, O); 9236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << " # 16 bit inst\n"; 9336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 9436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines case Mips::SaveX16: 9536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\tsave\t"; 9636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines printSaveRestore(MI, O); 9736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\n"; 9836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 9936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines case Mips::Restore16: 10036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\trestore\t"; 10136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines printSaveRestore(MI, O); 10236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << " # 16 bit inst\n"; 10336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 10436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines case Mips::RestoreX16: 10536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\trestore\t"; 10636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines printSaveRestore(MI, O); 10736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines O << "\n"; 10836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 109a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka } 110a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka 11137ef65b9c1b93c386d13089d9ace6a1cc00e82dcJack Carter // Try to print any aliases first. 1129b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka if (!printAliasInstr(MI, O) && !printAlias(*MI, O)) 11337ef65b9c1b93c386d13089d9ace6a1cc00e82dcJack Carter printInstruction(MI, O); 114519020adf1cf57e2e93cc4fd49c385c47f7ff0f7Owen Anderson printAnnotation(O, Annot); 115a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka 116a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka switch (MI->getOpcode()) { 117a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka default: 118a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka break; 119a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka case Mips::RDHWR: 120a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka case Mips::RDHWR64: 121a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka O << "\n\t.set\tpop"; 122a7e4558ec861145032865edcf56400be7558c2f8Akira Hatanaka } 123794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 124794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 125794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakavoid MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 126794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka raw_ostream &O) { 127794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka const MCOperand &Op = MI->getOperand(OpNo); 128794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka if (Op.isReg()) { 129794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka printRegName(O, Op.getReg()); 130794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka return; 131794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka } 132bb481f882093fb738d2bb15610c79364bada5496Jia Liu 133794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka if (Op.isImm()) { 134de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar O << formatImm(Op.getImm()); 135794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka return; 136794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka } 137bb481f882093fb738d2bb15610c79364bada5496Jia Liu 138794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka assert(Op.isExpr() && "unknown operand kind in printOperand"); 139de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Op.getExpr()->print(O, &MAI, true); 140794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 141794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 142de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainartemplate <unsigned Bits, unsigned Offset> 143de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainarvoid MipsInstPrinter::printUImm(const MCInst *MI, int opNum, raw_ostream &O) { 144794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka const MCOperand &MO = MI->getOperand(opNum); 145de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar if (MO.isImm()) { 146de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar uint64_t Imm = MO.getImm(); 147de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Imm -= Offset; 148de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Imm &= (1 << Bits) - 1; 149de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar Imm += Offset; 150de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar O << formatImm(Imm); 151de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar return; 152de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar } 153794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 154de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar printOperand(MI, opNum, O); 155c8a1fa77a73e7c885035421712ceba951f9024cbDaniel Sanders} 156c8a1fa77a73e7c885035421712ceba951f9024cbDaniel Sanders 157794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakavoid MipsInstPrinter:: 158794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira HatanakaprintMemOperand(const MCInst *MI, int opNum, raw_ostream &O) { 159794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka // Load/Store memory operands -- imm($reg) 160794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka // If PIC target the target is loaded as the 161794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka // pattern lw $25,%call16($28) 16237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 16337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines // opNum can be invalid if instruction had reglist as operand. 16437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines // MemOperand is always last operand of instruction (base + offset). 16537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines switch (MI->getOpcode()) { 16637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines default: 16737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines break; 16837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines case Mips::SWM32_MM: 16937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines case Mips::LWM32_MM: 170ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines case Mips::SWM16_MM: 171f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Mips::SWM16_MMR6: 172ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines case Mips::LWM16_MM: 173f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar case Mips::LWM16_MMR6: 17437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines opNum = MI->getNumOperands() - 2; 17537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines break; 17637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 17737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 178794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka printOperand(MI, opNum+1, O); 179794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka O << "("; 180794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka printOperand(MI, opNum, O); 181794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka O << ")"; 182794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 183794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 184794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakavoid MipsInstPrinter:: 185794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira HatanakaprintMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) { 186794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka // when using stack locations for not load/store instructions 187794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka // print the same way as all normal 3 operand instructions. 188794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka printOperand(MI, opNum, O); 189794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka O << ", "; 190794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka printOperand(MI, opNum+1, O); 191794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka return; 192794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 193794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka 194794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanakavoid MipsInstPrinter:: 195794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira HatanakaprintFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) { 196794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka const MCOperand& MO = MI->getOperand(opNum); 197794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka O << MipsFCCToString((Mips::CondCode)MO.getImm()); 198794bf17cbe0bac301ef9e52fb4a0295bfdfe0cabAkira Hatanaka} 1999b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka 20093d995719e2459a6e9ccdb2c93a8ede8fa88c899Daniel Sandersvoid MipsInstPrinter:: 201ebe69fe11e48d322045d5949c83283927a0d790bStephen HinesprintRegisterPair(const MCInst *MI, int opNum, raw_ostream &O) { 202ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines printRegName(O, MI->getOperand(opNum).getReg()); 203ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines} 204ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 205ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesvoid MipsInstPrinter:: 20693d995719e2459a6e9ccdb2c93a8ede8fa88c899Daniel SandersprintSHFMask(const MCInst *MI, int opNum, raw_ostream &O) { 20793d995719e2459a6e9ccdb2c93a8ede8fa88c899Daniel Sanders llvm_unreachable("TODO"); 20893d995719e2459a6e9ccdb2c93a8ede8fa88c899Daniel Sanders} 20993d995719e2459a6e9ccdb2c93a8ede8fa88c899Daniel Sanders 2109b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanakabool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI, 2119b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka unsigned OpNo, raw_ostream &OS) { 2129b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka OS << "\t" << Str << "\t"; 2139b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka printOperand(&MI, OpNo, OS); 2149b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka return true; 2159b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka} 2169b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka 2179b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanakabool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI, 2189b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka unsigned OpNo0, unsigned OpNo1, 2199b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka raw_ostream &OS) { 2209b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka printAlias(Str, MI, OpNo0, OS); 2219b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka OS << ", "; 2229b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka printOperand(&MI, OpNo1, OS); 2239b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka return true; 2249b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka} 2259b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka 2269b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanakabool MipsInstPrinter::printAlias(const MCInst &MI, raw_ostream &OS) { 2279b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka switch (MI.getOpcode()) { 2289b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka case Mips::BEQ: 229ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines case Mips::BEQ_MM: 2301d04ca7987ef0abb5be07b11e3bb9c9e756a1fceAkira Hatanaka // beq $zero, $zero, $L2 => b $L2 231c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // beq $r0, $zero, $L2 => beqz $r0, $L2 232d65d2fde4eadcb40e80b361e4cf244c02dcc670bAkira Hatanaka return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) && 233d65d2fde4eadcb40e80b361e4cf244c02dcc670bAkira Hatanaka printAlias("b", MI, 2, OS)) || 234d65d2fde4eadcb40e80b361e4cf244c02dcc670bAkira Hatanaka (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS)); 2359b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka case Mips::BEQ64: 236c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // beq $r0, $zero, $L2 => beqz $r0, $L2 237c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS); 2389b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka case Mips::BNE: 239c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // bne $r0, $zero, $L2 => bnez $r0, $L2 240c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::ZERO>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 2419b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka case Mips::BNE64: 242c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // bne $r0, $zero, $L2 => bnez $r0, $L2 243c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 2448838da6587e60a248b07d4db0e874429ad4e9747Akira Hatanaka case Mips::BGEZAL: 2458838da6587e60a248b07d4db0e874429ad4e9747Akira Hatanaka // bgezal $zero, $L1 => bal $L1 2468838da6587e60a248b07d4db0e874429ad4e9747Akira Hatanaka return isReg<Mips::ZERO>(MI, 0) && printAlias("bal", MI, 1, OS); 24783d8ef133b121b7e752e7468cb1e0e5e3b636aeeAkira Hatanaka case Mips::BC1T: 248c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // bc1t $fcc0, $L1 => bc1t $L1 249c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS); 25083d8ef133b121b7e752e7468cb1e0e5e3b636aeeAkira Hatanaka case Mips::BC1F: 251c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // bc1f $fcc0, $L1 => bc1f $L1 252c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1f", MI, 1, OS); 253a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka case Mips::JALR: 254a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka // jalr $ra, $r1 => jalr $r1 255a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka return isReg<Mips::RA>(MI, 0) && printAlias("jalr", MI, 1, OS); 256a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka case Mips::JALR64: 257a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka // jalr $ra, $r1 => jalr $r1 258a1fe9ef62e18dcb30cdee62a2fad82d05791d359Akira Hatanaka return isReg<Mips::RA_64>(MI, 0) && printAlias("jalr", MI, 1, OS); 259014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka case Mips::NOR: 260d22b327b3d8fafade61fa2b4aaba5c9f3ee10d4dAkira Hatanaka case Mips::NOR_MM: 261de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar case Mips::NOR_MMR6: 262014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka // nor $r0, $r1, $zero => not $r0, $r1 263014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka return isReg<Mips::ZERO>(MI, 2) && printAlias("not", MI, 0, 1, OS); 264014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka case Mips::NOR64: 265014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka // nor $r0, $r1, $zero => not $r0, $r1 266014096e4d5e65309ca71d0e63327f5386ddf16fbAkira Hatanaka return isReg<Mips::ZERO_64>(MI, 2) && printAlias("not", MI, 0, 1, OS); 2679b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka case Mips::OR: 268c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka // or $r0, $r1, $zero => move $r0, $r1 269c0fa31d51bdb255a481a287ab6492461ba5f2458Akira Hatanaka return isReg<Mips::ZERO>(MI, 2) && printAlias("move", MI, 0, 1, OS); 2709b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka default: return false; 2719b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka } 2729b06dd6ca25fd1f8d2cf9227fdffc304c9f51564Akira Hatanaka} 27336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 27436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid MipsInstPrinter::printSaveRestore(const MCInst *MI, raw_ostream &O) { 27536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 27636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (i != 0) O << ", "; 27736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (MI->getOperand(i).isReg()) 27836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines printRegName(O, MI->getOperand(i).getReg()); 27936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines else 280de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar printUImm<16>(MI, i, O); 28136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 28236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 28336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 28437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hinesvoid MipsInstPrinter:: 28537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen HinesprintRegisterList(const MCInst *MI, int opNum, raw_ostream &O) { 28637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines // - 2 because register List is always first operand of instruction and it is 28737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines // always followed by memory operand (base + offset). 28837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines for (int i = opNum, e = MI->getNumOperands() - 2; i != e; ++i) { 28937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines if (i != opNum) 29037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines O << ", "; 29137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines printRegName(O, MI->getOperand(i).getReg()); 29237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 29337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines} 294