PPCAsmBackend.cpp revision d3022b894691017169ff0681c6bea18725330cd1
1//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "MCTargetDesc/PPCMCTargetDesc.h"
11#include "MCTargetDesc/PPCFixupKinds.h"
12#include "llvm/MC/MCAsmBackend.h"
13#include "llvm/MC/MCELFObjectWriter.h"
14#include "llvm/MC/MCFixupKindInfo.h"
15#include "llvm/MC/MCMachObjectWriter.h"
16#include "llvm/MC/MCSectionMachO.h"
17#include "llvm/MC/MCObjectWriter.h"
18#include "llvm/MC/MCValue.h"
19#include "llvm/Object/MachOFormat.h"
20#include "llvm/Support/ELF.h"
21#include "llvm/Support/ErrorHandling.h"
22#include "llvm/Support/TargetRegistry.h"
23using namespace llvm;
24
25static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
26  switch (Kind) {
27  default:
28    llvm_unreachable("Unknown fixup kind!");
29  case FK_Data_1:
30  case FK_Data_2:
31  case FK_Data_4:
32  case FK_Data_8:
33  case PPC::fixup_ppc_toc:
34    return Value;
35  case PPC::fixup_ppc_lo14:
36  case PPC::fixup_ppc_toc16_ds:
37    return (Value & 0xffff) << 2;
38  case PPC::fixup_ppc_brcond14:
39    return Value & 0xfffc;
40  case PPC::fixup_ppc_br24:
41    return Value & 0x3fffffc;
42#if 0
43  case PPC::fixup_ppc_hi16:
44    return (Value >> 16) & 0xffff;
45#endif
46  case PPC::fixup_ppc_ha16:
47    return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
48  case PPC::fixup_ppc_lo16:
49  case PPC::fixup_ppc_toc16:
50    return Value & 0xffff;
51  }
52}
53
54namespace {
55class PPCMachObjectWriter : public MCMachObjectTargetWriter {
56public:
57  PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
58                      uint32_t CPUSubtype)
59    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
60
61  void RecordRelocation(MachObjectWriter *Writer,
62                        const MCAssembler &Asm, const MCAsmLayout &Layout,
63                        const MCFragment *Fragment, const MCFixup &Fixup,
64                        MCValue Target, uint64_t &FixedValue) {
65    llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
66  }
67};
68
69class PPCAsmBackend : public MCAsmBackend {
70const Target &TheTarget;
71public:
72  PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
73
74  unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
75
76  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
77    const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
78      // name                    offset  bits  flags
79      { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
80      { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
81      { "fixup_ppc_lo16",        16,     16,   0 },
82      { "fixup_ppc_ha16",        16,     16,   0 },
83      { "fixup_ppc_lo14",        16,     14,   0 },
84      { "fixup_ppc_toc",          0,     64,   0 },
85      { "fixup_ppc_toc16",       16,     16,   0 },
86      { "fixup_ppc_toc16_ds",    16,     14,   0 }
87    };
88
89    if (Kind < FirstTargetFixupKind)
90      return MCAsmBackend::getFixupKindInfo(Kind);
91
92    assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
93           "Invalid kind!");
94    return Infos[Kind - FirstTargetFixupKind];
95  }
96
97  void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
98                  uint64_t Value) const {
99    Value = adjustFixupValue(Fixup.getKind(), Value);
100    if (!Value) return;           // Doesn't change encoding.
101
102    unsigned Offset = Fixup.getOffset();
103
104    // For each byte of the fragment that the fixup touches, mask in the bits
105    // from the fixup value. The Value has been "split up" into the appropriate
106    // bitfields above.
107    for (unsigned i = 0; i != 4; ++i)
108      Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
109  }
110
111  bool mayNeedRelaxation(const MCInst &Inst) const {
112    // FIXME.
113    return false;
114  }
115
116  bool fixupNeedsRelaxation(const MCFixup &Fixup,
117                            uint64_t Value,
118                            const MCInstFragment *DF,
119                            const MCAsmLayout &Layout) const {
120    // FIXME.
121    llvm_unreachable("relaxInstruction() unimplemented");
122  }
123
124
125  void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
126    // FIXME.
127    llvm_unreachable("relaxInstruction() unimplemented");
128  }
129
130  bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
131    // FIXME: Zero fill for now. That's not right, but at least will get the
132    // section size right.
133    for (uint64_t i = 0; i != Count; ++i)
134      OW->Write8(0);
135    return true;
136  }
137
138  unsigned getPointerSize() const {
139    StringRef Name = TheTarget.getName();
140    if (Name == "ppc64") return 8;
141    assert(Name == "ppc32" && "Unknown target name!");
142    return 4;
143  }
144};
145} // end anonymous namespace
146
147
148// FIXME: This should be in a separate file.
149namespace {
150  class DarwinPPCAsmBackend : public PPCAsmBackend {
151  public:
152    DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
153
154    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
155      bool is64 = getPointerSize() == 8;
156      return createMachObjectWriter(new PPCMachObjectWriter(
157                                      /*Is64Bit=*/is64,
158                                      (is64 ? object::mach::CTM_PowerPC64 :
159                                       object::mach::CTM_PowerPC),
160                                      object::mach::CSPPC_ALL),
161                                    OS, /*IsLittleEndian=*/false);
162    }
163
164    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
165      return false;
166    }
167  };
168
169  class ELFPPCAsmBackend : public PPCAsmBackend {
170    uint8_t OSABI;
171  public:
172    ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
173      PPCAsmBackend(T), OSABI(OSABI) { }
174
175
176    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
177      bool is64 = getPointerSize() == 8;
178      return createPPCELFObjectWriter(OS, is64, OSABI);
179    }
180
181    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
182      return false;
183    }
184  };
185
186} // end anonymous namespace
187
188
189
190
191MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
192  if (Triple(TT).isOSDarwin())
193    return new DarwinPPCAsmBackend(T);
194
195  uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
196  return new ELFPPCAsmBackend(T, OSABI);
197}
198