1//===-- TargetSubtargetInfo.cpp - General Target Information ---------------==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the general parts of a Subtarget.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Target/TargetSubtargetInfo.h"
15using namespace llvm;
16
17//---------------------------------------------------------------------------
18// TargetSubtargetInfo Class
19//
20TargetSubtargetInfo::TargetSubtargetInfo(
21    const Triple &TT, StringRef CPU, StringRef FS,
22    ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD,
23    const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR,
24    const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
25    const InstrStage *IS, const unsigned *OC, const unsigned *FP)
26    : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
27}
28
29TargetSubtargetInfo::~TargetSubtargetInfo() {}
30
31bool TargetSubtargetInfo::enableAtomicExpand() const {
32  return true;
33}
34
35bool TargetSubtargetInfo::enableMachineScheduler() const {
36  return false;
37}
38
39bool TargetSubtargetInfo::enableJoinGlobalCopies() const {
40  return enableMachineScheduler();
41}
42
43bool TargetSubtargetInfo::enableRALocalReassignment(
44    CodeGenOpt::Level OptLevel) const {
45  return true;
46}
47
48bool TargetSubtargetInfo::enablePostRAScheduler() const {
49  return getSchedModel().PostRAScheduler;
50}
51
52bool TargetSubtargetInfo::useAA() const {
53  return false;
54}
55