1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SICI -check-prefix=GCN -check-prefix=FUNC  %s
2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=SICI -check-prefix=CIVI -check-prefix=GCN -check-prefix=FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=CIVI -check-prefix=GCN -check-prefix=FUNC %s
4
5; FUNC-LABEL: {{^}}lds_atomic_cmpxchg_ret_i32_offset:
6; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
7; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
8; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
9; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
10; GCN: v_mov_b32_e32 [[VCMP:v[0-9]+]], 7
11; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
12; GCN-DAG: v_mov_b32_e32 [[VSWAP:v[0-9]+]], [[SWAP]]
13; GCN: ds_cmpst_rtn_b32 [[RESULT:v[0-9]+]], [[VPTR]], [[VCMP]], [[VSWAP]] offset:16
14; GCN: s_endpgm
15define void @lds_atomic_cmpxchg_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %swap) nounwind {
16  %gep = getelementptr i32, i32 addrspace(3)* %ptr, i32 4
17  %pair = cmpxchg i32 addrspace(3)* %gep, i32 7, i32 %swap seq_cst monotonic
18  %result = extractvalue { i32, i1 } %pair, 0
19  store i32 %result, i32 addrspace(1)* %out, align 4
20  ret void
21}
22
23; FUNC-LABEL: {{^}}lds_atomic_cmpxchg_ret_i64_offset:
24; SICI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
25; SICI-DAG: s_load_dwordx2 s{{\[}}[[LOSWAP:[0-9]+]]:[[HISWAP:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
26; VI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
27; VI-DAG: s_load_dwordx2 s{{\[}}[[LOSWAP:[0-9]+]]:[[HISWAP:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x34
28; GCN-DAG: v_mov_b32_e32 v[[LOVCMP:[0-9]+]], 7
29; GCN-DAG: v_mov_b32_e32 v[[HIVCMP:[0-9]+]], 0
30; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
31; GCN-DAG: v_mov_b32_e32 v[[LOSWAPV:[0-9]+]], s[[LOSWAP]]
32; GCN-DAG: v_mov_b32_e32 v[[HISWAPV:[0-9]+]], s[[HISWAP]]
33; GCN: ds_cmpst_rtn_b64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[VPTR]], v{{\[}}[[LOVCMP]]:[[HIVCMP]]{{\]}}, v{{\[}}[[LOSWAPV]]:[[HISWAPV]]{{\]}} offset:32
34; GCN: buffer_store_dwordx2 [[RESULT]],
35; GCN: s_endpgm
36define void @lds_atomic_cmpxchg_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr, i64 %swap) nounwind {
37  %gep = getelementptr i64, i64 addrspace(3)* %ptr, i32 4
38  %pair = cmpxchg i64 addrspace(3)* %gep, i64 7, i64 %swap seq_cst monotonic
39  %result = extractvalue { i64, i1 } %pair, 0
40  store i64 %result, i64 addrspace(1)* %out, align 8
41  ret void
42}
43
44; FUNC-LABEL: {{^}}lds_atomic_cmpxchg_ret_i32_bad_si_offset
45; SI: ds_cmpst_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
46; CIVI: ds_cmpst_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
47; GCN: s_endpgm
48define void @lds_atomic_cmpxchg_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %swap, i32 %a, i32 %b) nounwind {
49  %sub = sub i32 %a, %b
50  %add = add i32 %sub, 4
51  %gep = getelementptr i32, i32 addrspace(3)* %ptr, i32 %add
52  %pair = cmpxchg i32 addrspace(3)* %gep, i32 7, i32 %swap seq_cst monotonic
53  %result = extractvalue { i32, i1 } %pair, 0
54  store i32 %result, i32 addrspace(1)* %out, align 4
55  ret void
56}
57
58; FUNC-LABEL: {{^}}lds_atomic_cmpxchg_noret_i32_offset:
59; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
60; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xa
61; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
62; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x28
63; GCN-DAG: v_mov_b32_e32 [[VCMP:v[0-9]+]], 7
64; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
65; GCN-DAG: v_mov_b32_e32 [[VSWAP:v[0-9]+]], [[SWAP]]
66; GCN: ds_cmpst_b32 [[VPTR]], [[VCMP]], [[VSWAP]] offset:16
67; GCN: s_endpgm
68define void @lds_atomic_cmpxchg_noret_i32_offset(i32 addrspace(3)* %ptr, i32 %swap) nounwind {
69  %gep = getelementptr i32, i32 addrspace(3)* %ptr, i32 4
70  %pair = cmpxchg i32 addrspace(3)* %gep, i32 7, i32 %swap seq_cst monotonic
71  %result = extractvalue { i32, i1 } %pair, 0
72  ret void
73}
74
75; FUNC-LABEL: {{^}}lds_atomic_cmpxchg_noret_i64_offset:
76; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
77; SICI: s_load_dwordx2 s{{\[}}[[LOSWAP:[0-9]+]]:[[HISWAP:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xb
78; VI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
79; VI-DAG: s_load_dwordx2 s{{\[}}[[LOSWAP:[0-9]+]]:[[HISWAP:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x2c
80; GCN-DAG: v_mov_b32_e32 v[[LOVCMP:[0-9]+]], 7
81; GCN-DAG: v_mov_b32_e32 v[[HIVCMP:[0-9]+]], 0
82; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
83; GCN-DAG: v_mov_b32_e32 v[[LOSWAPV:[0-9]+]], s[[LOSWAP]]
84; GCN-DAG: v_mov_b32_e32 v[[HISWAPV:[0-9]+]], s[[HISWAP]]
85; GCN: ds_cmpst_b64 [[VPTR]], v{{\[}}[[LOVCMP]]:[[HIVCMP]]{{\]}}, v{{\[}}[[LOSWAPV]]:[[HISWAPV]]{{\]}} offset:32
86; GCN: s_endpgm
87define void @lds_atomic_cmpxchg_noret_i64_offset(i64 addrspace(3)* %ptr, i64 %swap) nounwind {
88  %gep = getelementptr i64, i64 addrspace(3)* %ptr, i32 4
89  %pair = cmpxchg i64 addrspace(3)* %gep, i64 7, i64 %swap seq_cst monotonic
90  %result = extractvalue { i64, i1 } %pair, 0
91  ret void
92}
93