13112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===// 23da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman// 301d45827a1e512f3b19ba857772bf02baa3c0c4eJohn Criswell// The LLVM Compiler Infrastructure 401d45827a1e512f3b19ba857772bf02baa3c0c4eJohn Criswell// 53060910e290949a9ac5eda8726d030790c4d60ffChris Lattner// This file is distributed under the University of Illinois Open Source 63060910e290949a9ac5eda8726d030790c4d60ffChris Lattner// License. See LICENSE.TXT for details. 73da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman// 801d45827a1e512f3b19ba857772bf02baa3c0c4eJohn Criswell//===----------------------------------------------------------------------===// 93112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner// 103112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner// This tablegen backend is responsible for emitting a description of a target 113112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner// register file for a code generator. It uses instances of the Register, 123112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner// RegisterAliases, and RegisterClass classes to gather this information. 133112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner// 143112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner//===----------------------------------------------------------------------===// 153112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner 1626693113201f4c9d441678e50d96f38d3288798eChris Lattner#include "CodeGenRegisters.h" 176f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen#include "CodeGenTarget.h" 180d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen#include "SequenceToOffsetTable.h" 19de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/ADT/ArrayRef.h" 209df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer#include "llvm/ADT/BitVector.h" 21de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/ADT/SetVector.h" 22de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/ADT/SmallVector.h" 23de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/ADT/SparseBitVector.h" 24551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/ADT/STLExtras.h" 25bfb4327baa5bbab78f0da4c8c069482878660a04Jim Grosbach#include "llvm/ADT/Twine.h" 26de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/CodeGen/MachineValueType.h" 27de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/Support/Casting.h" 284091b059ec9568228f50fd67a1a81ee35c234787Jakob Stoklund Olesen#include "llvm/Support/Format.h" 29de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/Support/raw_ostream.h" 306f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen#include "llvm/TableGen/Error.h" 316f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen#include "llvm/TableGen/Record.h" 32de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include "llvm/TableGen/SetTheory.h" 336f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen#include "llvm/TableGen/TableGenBackend.h" 34cc51c3195374645b18918458bac02e85b8c27db6Chuck Rose III#include <algorithm> 35de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <cassert> 36de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <cstddef> 37de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <cstdint> 38de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <deque> 39de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <iterator> 401a55180238dbcf11113f610aea010447e51f595bDaniel Dunbar#include <set> 41de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar#include <string> 426f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen#include <vector> 43de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 442082ebe8b3a5db302748828ab4f79a36d239c1d9Chris Lattnerusing namespace llvm; 45d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 466f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesennamespace { 47de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 486f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesenclass RegisterInfoEmitter { 496f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen RecordKeeper &Records; 50de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 516f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesenpublic: 526f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen RegisterInfoEmitter(RecordKeeper &R) : Records(R) {} 536f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 546f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen // runEnums - Print out enum values for all of the registers. 556f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 566f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 576f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen // runMCDesc - Print out MC register descriptions. 586f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 596f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 606f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen // runTargetHeader - Emit a header fragment for the register info emitter. 616f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void runTargetHeader(raw_ostream &o, CodeGenTarget &Target, 626f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen CodeGenRegBank &Bank); 636f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 646f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen // runTargetDesc - Output the target register and register file descriptions. 656f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void runTargetDesc(raw_ostream &o, CodeGenTarget &Target, 666f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen CodeGenRegBank &Bank); 676f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 686f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen // run - Output the register file description. 696f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void run(raw_ostream &o); 706f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 716f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesenprivate: 72ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines void EmitRegMapping(raw_ostream &o, const std::deque<CodeGenRegister> &Regs, 73ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines bool isCtor); 746f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void EmitRegMappingTables(raw_ostream &o, 75ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const std::deque<CodeGenRegister> &Regs, 766f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen bool isCtor); 776f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen void EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, 786f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen const std::string &ClassName); 79ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen void emitComposeSubRegIndices(raw_ostream &OS, CodeGenRegBank &RegBank, 80ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen const std::string &ClassName); 81ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines void emitComposeSubRegIndexLaneMask(raw_ostream &OS, CodeGenRegBank &RegBank, 82ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const std::string &ClassName); 836f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen}; 84de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 85de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar} // end anonymous namespace 866f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 8754d156d33324b7715453993f21684915a28e310aChris Lattner// runEnums - Print out enum values for all of the registers. 88723fc11f91240e267dd748b467b43b6c00498e4bJim Grosbachvoid RegisterInfoEmitter::runEnums(raw_ostream &OS, 89723fc11f91240e267dd748b467b43b6c00498e4bJim Grosbach CodeGenTarget &Target, CodeGenRegBank &Bank) { 90ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &Registers = Bank.getRegisters(); 9154d156d33324b7715453993f21684915a28e310aChris Lattner 925bd9e0dd028202f94391a394a12a6b8c69ee52e3Jim Grosbach // Register enums are stored as uint16_t in the tables. Make sure we'll fit. 93904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper assert(Registers.size() <= 0xffff && "Too many regs to fit in tables"); 94904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper 95ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::string Namespace = 96ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Registers.front().TheDef->getValueAsString("Namespace"); 9754d156d33324b7715453993f21684915a28e310aChris Lattner 986f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen emitSourceFileHeader("Target Register Enum Values", OS); 9973f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 10073f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "\n#ifdef GET_REGINFO_ENUM\n"; 101de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "#undef GET_REGINFO_ENUM\n\n"; 10273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 1032c38413b3f5420f45f2f8220b21862246d446dd0Chris Lattner OS << "namespace llvm {\n\n"; 10454d156d33324b7715453993f21684915a28e310aChris Lattner 1055de728cfe1a922ac9b13546dca94526b2fa693b6Evan Cheng OS << "class MCRegisterClass;\n" 1061a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer << "extern const MCRegisterClass " << Namespace 1071a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer << "MCRegisterClasses[];\n\n"; 1085de728cfe1a922ac9b13546dca94526b2fa693b6Evan Cheng 10954d156d33324b7715453993f21684915a28e310aChris Lattner if (!Namespace.empty()) 11054d156d33324b7715453993f21684915a28e310aChris Lattner OS << "namespace " << Namespace << " {\n"; 11173ea7bf4509663267317ec3911aac00ca35a2f2cJakob Stoklund Olesen OS << "enum {\n NoRegister,\n"; 11254d156d33324b7715453993f21684915a28e310aChris Lattner 113ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Reg : Registers) 114ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " " << Reg.getName() << " = " << Reg.EnumValue << ",\n"; 115ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines assert(Registers.size() == Registers.back().EnumValue && 11617fad045cccf34822d3163ada9e70a8f4528746eJim Grosbach "Register enum value mismatch!"); 11773ea7bf4509663267317ec3911aac00ca35a2f2cJakob Stoklund Olesen OS << " NUM_TARGET_REGS \t// " << Registers.size()+1 << "\n"; 11873ea7bf4509663267317ec3911aac00ca35a2f2cJakob Stoklund Olesen OS << "};\n"; 11954d156d33324b7715453993f21684915a28e310aChris Lattner if (!Namespace.empty()) 120de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << Namespace << "\n"; 12173ea7bf4509663267317ec3911aac00ca35a2f2cJakob Stoklund Olesen 122ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &RegisterClasses = Bank.getRegClasses(); 12373f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng if (!RegisterClasses.empty()) { 124904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper 125904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper // RegisterClass enums are stored as uint16_t in the tables. 126904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper assert(RegisterClasses.size() <= 0xffff && 127904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper "Too many register classes to fit in tables"); 128904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper 129de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "\n// Register classes\n\n"; 1304987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng if (!Namespace.empty()) 1314987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << "namespace " << Namespace << " {\n"; 13273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "enum {\n"; 133ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) 134ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " " << RC.getName() << "RegClassID" 135ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " = " << RC.EnumValue << ",\n"; 13673f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "\n };\n"; 1374987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng if (!Namespace.empty()) 138de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << Namespace << "\n\n"; 1394987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng } 1404987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng 14194ee55d4b39d6506cf4e0f4e4b1c0b7fbbfeaed5Benjamin Kramer const std::vector<Record*> &RegAltNameIndices = Target.getRegAltNameIndices(); 1424987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng // If the only definition is the default NoRegAltName, we don't need to 1434987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng // emit anything. 1444987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng if (RegAltNameIndices.size() > 1) { 145de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "\n// Register alternate name indices\n\n"; 1464987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng if (!Namespace.empty()) 1474987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << "namespace " << Namespace << " {\n"; 1484987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << "enum {\n"; 1494987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng for (unsigned i = 0, e = RegAltNameIndices.size(); i != e; ++i) 1504987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << " " << RegAltNameIndices[i]->getName() << ",\t// " << i << "\n"; 1514987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << " NUM_TARGET_REG_ALT_NAMES = " << RegAltNameIndices.size() << "\n"; 1524987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng OS << "};\n"; 1534987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng if (!Namespace.empty()) 154de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << Namespace << "\n\n"; 15573f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng } 15673f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 157ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines auto &SubRegIndices = Bank.getSubRegIndices(); 1585d9651df892afb0bb4036827c327b8effe87060cJim Grosbach if (!SubRegIndices.empty()) { 159de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "\n// Subregister indices\n\n"; 160ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::string Namespace = SubRegIndices.front().getNamespace(); 1615d9651df892afb0bb4036827c327b8effe87060cJim Grosbach if (!Namespace.empty()) 1625d9651df892afb0bb4036827c327b8effe87060cJim Grosbach OS << "namespace " << Namespace << " {\n"; 1635d9651df892afb0bb4036827c327b8effe87060cJim Grosbach OS << "enum {\n NoSubRegister,\n"; 164ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned i = 0; 165ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) 166ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " " << Idx.getName() << ",\t// " << ++i << "\n"; 167c97eda2c9e34f4c491f59bbac81af2fd63fef49dJakob Stoklund Olesen OS << " NUM_TARGET_SUBREGS\n};\n"; 1685d9651df892afb0bb4036827c327b8effe87060cJim Grosbach if (!Namespace.empty()) 169de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << Namespace << "\n\n"; 1705d9651df892afb0bb4036827c327b8effe87060cJim Grosbach } 1714987033fbd8e774e67903f50a8bd20d539c4dca5Evan Cheng 172de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace llvm\n\n"; 17373f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "#endif // GET_REGINFO_ENUM\n\n"; 17454d156d33324b7715453993f21684915a28e310aChris Lattner} 17554d156d33324b7715453993f21684915a28e310aChris Lattner 176ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesstatic void printInt(raw_ostream &OS, int Val) { 177ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << Val; 178ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines} 179ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 180ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesstatic const char *getMinimalTypeForRange(uint64_t Range) { 181ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines assert(Range < 0xFFFFFFFFULL && "Enum too large"); 182ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (Range > 0xFFFF) 183ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines return "uint32_t"; 184ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (Range > 0xFF) 185ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines return "uint16_t"; 186ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines return "uint8_t"; 187ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines} 188ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 189176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trickvoid RegisterInfoEmitter:: 190176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew TrickEmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, 191176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick const std::string &ClassName) { 192176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick unsigned NumRCs = RegBank.getRegClasses().size(); 193176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick unsigned NumSets = RegBank.getNumRegPressureSets(); 194176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick 195176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick OS << "/// Get the weight in units of pressure for this register class.\n" 196ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick << "const RegClassWeight &" << ClassName << "::\n" 197176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "getRegClassWeight(const TargetRegisterClass *RC) const {\n" 198ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick << " static const RegClassWeight RCWeightTable[] = {\n"; 199ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegBank.getRegClasses()) { 200ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const CodeGenRegister::Vec &Regs = RC.getMembers(); 201176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick if (Regs.empty()) 202ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick OS << " {0, 0"; 203ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick else { 204ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick std::vector<unsigned> RegUnits; 205ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick RC.buildRegUnitSet(RegUnits); 206ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick OS << " {" << (*Regs.begin())->getWeight(RegBank) 207ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick << ", " << RegBank.getRegUnitSetWeight(RegUnits); 208ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick } 209ec14cd7ddc66d47cd7927f18d8c11844c400367eAndrew Trick OS << "}, \t// " << RC.getName() << "\n"; 210176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick } 211ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " };\n" 212176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << " return RCWeightTable[RC->getID()];\n" 213176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "}\n\n"; 214176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick 215eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick // Reasonable targets (not ARMv7) have unit weight for all units, so don't 216eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick // bother generating a table. 217eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick bool RegUnitsHaveUnitWeight = true; 218eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); 219eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick UnitIdx < UnitEnd; ++UnitIdx) { 220eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick if (RegBank.getRegUnit(UnitIdx).Weight > 1) 221eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick RegUnitsHaveUnitWeight = false; 222eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick } 223eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << "/// Get the weight in units of pressure for this register unit.\n" 224eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "unsigned " << ClassName << "::\n" 225553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << "getRegUnitWeight(unsigned RegUnit) const {\n" 226553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << " assert(RegUnit < " << RegBank.getNumNativeRegUnits() 227553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << " && \"invalid register unit\");\n"; 228eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick if (!RegUnitsHaveUnitWeight) { 229eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << " static const uint8_t RUWeightTable[] = {\n "; 230eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); 231eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick UnitIdx < UnitEnd; ++UnitIdx) { 232eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick const RegUnit &RU = RegBank.getRegUnit(UnitIdx); 233eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick assert(RU.Weight < 256 && "RegUnit too heavy"); 234eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << RU.Weight << ", "; 235eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick } 236ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "};\n" 237eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << " return RUWeightTable[RegUnit];\n"; 238eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick } 239eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick else { 240eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << " // All register units have unit weight.\n" 241eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << " return 1;\n"; 242eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick } 243eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << "}\n\n"; 244eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick 245176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick OS << "\n" 246176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "// Get the number of dimensions of register pressure.\n" 247176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "unsigned " << ClassName << "::getNumRegPressureSets() const {\n" 248176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << " return " << NumSets << ";\n}\n\n"; 249176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick 2507c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick OS << "// Get the name of this register unit pressure set.\n" 2517c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick << "const char *" << ClassName << "::\n" 2527c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick << "getRegPressureSetName(unsigned Idx) const {\n" 2530c7f116bb6950ef819323d855415b2f2b0aad987Pirama Arumuga Nainar << " static const char *const PressureNameTable[] = {\n"; 254ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned MaxRegUnitWeight = 0; 2557c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick for (unsigned i = 0; i < NumSets; ++i ) { 256ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); 257ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines MaxRegUnitWeight = std::max(MaxRegUnitWeight, RegUnits.Weight); 258ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " \"" << RegUnits.Name << "\",\n"; 2597c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick } 260f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " };\n" 2617c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick << " return PressureNameTable[Idx];\n" 2627c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick << "}\n\n"; 2637c0903a924b110dad0648e0b6cbdd2f38496fe28Andrew Trick 264176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick OS << "// Get the register unit pressure limit for this dimension.\n" 265176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "// This limit must be adjusted dynamically for reserved registers.\n" 266176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "unsigned " << ClassName << "::\n" 2674c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar << "getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {\n" 268ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " static const " << getMinimalTypeForRange(MaxRegUnitWeight) 269ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " PressureLimitTable[] = {\n"; 270176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick for (unsigned i = 0; i < NumSets; ++i ) { 271bba663e30a61b138c8f76632f8cacf00d7b0649aAndrew Trick const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); 272bba663e30a61b138c8f76632f8cacf00d7b0649aAndrew Trick OS << " " << RegUnits.Weight << ", \t// " << i << ": " 273bba663e30a61b138c8f76632f8cacf00d7b0649aAndrew Trick << RegUnits.Name << "\n"; 274176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick } 275ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " };\n" 276176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << " return PressureLimitTable[Idx];\n" 277176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "}\n\n"; 278176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick 279ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SequenceToOffsetTable<std::vector<int>> PSetsSeqs; 280ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 281eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick // This table may be larger than NumRCs if some register units needed a list 282eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick // of unit sets that did not correspond to a register class. 283eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick unsigned NumRCUnitSets = RegBank.getNumRegClassPressureSetLists(); 284ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::vector<std::vector<int>> PSets(NumRCUnitSets); 285ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 286ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (unsigned i = 0, e = NumRCUnitSets; i != e; ++i) { 287176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick ArrayRef<unsigned> PSetIDs = RegBank.getRCPressureSetIDs(i); 288ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines PSets[i].reserve(PSetIDs.size()); 289176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick for (ArrayRef<unsigned>::iterator PSetI = PSetIDs.begin(), 290176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick PSetE = PSetIDs.end(); PSetI != PSetE; ++PSetI) { 291ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines PSets[i].push_back(RegBank.getRegPressureSet(*PSetI).Order); 292176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick } 293ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::sort(PSets[i].begin(), PSets[i].end()); 294ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines PSetsSeqs.add(PSets[i]); 295176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick } 296ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 297ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines PSetsSeqs.layout(); 298ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 299ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "/// Table of pressure sets per register class or unit.\n" 300ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "static const int RCSetsTable[] = {\n"; 301ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines PSetsSeqs.emit(OS, printInt, "-1"); 302ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "};\n\n"; 303eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick 304eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << "/// Get the dimensions of register pressure impacted by this " 305eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "register class.\n" 306eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "/// Returns a -1 terminated array of pressure set IDs\n" 307eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "const int* " << ClassName << "::\n" 308eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "getRegClassPressureSets(const TargetRegisterClass *RC) const {\n"; 309ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " static const " << getMinimalTypeForRange(PSetsSeqs.size()-1) 310ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " RCSetStartTable[] = {\n "; 311176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick for (unsigned i = 0, e = NumRCs; i != e; ++i) { 312ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << PSetsSeqs.get(PSets[i]) << ","; 313176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick } 314ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "};\n" 315ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " return &RCSetsTable[RCSetStartTable[RC->getID()]];\n" 316176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick << "}\n\n"; 317eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick 318eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick OS << "/// Get the dimensions of register pressure impacted by this " 319eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "register unit.\n" 320eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "/// Returns a -1 terminated array of pressure set IDs\n" 321eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "const int* " << ClassName << "::\n" 322553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << "getRegUnitPressureSets(unsigned RegUnit) const {\n" 323553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << " assert(RegUnit < " << RegBank.getNumNativeRegUnits() 324553c42cefc9abe1f10ee33d34a12498b8ac12fe6Andrew Trick << " && \"invalid register unit\");\n"; 325ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " static const " << getMinimalTypeForRange(PSetsSeqs.size()-1) 326ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " RUSetStartTable[] = {\n "; 327eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); 328eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick UnitIdx < UnitEnd; ++UnitIdx) { 329ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << PSetsSeqs.get(PSets[RegBank.getRegUnit(UnitIdx).RegClassUnitSetsIdx]) 330ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << ","; 331eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick } 332ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "};\n" 333ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " return &RCSetsTable[RUSetStartTable[RegUnit]];\n" 334eca1fcf3d2d8246c45648fea59bd21a4091f9115Andrew Trick << "}\n\n"; 335176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick} 3360e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 337ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesvoid RegisterInfoEmitter::EmitRegMappingTables( 338ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines raw_ostream &OS, const std::deque<CodeGenRegister> &Regs, bool isCtor) { 3390e6a052331f674dd70e28af41f654a7874405eabEvan Cheng // Collect all information about dwarf register numbers 340b7110cf5b5e4832e8ded6db7ab7577e3cfa2c462Chad Rosier typedef std::map<Record*, std::vector<int64_t>, LessRecordRegister> DwarfRegNumsMapTy; 3410e6a052331f674dd70e28af41f654a7874405eabEvan Cheng DwarfRegNumsMapTy DwarfRegNums; 3420e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 3430e6a052331f674dd70e28af41f654a7874405eabEvan Cheng // First, just pull all provided information to the map 3440e6a052331f674dd70e28af41f654a7874405eabEvan Cheng unsigned maxLength = 0; 345ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto &RE : Regs) { 346ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Record *Reg = RE.TheDef; 3470e6a052331f674dd70e28af41f654a7874405eabEvan Cheng std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers"); 3480e6a052331f674dd70e28af41f654a7874405eabEvan Cheng maxLength = std::max((size_t)maxLength, RegNums.size()); 3490e6a052331f674dd70e28af41f654a7874405eabEvan Cheng if (DwarfRegNums.count(Reg)) 350bfb4327baa5bbab78f0da4c8c069482878660a04Jim Grosbach PrintWarning(Reg->getLoc(), Twine("DWARF numbers for register ") + 3513cbcffc4e5990209ce80a54e615f55245fe3b824Benjamin Kramer getQualifiedName(Reg) + "specified multiple times"); 3520e6a052331f674dd70e28af41f654a7874405eabEvan Cheng DwarfRegNums[Reg] = RegNums; 3530e6a052331f674dd70e28af41f654a7874405eabEvan Cheng } 3540e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 3550e6a052331f674dd70e28af41f654a7874405eabEvan Cheng if (!maxLength) 3560e6a052331f674dd70e28af41f654a7874405eabEvan Cheng return; 3570e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 3580e6a052331f674dd70e28af41f654a7874405eabEvan Cheng // Now we know maximal length of number list. Append -1's, where needed 3590e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (DwarfRegNumsMapTy::iterator 3600e6a052331f674dd70e28af41f654a7874405eabEvan Cheng I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) 3610e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (unsigned i = I->second.size(), e = maxLength; i != e; ++i) 3620e6a052331f674dd70e28af41f654a7874405eabEvan Cheng I->second.push_back(-1); 3630e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 364ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::string Namespace = Regs.front().TheDef->getValueAsString("Namespace"); 365243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 366243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "// " << Namespace << " Dwarf<->LLVM register mappings.\n"; 367243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 368243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // Emit reverse information about the dwarf register numbers. 369243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (unsigned j = 0; j < 2; ++j) { 370243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (unsigned i = 0, e = maxLength; i != e; ++i) { 371243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "extern const MCRegisterInfo::DwarfLLVMRegPair " << Namespace; 372243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << (j == 0 ? "DwarfFlavour" : "EHFlavour"); 373243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << i << "Dwarf2L[]"; 374243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 375243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) { 376243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " = {\n"; 377243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 378243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // Store the mapping sorted by the LLVM reg num so lookup can be done 379243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // with a binary search. 380243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer std::map<uint64_t, Record*> Dwarf2LMap; 381243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (DwarfRegNumsMapTy::iterator 382243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) { 383243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer int DwarfRegNo = I->second[i]; 384243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (DwarfRegNo < 0) 385243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer continue; 386243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer Dwarf2LMap[DwarfRegNo] = I->first; 387243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 388243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 389243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (std::map<uint64_t, Record*>::iterator 390243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer I = Dwarf2LMap.begin(), E = Dwarf2LMap.end(); I != E; ++I) 391243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " { " << I->first << "U, " << getQualifiedName(I->second) 392243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << " },\n"; 393243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 394243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "};\n"; 395243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } else { 396243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ";\n"; 397243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 398243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 399243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // We have to store the size in a const global, it's used in multiple 400243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // places. 401243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "extern const unsigned " << Namespace 402243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i << "Dwarf2LSize"; 403243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) 40437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << " = array_lengthof(" << Namespace 405243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i 40637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines << "Dwarf2L);\n\n"; 407243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer else 408243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ";\n\n"; 409243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 410243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 411243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 412ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto &RE : Regs) { 413ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Record *Reg = RE.TheDef; 414243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer const RecordVal *V = Reg->getValue("DwarfAlias"); 415243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!V || !V->getValue()) 416243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer continue; 417243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 4183f7b7f8ce0b050fc6a0100839d9c5a84198b2aedSean Silva DefInit *DI = cast<DefInit>(V->getValue()); 419243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer Record *Alias = DI->getDef(); 420243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer DwarfRegNums[Reg] = DwarfRegNums[Alias]; 421243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 422243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 423243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // Emit information about the dwarf register numbers. 424243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (unsigned j = 0; j < 2; ++j) { 425243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (unsigned i = 0, e = maxLength; i != e; ++i) { 426243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "extern const MCRegisterInfo::DwarfLLVMRegPair " << Namespace; 427243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << (j == 0 ? "DwarfFlavour" : "EHFlavour"); 428243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << i << "L2Dwarf[]"; 429243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) { 430243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " = {\n"; 431243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // Store the mapping sorted by the Dwarf reg num so lookup can be done 432243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // with a binary search. 433243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer for (DwarfRegNumsMapTy::iterator 434243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) { 435243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer int RegNo = I->second[i]; 436243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (RegNo == -1) // -1 is the default value, don't emit a mapping. 437243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer continue; 438243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 439243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " { " << getQualifiedName(I->first) << ", " << RegNo 440243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << "U },\n"; 441243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 442243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "};\n"; 443243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } else { 444243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ";\n"; 445243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 446243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 447243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // We have to store the size in a const global, it's used in multiple 448243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // places. 449243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "extern const unsigned " << Namespace 450243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i << "L2DwarfSize"; 451243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) 45237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << " = array_lengthof(" << Namespace 45337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i << "L2Dwarf);\n\n"; 454243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer else 455243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ";\n\n"; 456243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 457243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 458243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer} 459243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 460ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesvoid RegisterInfoEmitter::EmitRegMapping( 461ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines raw_ostream &OS, const std::deque<CodeGenRegister> &Regs, bool isCtor) { 462243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // Emit the initializer so the tables from EmitRegMappingTables get wired up 463243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer // to the MCRegisterInfo object. 464243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer unsigned maxLength = 0; 465ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto &RE : Regs) { 466ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Record *Reg = RE.TheDef; 467243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer maxLength = std::max((size_t)maxLength, 468243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer Reg->getValueAsListOfInts("DwarfNumbers").size()); 469243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer } 470243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 471243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!maxLength) 472243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer return; 473243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 474ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::string Namespace = Regs.front().TheDef->getValueAsString("Namespace"); 475243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 4760e6a052331f674dd70e28af41f654a7874405eabEvan Cheng // Emit reverse information about the dwarf register numbers. 4770e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (unsigned j = 0; j < 2; ++j) { 4780e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " switch ("; 4790e6a052331f674dd70e28af41f654a7874405eabEvan Cheng if (j == 0) 4800e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "DwarfFlavour"; 4810e6a052331f674dd70e28af41f654a7874405eabEvan Cheng else 4820e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "EHFlavour"; 4830e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << ") {\n" 4840e6a052331f674dd70e28af41f654a7874405eabEvan Cheng << " default:\n" 485655b8de7b2ab773a977e0c524307e71354d8af29Craig Topper << " llvm_unreachable(\"Unknown DWARF flavour\");\n"; 4860e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 4870e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (unsigned i = 0, e = maxLength; i != e; ++i) { 4880e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " case " << i << ":\n"; 489243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " "; 490243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) 491243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "RI->"; 492243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer std::string Tmp; 493243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer raw_string_ostream(Tmp) << Namespace 494243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i 495243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << "Dwarf2L"; 496243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "mapDwarfRegsToLLVMRegs(" << Tmp << ", " << Tmp << "Size, "; 497243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (j == 0) 4980e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "false"; 4990e6a052331f674dd70e28af41f654a7874405eabEvan Cheng else 5000e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "true"; 501243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ");\n"; 5020e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " break;\n"; 5030e6a052331f674dd70e28af41f654a7874405eabEvan Cheng } 5040e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " }\n"; 5050e6a052331f674dd70e28af41f654a7874405eabEvan Cheng } 5060e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 5070e6a052331f674dd70e28af41f654a7874405eabEvan Cheng // Emit information about the dwarf register numbers. 5080e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (unsigned j = 0; j < 2; ++j) { 5090e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " switch ("; 5100e6a052331f674dd70e28af41f654a7874405eabEvan Cheng if (j == 0) 5110e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "DwarfFlavour"; 5120e6a052331f674dd70e28af41f654a7874405eabEvan Cheng else 5130e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "EHFlavour"; 5140e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << ") {\n" 5150e6a052331f674dd70e28af41f654a7874405eabEvan Cheng << " default:\n" 516655b8de7b2ab773a977e0c524307e71354d8af29Craig Topper << " llvm_unreachable(\"Unknown DWARF flavour\");\n"; 5170e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 5180e6a052331f674dd70e28af41f654a7874405eabEvan Cheng for (unsigned i = 0, e = maxLength; i != e; ++i) { 5190e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " case " << i << ":\n"; 520243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << " "; 521243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (!isCtor) 522243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "RI->"; 523243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer std::string Tmp; 524243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer raw_string_ostream(Tmp) << Namespace 525243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << (j == 0 ? "DwarfFlavour" : "EHFlavour") << i 526243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer << "L2Dwarf"; 527243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << "mapLLVMRegsToDwarfRegs(" << Tmp << ", " << Tmp << "Size, "; 528243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer if (j == 0) 5290e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "false"; 5300e6a052331f674dd70e28af41f654a7874405eabEvan Cheng else 5310e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "true"; 532243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer OS << ");\n"; 5330e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " break;\n"; 5340e6a052331f674dd70e28af41f654a7874405eabEvan Cheng } 5350e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << " }\n"; 5360e6a052331f674dd70e28af41f654a7874405eabEvan Cheng } 5370e6a052331f674dd70e28af41f654a7874405eabEvan Cheng} 5380e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 539b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen// Print a BitVector as a sequence of hex numbers using a little-endian mapping. 540b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen// Width is the number of bits per hex number. 541b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesenstatic void printBitVectorAsHex(raw_ostream &OS, 542b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen const BitVector &Bits, 543b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen unsigned Width) { 544b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen assert(Width <= 32 && "Width too large"); 545b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen unsigned Digits = (Width + 3) / 4; 546b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen for (unsigned i = 0, e = Bits.size(); i < e; i += Width) { 547b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen unsigned Value = 0; 548b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen for (unsigned j = 0; j != Width && i + j != e; ++j) 549b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen Value |= Bits.test(i + j) << j; 550b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen OS << format("0x%0*x, ", Digits, Value); 551b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen } 552b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen} 553b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen 5549df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer// Helper to emit a set of bits into a constant byte array. 5559df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramerclass BitVectorEmitter { 5569df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer BitVector Values; 5579df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramerpublic: 558a397a11c7c60e500baa36eea59a46a9aa2e5f35bBenjamin Kramer void add(unsigned v) { 559a397a11c7c60e500baa36eea59a46a9aa2e5f35bBenjamin Kramer if (v >= Values.size()) 560a397a11c7c60e500baa36eea59a46a9aa2e5f35bBenjamin Kramer Values.resize(((v/8)+1)*8); // Round up to the next byte. 561a397a11c7c60e500baa36eea59a46a9aa2e5f35bBenjamin Kramer Values[v] = true; 5629df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer } 5639df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer 5649df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer void print(raw_ostream &OS) { 565b7359e384f7d15d3e24b3763ed66546e497fe213Jakob Stoklund Olesen printBitVectorAsHex(OS, Values, 8); 5669df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer } 5679df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer}; 5689df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer 5690d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesenstatic void printSimpleValueType(raw_ostream &OS, MVT::SimpleValueType VT) { 5700d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen OS << getEnumName(VT); 5710d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen} 5720d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 573f92be238d6370fbab58f035a5bd0c6db7e207094Jakob Stoklund Olesenstatic void printSubRegIndex(raw_ostream &OS, const CodeGenSubRegIndex *Idx) { 5740371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen OS << Idx->EnumValue; 575f92be238d6370fbab58f035a5bd0c6db7e207094Jakob Stoklund Olesen} 576f92be238d6370fbab58f035a5bd0c6db7e207094Jakob Stoklund Olesen 577f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// Differentially encoded register and regunit lists allow for better 578f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// compression on regular register banks. The sequence is computed from the 579f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// differential list as: 580f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// 581f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// out[0] = InitVal; 582f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// out[n+1] = out[n] + diff[n]; // n = 0, 1, ... 583f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// 584f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// The initial value depends on the specific list. The list is terminated by a 585f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// 0 differential which means we can't encode repeated elements. 586f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 587f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesentypedef SmallVector<uint16_t, 4> DiffVec; 588ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinestypedef SmallVector<unsigned, 4> MaskVec; 589f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 590f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// Differentially encode a sequence of numbers into V. The starting value and 591f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen// terminating 0 are not added to V, so it will have the same size as List. 592b2a6d8100cfb8a4f9ee251fb274c2d6688b27963Jakob Stoklund Olesenstatic 593ebe69fe11e48d322045d5949c83283927a0d790bStephen HinesDiffVec &diffEncode(DiffVec &V, unsigned InitVal, SparseBitVector<> List) { 594f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen assert(V.empty() && "Clear DiffVec before diffEncode."); 595f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen uint16_t Val = uint16_t(InitVal); 596ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 597ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (uint16_t Cur : List) { 598f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen V.push_back(Cur - Val); 599f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen Val = Cur; 600f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen } 601f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen return V; 602f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen} 603f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 604303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesentemplate<typename Iter> 605303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesenstatic 606303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund OlesenDiffVec &diffEncode(DiffVec &V, unsigned InitVal, Iter Begin, Iter End) { 607303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen assert(V.empty() && "Clear DiffVec before diffEncode."); 608303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen uint16_t Val = uint16_t(InitVal); 609303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen for (Iter I = Begin; I != End; ++I) { 610303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen uint16_t Cur = (*I)->EnumValue; 611303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen V.push_back(Cur - Val); 612303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen Val = Cur; 613303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen } 614303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen return V; 615303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen} 616303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen 617f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesenstatic void printDiff16(raw_ostream &OS, uint16_t Val) { 618ff09e56cda85c1740ac1689018dfe0d3cf49ae6cJakob Stoklund Olesen OS << Val; 619f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen} 620f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 621ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesstatic void printMask(raw_ostream &OS, unsigned Val) { 622ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << format("0x%08X", Val); 623ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines} 624ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 625ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen// Try to combine Idx's compose map into Vec if it is compatible. 626ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen// Return false if it's not possible. 627ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesenstatic bool combine(const CodeGenSubRegIndex *Idx, 628ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen SmallVectorImpl<CodeGenSubRegIndex*> &Vec) { 629ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen const CodeGenSubRegIndex::CompMap &Map = Idx->getComposites(); 6304c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar for (const auto &I : Map) { 6314c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar CodeGenSubRegIndex *&Entry = Vec[I.first->EnumValue - 1]; 6324c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar if (Entry && Entry != I.second) 633ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen return false; 634ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 635ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 636ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // All entries are compatible. Make it so. 6374c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar for (const auto &I : Map) { 6384c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar auto *&Entry = Vec[I.first->EnumValue - 1]; 6394c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar assert((!Entry || Entry == I.second) && 6404c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar "Expected EnumValue to be unique"); 6414c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar Entry = I.second; 6424c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar } 643ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen return true; 644ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen} 645ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 646ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesenvoid 647ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund OlesenRegisterInfoEmitter::emitComposeSubRegIndices(raw_ostream &OS, 648ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen CodeGenRegBank &RegBank, 649ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen const std::string &ClName) { 650ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &SubRegIndices = RegBank.getSubRegIndices(); 651ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << "unsigned " << ClName 652ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen << "::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {\n"; 653ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 654ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // Many sub-register indexes are composition-compatible, meaning that 655ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // 656ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // compose(IdxA, IdxB) == compose(IdxA', IdxB) 657ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // 658ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // for many IdxA, IdxA' pairs. Not all sub-register indexes can be composed. 659ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // The illegal entries can be use as wildcards to compress the table further. 660ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 661ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // Map each Sub-register index to a compatible table row. 662ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen SmallVector<unsigned, 4> RowMap; 663ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen SmallVector<SmallVector<CodeGenSubRegIndex*, 4>, 4> Rows; 664ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 665ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines auto SubRegIndicesSize = 666ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::distance(SubRegIndices.begin(), SubRegIndices.end()); 667ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) { 668ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen unsigned Found = ~0u; 669ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen for (unsigned r = 0, re = Rows.size(); r != re; ++r) { 670ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (combine(&Idx, Rows[r])) { 671ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen Found = r; 672ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen break; 673ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 674ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 675ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen if (Found == ~0u) { 676ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen Found = Rows.size(); 677ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen Rows.resize(Found + 1); 678ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Rows.back().resize(SubRegIndicesSize); 679ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines combine(&Idx, Rows.back()); 680ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 681ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen RowMap.push_back(Found); 682ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 683ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 684ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // Output the row map if there is multiple rows. 685ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen if (Rows.size() > 1) { 686ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " static const " << getMinimalTypeForRange(Rows.size()) << " RowMap[" 687ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << SubRegIndicesSize << "] = {\n "; 688ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (unsigned i = 0, e = SubRegIndicesSize; i != e; ++i) 689ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << RowMap[i] << ", "; 690ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << "\n };\n"; 691ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 692ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 693ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen // Output the rows. 694ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " static const " << getMinimalTypeForRange(SubRegIndicesSize + 1) 695ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " Rows[" << Rows.size() << "][" << SubRegIndicesSize << "] = {\n"; 696ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen for (unsigned r = 0, re = Rows.size(); r != re; ++r) { 697ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << " { "; 698ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (unsigned i = 0, e = SubRegIndicesSize; i != e; ++i) 699ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen if (Rows[r][i]) 700ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << Rows[r][i]->EnumValue << ", "; 701ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen else 702ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << "0, "; 703ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << "},\n"; 704ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen } 705ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << " };\n\n"; 706ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 707ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " --IdxA; assert(IdxA < " << SubRegIndicesSize << ");\n" 708ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " --IdxB; assert(IdxB < " << SubRegIndicesSize << ");\n"; 709ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen if (Rows.size() > 1) 710ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << " return Rows[RowMap[IdxA]][IdxB];\n"; 711ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen else 712ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << " return Rows[0][IdxB];\n"; 713ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen OS << "}\n\n"; 714ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen} 715ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen 716ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesvoid 717ebe69fe11e48d322045d5949c83283927a0d790bStephen HinesRegisterInfoEmitter::emitComposeSubRegIndexLaneMask(raw_ostream &OS, 718ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines CodeGenRegBank &RegBank, 719ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const std::string &ClName) { 720ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines // See the comments in computeSubRegLaneMasks() for our goal here. 721ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &SubRegIndices = RegBank.getSubRegIndices(); 722ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 723ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines // Create a list of Mask+Rotate operations, with equivalent entries merged. 724ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SmallVector<unsigned, 4> SubReg2SequenceIndexMap; 725ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SmallVector<SmallVector<MaskRolPair, 1>, 4> Sequences; 726ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) { 727ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const SmallVector<MaskRolPair, 1> &IdxSequence 728ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines = Idx.CompositionLaneMaskTransform; 729ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 730ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned Found = ~0u; 731ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned SIdx = 0; 732ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned NextSIdx; 733ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (size_t s = 0, se = Sequences.size(); s != se; ++s, SIdx = NextSIdx) { 734ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SmallVectorImpl<MaskRolPair> &Sequence = Sequences[s]; 735ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines NextSIdx = SIdx + Sequence.size() + 1; 7364c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar if (Sequence == IdxSequence) { 737ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Found = SIdx; 738ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines break; 739ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 740ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 741ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (Found == ~0u) { 742ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Sequences.push_back(IdxSequence); 743ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Found = SIdx; 744ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 745ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SubReg2SequenceIndexMap.push_back(Found); 746ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 747ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 748ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " struct MaskRolOp {\n" 749ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " unsigned Mask;\n" 750ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " uint8_t RotateLeft;\n" 751ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " };\n" 752de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " static const MaskRolOp LaneMaskComposeSequences[] = {\n"; 753ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned Idx = 0; 754ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (size_t s = 0, se = Sequences.size(); s != se; ++s) { 755ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " "; 756ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const SmallVectorImpl<MaskRolPair> &Sequence = Sequences[s]; 757ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (size_t p = 0, pe = Sequence.size(); p != pe; ++p) { 758ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const MaskRolPair &P = Sequence[p]; 759ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << format("{ 0x%08X, %2u }, ", P.Mask, P.RotateLeft); 760ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 761ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "{ 0, 0 }"; 762ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (s+1 != se) 763ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << ", "; 764ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " // Sequence " << Idx << "\n"; 765ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Idx += Sequence.size() + 1; 766ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 767ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " };\n" 7680c7f116bb6950ef819323d855415b2f2b0aad987Pirama Arumuga Nainar " static const MaskRolOp *const CompositeSequences[] = {\n"; 769ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (size_t i = 0, e = SubRegIndices.size(); i != e; ++i) { 770ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " "; 771ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned Idx = SubReg2SequenceIndexMap[i]; 772de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << format("&LaneMaskComposeSequences[%u]", Idx); 773ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (i+1 != e) 774ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << ","; 775ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " // to " << SubRegIndices[i].getName() << "\n"; 776ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 777ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " };\n\n"; 778ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 779de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "LaneBitmask " << ClName 780de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << "::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask)" 781de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " const {\n" 782de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " --IdxA; assert(IdxA < " << SubRegIndices.size() 783ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " && \"Subregister index out of bounds\");\n" 784de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneBitmask Result = 0;\n" 785ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " for (const MaskRolOp *Ops = CompositeSequences[IdxA]; Ops->Mask != 0; ++Ops)" 786ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " {\n" 787de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneBitmask Masked = LaneMask & Ops->Mask;\n" 788ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " Result |= (Masked << Ops->RotateLeft) & 0xFFFFFFFF;\n" 789ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " Result |= (Masked >> ((32 - Ops->RotateLeft) & 0x1F));\n" 790ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " }\n" 791ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines " return Result;\n" 792de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar "}\n\n"; 793de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar 794de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "LaneBitmask " << ClName 795de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << "::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, " 796de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneBitmask LaneMask) const {\n" 797de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneMask &= getSubRegIndexLaneMask(IdxA);\n" 798de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " --IdxA; assert(IdxA < " << SubRegIndices.size() 799de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << " && \"Subregister index out of bounds\");\n" 800de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneBitmask Result = 0;\n" 801de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " for (const MaskRolOp *Ops = CompositeSequences[IdxA]; Ops->Mask != 0; ++Ops)" 802de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " {\n" 803de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " LaneBitmask Rotated = (LaneMask >> Ops->RotateLeft) |\n" 804de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " ((LaneMask << ((32 - Ops->RotateLeft) & 0x1F)) & 0xFFFFFFFF);\n" 805de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " Result |= Rotated & Ops->Mask;\n" 806de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " }\n" 807de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar " return Result;\n" 808de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar "}\n\n"; 809ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines} 810ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 8114091b059ec9568228f50fd67a1a81ee35c234787Jakob Stoklund Olesen// 81273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng// runMCDesc - Print out MC register descriptions. 81354d156d33324b7715453993f21684915a28e310aChris Lattner// 81473f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Chengvoid 81573f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan ChengRegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, 81673f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng CodeGenRegBank &RegBank) { 8176f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen emitSourceFileHeader("MC Register Information", OS); 81873f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 81973f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "\n#ifdef GET_REGINFO_MC_DESC\n"; 820de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "#undef GET_REGINFO_MC_DESC\n\n"; 82173f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 822ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &Regs = RegBank.getRegisters(); 82373f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 824ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines auto &SubRegIndices = RegBank.getSubRegIndices(); 8252275cfd75b65ede0f46f3cf914e76a38daf96417Chad Rosier // The lists of sub-registers and super-registers go in the same array. That 8262275cfd75b65ede0f46f3cf914e76a38daf96417Chad Rosier // allows us to share suffixes. 8270d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen typedef std::vector<const CodeGenRegister*> RegVec; 828902af25abdc9e6d25b898310c1e4716bbe768fb9Craig Topper 829f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // Differentially encoded lists. 830f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen SequenceToOffsetTable<DiffVec> DiffSeqs; 831303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen SmallVector<DiffVec, 4> SubRegLists(Regs.size()); 832303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen SmallVector<DiffVec, 4> SuperRegLists(Regs.size()); 833f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen SmallVector<DiffVec, 4> RegUnitLists(Regs.size()); 834f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen SmallVector<unsigned, 4> RegUnitInitScale(Regs.size()); 835f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 836ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines // List of lane masks accompanying register unit sequences. 837ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SequenceToOffsetTable<MaskVec> LaneMaskSeqs; 838ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SmallVector<MaskVec, 4> RegUnitLaneMasks(Regs.size()); 839ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 8400371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen // Keep track of sub-register names as well. These are not differentially 8410371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen // encoded. 8420371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen typedef SmallVector<const CodeGenSubRegIndex*, 4> SubRegIdxVec; 843ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SequenceToOffsetTable<SubRegIdxVec, deref<llvm::less>> SubRegIdxSeqs; 8440371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen SmallVector<SubRegIdxVec, 4> SubRegIdxLists(Regs.size()); 8450371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen 846d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen SequenceToOffsetTable<std::string> RegStrings; 847d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen 8480d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Precompute register lists for the SequenceToOffsetTable. 849ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines unsigned i = 0; 850ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto I = Regs.begin(), E = Regs.end(); I != E; ++I, ++i) { 851ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &Reg = *I; 852ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines RegStrings.add(Reg.getName()); 853d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen 8540d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Compute the ordered sub-register list. 855c6a96ff6aeeb77e1007364e5603b72f3ab4cc7bdJakob Stoklund Olesen SetVector<const CodeGenRegister*> SR; 856ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Reg.addSubRegsPreOrder(SR, RegBank); 857ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines diffEncode(SubRegLists[i], Reg.EnumValue, SR.begin(), SR.end()); 858303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen DiffSeqs.add(SubRegLists[i]); 8590d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 8600371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen // Compute the corresponding sub-register indexes. 8610371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen SubRegIdxVec &SRIs = SubRegIdxLists[i]; 8620371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen for (unsigned j = 0, je = SR.size(); j != je; ++j) 863ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SRIs.push_back(Reg.getSubRegIndex(SR[j])); 8640371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen SubRegIdxSeqs.add(SRIs); 8650371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen 8660d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Super-registers are already computed. 867ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const RegVec &SuperRegList = Reg.getSuperRegs(); 868ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines diffEncode(SuperRegLists[i], Reg.EnumValue, SuperRegList.begin(), 869ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SuperRegList.end()); 870303c909d5bb014fbeec395090eb467d724969195Jakob Stoklund Olesen DiffSeqs.add(SuperRegLists[i]); 8710d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 872f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // Differentially encode the register unit list, seeded by register number. 873f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // First compute a scale factor that allows more diff-lists to be reused: 874f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // 875f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // D0 -> (S0, S1) 876f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // D1 -> (S2, S3) 877f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // 878f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // A scale factor of 2 allows D0 and D1 to share a diff-list. The initial 879f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // value for the differential decoder is the register number multiplied by 880f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // the scale. 881f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // 882f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // Check the neighboring registers for arithmetic progressions. 883f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen unsigned ScaleA = ~0u, ScaleB = ~0u; 884ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SparseBitVector<> RUs = Reg.getNativeRegUnits(); 885ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (I != Regs.begin() && 886ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::prev(I)->getNativeRegUnits().count() == RUs.count()) 887ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines ScaleB = *RUs.begin() - *std::prev(I)->getNativeRegUnits().begin(); 888ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (std::next(I) != Regs.end() && 889ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::next(I)->getNativeRegUnits().count() == RUs.count()) 890ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines ScaleA = *std::next(I)->getNativeRegUnits().begin() - *RUs.begin(); 891f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen unsigned Scale = std::min(ScaleB, ScaleA); 892f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // Default the scale to 0 if it can't be encoded in 4 bits. 893f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen if (Scale >= 16) 894f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen Scale = 0; 895f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen RegUnitInitScale[i] = Scale; 896ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines DiffSeqs.add(diffEncode(RegUnitLists[i], Scale * Reg.EnumValue, RUs)); 897ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 898ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &RUMasks = Reg.getRegUnitLaneMasks(); 899ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines MaskVec &LaneMaskVec = RegUnitLaneMasks[i]; 900ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines assert(LaneMaskVec.empty()); 901ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines LaneMaskVec.insert(LaneMaskVec.begin(), RUMasks.begin(), RUMasks.end()); 902ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines // Terminator mask should not be used inside of the list. 903ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines#ifndef NDEBUG 904ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (unsigned M : LaneMaskVec) { 905ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines assert(M != ~0u && "terminator mask should not be part of the list"); 906ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 907ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines#endif 908ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines LaneMaskSeqs.add(LaneMaskVec); 90973f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng } 91073f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 9110d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Compute the final layout of the sequence table. 912f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen DiffSeqs.layout(); 913ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines LaneMaskSeqs.layout(); 9140371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen SubRegIdxSeqs.layout(); 9150d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 9160d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen OS << "namespace llvm {\n\n"; 9170d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 9180d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen const std::string &TargetName = Target.getName(); 9190d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen 920f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen // Emit the shared table of differential lists. 921e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen OS << "extern const MCPhysReg " << TargetName << "RegDiffLists[] = {\n"; 922f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen DiffSeqs.emit(OS, printDiff16); 923f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen OS << "};\n\n"; 924f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen 925ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines // Emit the shared table of regunit lane mask sequences. 926ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "extern const unsigned " << TargetName << "LaneMaskLists[] = {\n"; 927ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines LaneMaskSeqs.emit(OS, printMask, "~0u"); 928ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "};\n\n"; 929ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 9300371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen // Emit the table of sub-register indexes. 9310371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen OS << "extern const uint16_t " << TargetName << "SubRegIdxLists[] = {\n"; 9320371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen SubRegIdxSeqs.emit(OS, printSubRegIndex); 9330371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen OS << "};\n\n"; 9340371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen 935bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha // Emit the table of sub-register index sizes. 936bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha OS << "extern const MCRegisterInfo::SubRegCoveredBits " 937bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha << TargetName << "SubRegIdxRanges[] = {\n"; 938bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha OS << " { " << (uint16_t)-1 << ", " << (uint16_t)-1 << " },\n"; 939ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) { 940ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " { " << Idx.Offset << ", " << Idx.Size << " },\t// " 941ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << Idx.getName() << "\n"; 942bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha } 943bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha OS << "};\n\n"; 944bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha 945d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen // Emit the string table. 946d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen RegStrings.layout(); 947d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen OS << "extern const char " << TargetName << "RegStrings[] = {\n"; 948d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen RegStrings.emit(OS, printChar); 949d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen OS << "};\n\n"; 950d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen 951902af25abdc9e6d25b898310c1e4716bbe768fb9Craig Topper OS << "extern const MCRegisterDesc " << TargetName 95273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng << "RegDesc[] = { // Descriptors\n"; 953ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " { " << RegStrings.get("") << ", 0, 0, 0, 0, 0 },\n"; 95473f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 9550d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Emit the register descriptors now. 956ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines i = 0; 957ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Reg : Regs) { 958ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " { " << RegStrings.get(Reg.getName()) << ", " 959ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << DiffSeqs.get(SubRegLists[i]) << ", " << DiffSeqs.get(SuperRegLists[i]) 960ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << ", " << SubRegIdxSeqs.get(SubRegIdxLists[i]) << ", " 961ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << (DiffSeqs.get(RegUnitLists[i]) * 16 + RegUnitInitScale[i]) << ", " 962ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << LaneMaskSeqs.get(RegUnitLaneMasks[i]) << " },\n"; 963ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines ++i; 96473f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng } 965c60f9b752381baa6c4b80c0739034660f1748c84Evan Cheng OS << "};\n\n"; // End of register descriptors... 96673f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 967f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen // Emit the table of register unit roots. Each regunit has one or two root 968f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen // registers. 969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OS << "extern const MCPhysReg " << TargetName << "RegUnitRoots[][2] = {\n"; 970f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen for (unsigned i = 0, e = RegBank.getNumNativeRegUnits(); i != e; ++i) { 971f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen ArrayRef<const CodeGenRegister*> Roots = RegBank.getRegUnit(i).getRoots(); 972f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen assert(!Roots.empty() && "All regunits must have a root register."); 973f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen assert(Roots.size() <= 2 && "More than two roots not supported yet."); 974f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen OS << " { " << getQualifiedName(Roots.front()->TheDef); 975f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen for (unsigned r = 1; r != Roots.size(); ++r) 976f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen OS << ", " << getQualifiedName(Roots[r]->TheDef); 977f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen OS << " },\n"; 978f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen } 979f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen OS << "};\n\n"; 980f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen 981ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &RegisterClasses = RegBank.getRegClasses(); 9828ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 9838ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer // Loop over all of the register classes... emitting each one. 9848ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer OS << "namespace { // Register classes...\n"; 9858ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 98637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines SequenceToOffsetTable<std::string> RegClassStrings; 98737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 9888ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer // Emit the register enum value arrays for each RegisterClass 989ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 9908ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer ArrayRef<Record*> Order = RC.getOrder(); 9918ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 9928ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer // Give the register class a legal C name if it's anonymous. 993de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar const std::string &Name = RC.getName(); 9948ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 99537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines RegClassStrings.add(Name); 99637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 9978ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer // Emit the register list now. 9988ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer OS << " // " << Name << " Register Class...\n" 999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines << " const MCPhysReg " << Name 10008ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer << "[] = {\n "; 10018ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer for (unsigned i = 0, e = Order.size(); i != e; ++i) { 10028ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer Record *Reg = Order[i]; 10038ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer OS << getQualifiedName(Reg) << ", "; 10048ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer } 10058ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer OS << "\n };\n\n"; 10069df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer 10079df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer OS << " // " << Name << " Bit set.\n" 1008b6632ba380cf624e60fe16b03d6e21b05dd07724Craig Topper << " const uint8_t " << Name 10099df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer << "Bits[] = {\n "; 1010a397a11c7c60e500baa36eea59a46a9aa2e5f35bBenjamin Kramer BitVectorEmitter BVE; 10119df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer for (unsigned i = 0, e = Order.size(); i != e; ++i) { 10129df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer Record *Reg = Order[i]; 10139df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer BVE.add(Target.getRegBank().getReg(Reg)->EnumValue); 10149df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer } 10159df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer BVE.print(OS); 10169df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer OS << "\n };\n\n"; 10179df8567548e15c6cd91e8a5851784574c4f09528Benjamin Kramer 10188ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer } 1019de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end anonymous namespace\n\n"; 10208ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 102137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines RegClassStrings.layout(); 102237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << "extern const char " << TargetName << "RegClassStrings[] = {\n"; 102337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines RegClassStrings.emit(OS, printChar); 102437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << "};\n\n"; 102537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 10261a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer OS << "extern const MCRegisterClass " << TargetName 10271a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer << "MCRegisterClasses[] = {\n"; 10288ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 1029ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1030904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper // Asserts to make sure values will fit in table assuming types from 1031904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper // MCRegisterInfo.h 1032904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper assert((RC.SpillSize/8) <= 0xffff && "SpillSize too large."); 1033904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper assert((RC.SpillAlignment/8) <= 0xffff && "SpillAlignment too large."); 1034904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper assert(RC.CopyCost >= -128 && RC.CopyCost <= 127 && "Copy cost too large."); 1035904a01820c86dd1e2bc7aef2950ed75a2c9c2640Craig Topper 103637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, " 103737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines << RegClassStrings.get(RC.getName()) << ", " 103852b89dd303424582d054e18417099f3a7e343b41Craig Topper << RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits), " 103952b89dd303424582d054e18417099f3a7e343b41Craig Topper << RC.getQualifiedName() + "RegClassID" << ", " 10408ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer << RC.SpillSize/8 << ", " 10418ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer << RC.SpillAlignment/8 << ", " 10428ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer << RC.CopyCost << ", " 1043de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << ( RC.Allocatable ? "true" : "false" ) << " },\n"; 10448ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer } 10458ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 10468ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer OS << "};\n\n"; 10478ca9a862038e8c4e9a2ca73b3b75e1be3425155fBenjamin Kramer 1048243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer EmitRegMappingTables(OS, Regs, false); 1049243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 10500ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach // Emit Reg encoding table 10510ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << "extern const uint16_t " << TargetName; 10520ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << "RegEncodingTable[] = {\n"; 10530ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach // Add entry for NoRegister 10540ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << " 0,\n"; 1055ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RE : Regs) { 1056ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines Record *Reg = RE.TheDef; 10570ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach BitsInit *BI = Reg->getValueAsBitsInit("HWEncoding"); 10580ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach uint64_t Value = 0; 10590ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach for (unsigned b = 0, be = BI->getNumBits(); b != be; ++b) { 10606cfc806a6b82b60a3e923b6b89f2b4da62cdb50bSean Silva if (BitInit *B = dyn_cast<BitInit>(BI->getBit(b))) 106136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines Value |= (uint64_t)B->getValue() << b; 10620ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach } 10630ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << " " << Value << ",\n"; 10640ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach } 10650ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << "};\n"; // End of HW encoding table 10660ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach 106773f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng // MCRegisterInfo initialization routine. 106873f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "static inline void Init" << TargetName 10690e6a052331f674dd70e28af41f654a7874405eabEvan Cheng << "MCRegisterInfo(MCRegisterInfo *RI, unsigned RA, " 1070ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) " 1071ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines "{\n" 10720371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen << " RI->InitMCRegisterInfo(" << TargetName << "RegDesc, " 1073ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << Regs.size() + 1 << ", RA, PC, " << TargetName << "MCRegisterClasses, " 1074ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << RegisterClasses.size() << ", " << TargetName << "RegUnitRoots, " 1075ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << RegBank.getNumNativeRegUnits() << ", " << TargetName << "RegDiffLists, " 1076ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << TargetName << "LaneMaskLists, " << TargetName << "RegStrings, " 1077ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << TargetName << "RegClassStrings, " << TargetName << "SubRegIdxLists, " 1078ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << (std::distance(SubRegIndices.begin(), SubRegIndices.end()) + 1) << ",\n" 1079ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << TargetName << "SubRegIdxRanges, " << TargetName 1080ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "RegEncodingTable);\n\n"; 10810e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 10820e6a052331f674dd70e28af41f654a7874405eabEvan Cheng EmitRegMapping(OS, Regs, false); 10830e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 10840e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "}\n\n"; 10850e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 1086de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace llvm\n\n"; 108773f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "#endif // GET_REGINFO_MC_DESC\n\n"; 108873f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng} 1089026dc223aeef2579d63f395007491e37d6cde3a0Jakob Stoklund Olesen 1090ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Chengvoid 1091ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan ChengRegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target, 1092ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng CodeGenRegBank &RegBank) { 10936f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen emitSourceFileHeader("Register Information Header Fragment", OS); 1094ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1095ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng OS << "\n#ifdef GET_REGINFO_HEADER\n"; 1096de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "#undef GET_REGINFO_HEADER\n\n"; 1097ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1098ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng const std::string &TargetName = Target.getName(); 1099ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng std::string ClassName = TargetName + "GenRegisterInfo"; 1100ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 11019b1b25f0631b22cd09c2fa7383ce28721fa3e212Craig Topper OS << "#include \"llvm/Target/TargetRegisterInfo.h\"\n\n"; 1102ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1103ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng OS << "namespace llvm {\n\n"; 1104ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1105f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "class " << TargetName << "FrameLowering;\n\n"; 1106f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 1107ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng OS << "struct " << ClassName << " : public TargetRegisterInfo {\n" 11080e6a052331f674dd70e28af41f654a7874405eabEvan Cheng << " explicit " << ClassName 1109f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << "(unsigned RA, unsigned D = 0, unsigned E = 0, unsigned PC = 0);\n"; 1110309076ff76c61e03ddd3a0fbbfded3042d2da2e5Jakob Stoklund Olesen if (!RegBank.getSubRegIndices().empty()) { 111136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << " unsigned composeSubRegIndicesImpl" 111236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << "(unsigned, unsigned) const override;\n" 1113de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << " LaneBitmask composeSubRegIndexLaneMaskImpl" 1114de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << "(unsigned, LaneBitmask) const override;\n" 1115de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << " LaneBitmask reverseComposeSubRegIndexLaneMaskImpl" 1116de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << "(unsigned, LaneBitmask) const override;\n" 111736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " const TargetRegisterClass *getSubClassWithSubReg" 111836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << "(const TargetRegisterClass*, unsigned) const override;\n"; 111936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 112036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << " const RegClassWeight &getRegClassWeight(" 112136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << "const TargetRegisterClass *RC) const override;\n" 112236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " unsigned getRegUnitWeight(unsigned RegUnit) const override;\n" 112336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " unsigned getNumRegPressureSets() const override;\n" 112436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " const char *getRegPressureSetName(unsigned Idx) const override;\n" 11254c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar << " unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned " 11264c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar "Idx) const override;\n" 112736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " const int *getRegClassPressureSets(" 112836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << "const TargetRegisterClass *RC) const override;\n" 112936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << " const int *getRegUnitPressureSets(" 113036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines << "unsigned RegUnit) const override;\n" 1131f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " ArrayRef<const char *> getRegMaskNames() const override;\n" 1132f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " ArrayRef<const uint32_t *> getRegMasks() const override;\n" 1133f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " /// Devirtualized TargetFrameLowering.\n" 1134f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " static const " << TargetName << "FrameLowering *getFrameLowering(\n" 1135f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " const MachineFunction &MF);\n" 1136ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng << "};\n\n"; 1137ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1138ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &RegisterClasses = RegBank.getRegClasses(); 1139ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1140ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng if (!RegisterClasses.empty()) { 1141ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "namespace " << RegisterClasses.front().Namespace 1142ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng << " { // Register classes\n"; 1143ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1144ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1145ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng const std::string &Name = RC.getName(); 1146ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 1147ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng // Output the extern for the instance. 1148ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << " extern const TargetRegisterClass " << Name << "RegClass;\n"; 1149ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng } 1150de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n\n"; 1151ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng } 1152de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace llvm\n\n"; 1153ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng OS << "#endif // GET_REGINFO_HEADER\n\n"; 1154ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng} 1155ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng 115673f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng// 115773f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng// runTargetDesc - Output the target register and register file descriptions. 115873f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng// 115973f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Chengvoid 116073f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan ChengRegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, 116173f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng CodeGenRegBank &RegBank){ 11626f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen emitSourceFileHeader("Target Register and Register Classes Information", OS); 116373f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 116473f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "\n#ifdef GET_REGINFO_TARGET_DESC\n"; 1165de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "#undef GET_REGINFO_TARGET_DESC\n\n"; 116654d156d33324b7715453993f21684915a28e310aChris Lattner 11672c38413b3f5420f45f2f8220b21862246d446dd0Chris Lattner OS << "namespace llvm {\n\n"; 11682c38413b3f5420f45f2f8220b21862246d446dd0Chris Lattner 1169f496d68493acf8d178afbbe8c3146ea09bd7776bBenjamin Kramer // Get access to MCRegisterClass data. 11701a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer OS << "extern const MCRegisterClass " << Target.getName() 11711a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer << "MCRegisterClasses[];\n"; 1172f496d68493acf8d178afbbe8c3146ea09bd7776bBenjamin Kramer 1173f462e3fac7ac67503657d63dc35330d0b19359b3Jakob Stoklund Olesen // Start out by emitting each of the register classes. 1174ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &RegisterClasses = RegBank.getRegClasses(); 1175ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &SubRegIndices = RegBank.getSubRegIndices(); 11766a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen 1177f462e3fac7ac67503657d63dc35330d0b19359b3Jakob Stoklund Olesen // Collect all registers belonging to any allocatable class. 1178f462e3fac7ac67503657d63dc35330d0b19359b3Jakob Stoklund Olesen std::set<Record*> AllocatableRegs; 1179f462e3fac7ac67503657d63dc35330d0b19359b3Jakob Stoklund Olesen 1180f496d68493acf8d178afbbe8c3146ea09bd7776bBenjamin Kramer // Collect allocatable registers. 1181ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1182ae1920b1efa72c1789d562df4746110d0c2e10bdJakob Stoklund Olesen ArrayRef<Record*> Order = RC.getOrder(); 1183c7df109b6c4f7cbf8cc4dbee90291d4e452c7d56Chris Lattner 1184f462e3fac7ac67503657d63dc35330d0b19359b3Jakob Stoklund Olesen if (RC.Allocatable) 1185ae1920b1efa72c1789d562df4746110d0c2e10bdJakob Stoklund Olesen AllocatableRegs.insert(Order.begin(), Order.end()); 118642de581b2f28985ec0c8fcbb26ab4d78c684247fChris Lattner } 11878d58e6a9be0ced7ad260449e882c5d2dcb5f4990Evan Cheng 11880d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen // Build a shared array of value types. 118926369a930c523b75fe8f4ba18456ff86f68d5612Jakob Stoklund Olesen SequenceToOffsetTable<SmallVector<MVT::SimpleValueType, 4> > VTSeqs; 1190ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) 1191ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines VTSeqs.add(RC.VTs); 11920d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen VTSeqs.layout(); 11930d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen OS << "\nstatic const MVT::SimpleValueType VTLists[] = {\n"; 11940d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen VTSeqs.emit(OS, printSimpleValueType, "MVT::Other"); 11950d4e2ea00eac5d51a74a54dd504a8f34580041d7Jakob Stoklund Olesen OS << "};\n"; 11965d4314ef720630e6547fe41efec1608d4c14c78eJim Grosbach 1197a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen // Emit SubRegIndex names, skipping 0. 1198a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen OS << "\nstatic const char *const SubRegIndexNameTable[] = { \""; 1199ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 1200ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) { 1201ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << Idx.getName(); 1202ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "\", \""; 12036a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen } 12046a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "\" };\n\n"; 12056a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen 1206a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen // Emit SubRegIndex lane masks, including 0. 1207a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen OS << "\nstatic const unsigned SubRegIndexLaneMaskTable[] = {\n ~0u,\n"; 1208ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Idx : SubRegIndices) { 1209ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << format(" 0x%08x, // ", Idx.LaneMask) << Idx.getName() << '\n'; 1210a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen } 1211a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen OS << " };\n\n"; 1212a6035773d8d29827a124e65c258adbf0dcbb1a5aJakob Stoklund Olesen 12136a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "\n"; 12146a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen 121542de581b2f28985ec0c8fcbb26ab4d78c684247fChris Lattner // Now that all of the structs have been emitted, emit the instances. 121642de581b2f28985ec0c8fcbb26ab4d78c684247fChris Lattner if (!RegisterClasses.empty()) { 1217ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << "\nstatic const TargetRegisterClass *const " 1218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines << "NullRegClasses[] = { nullptr };\n\n"; 12191367fd09cb021bae61e7dd2ee208f76574c8e789Christopher Lamb 12206a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // Emit register class bit mask tables. The first bit mask emitted for a 12216a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // register class, RC, is the set of sub-classes, including RC itself. 12226a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12236a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // If RC has super-registers, also create a list of subreg indices and bit 12246a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // masks, (Idx, Mask). The bit mask has a bit for every superreg regclass, 12256a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // SuperRC, that satisfies: 12266a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12276a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // For all SuperReg in SuperRC: SuperReg:Idx in RC 12286a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12296a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // The 0-terminated list of subreg indices starts at: 12306a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12311a2a19dd3ce2b163837b5f0a1ea474c72527cad6Jakob Stoklund Olesen // RC->getSuperRegIndices() = SuperRegIdxSeqs + ... 12326a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12336a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // The corresponding bitmasks follow the sub-class mask in memory. Each 12346a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // mask has RCMaskWords uint32_t entries. 12356a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // 12366a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // Every bit mask present in the list has at least one bit set. 12378d58e6a9be0ced7ad260449e882c5d2dcb5f4990Evan Cheng 12386a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // Compress the sub-reg index lists. 12396a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen typedef std::vector<const CodeGenSubRegIndex*> IdxList; 12406a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen SmallVector<IdxList, 8> SuperRegIdxLists(RegisterClasses.size()); 1241ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SequenceToOffsetTable<IdxList, deref<llvm::less>> SuperRegIdxSeqs; 12426a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen BitVector MaskBV(RegisterClasses.size()); 12438d58e6a9be0ced7ad260449e882c5d2dcb5f4990Evan Cheng 1244ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 12456a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "static const uint32_t " << RC.getName() << "SubClassMask[] = {\n "; 1246c8e2bb68bbc4a71cc10084c8f89565b9f05e12efJakob Stoklund Olesen printBitVectorAsHex(OS, RC.getSubClasses(), 32); 12476a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen 12486a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // Emit super-reg class masks for any relevant SubRegIndices that can 12496a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen // project into RC. 1250ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines IdxList &SRIList = SuperRegIdxLists[RC.EnumValue]; 1251ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto &Idx : SubRegIndices) { 12526a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen MaskBV.reset(); 1253ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines RC.getSuperRegClasses(&Idx, MaskBV); 12546a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen if (MaskBV.none()) 12556a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen continue; 1256ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines SRIList.push_back(&Idx); 12576a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "\n "; 12586a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen printBitVectorAsHex(OS, MaskBV, 32); 1259ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "// " << Idx.getName(); 12606a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen } 12616a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen SuperRegIdxSeqs.add(SRIList); 1262ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << "\n};\n\n"; 12638d58e6a9be0ced7ad260449e882c5d2dcb5f4990Evan Cheng } 12648d58e6a9be0ced7ad260449e882c5d2dcb5f4990Evan Cheng 12656a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "static const uint16_t SuperRegIdxSeqs[] = {\n"; 12666a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen SuperRegIdxSeqs.layout(); 12676a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen SuperRegIdxSeqs.emit(OS, printSubRegIndex); 12686a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen OS << "};\n\n"; 12696a0ed18532425d637ecc1cc851c559db446ec4e8Jakob Stoklund Olesen 1270f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen // Emit NULL terminated super-class lists. 1271ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1272f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen ArrayRef<CodeGenRegisterClass*> Supers = RC.getSuperClasses(); 12732ca0efd71a5a25c1f3fa8b30dc5459fdaf8cd2a9Evan Cheng 1274f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen // Skip classes without supers. We can reuse NullRegClasses. 1275f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen if (Supers.empty()) 1276f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen continue; 12772ca0efd71a5a25c1f3fa8b30dc5459fdaf8cd2a9Evan Cheng 1278ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << "static const TargetRegisterClass *const " 1279f9a4bb78dadc12c7c1e604c6f17b63a71305c2caJakob Stoklund Olesen << RC.getName() << "Superclasses[] = {\n"; 1280ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto *Super : Supers) 1281ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " &" << Super->getQualifiedName() << "RegClass,\n"; 1282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OS << " nullptr\n};\n\n"; 12832ca0efd71a5a25c1f3fa8b30dc5459fdaf8cd2a9Evan Cheng } 12842ca0efd71a5a25c1f3fa8b30dc5459fdaf8cd2a9Evan Cheng 1285b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen // Emit methods. 1286ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1287b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen if (!RC.AltOrderSelect.empty()) { 1288b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen OS << "\nstatic inline unsigned " << RC.getName() 1289b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen << "AltOrderSelect(const MachineFunction &MF) {" 1290ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer << RC.AltOrderSelect << "}\n\n" 1291e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen << "static ArrayRef<MCPhysReg> " << RC.getName() 1292ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer << "GetRawAllocationOrder(const MachineFunction &MF) {\n"; 1293b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen for (unsigned oi = 1 , oe = RC.getNumOrders(); oi != oe; ++oi) { 1294b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen ArrayRef<Record*> Elems = RC.getOrder(oi); 1295f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen if (!Elems.empty()) { 1296e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen OS << " static const MCPhysReg AltOrder" << oi << "[] = {"; 1297f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen for (unsigned elem = 0; elem != Elems.size(); ++elem) 1298f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen OS << (elem ? ", " : " ") << getQualifiedName(Elems[elem]); 1299f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen OS << " };\n"; 1300f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen } 1301b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen } 1302f496d68493acf8d178afbbe8c3146ea09bd7776bBenjamin Kramer OS << " const MCRegisterClass &MCR = " << Target.getName() 1303f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen << "MCRegisterClasses[" << RC.getQualifiedName() + "RegClassID];\n" 1304e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen << " const ArrayRef<MCPhysReg> Order[] = {\n" 1305f496d68493acf8d178afbbe8c3146ea09bd7776bBenjamin Kramer << " makeArrayRef(MCR.begin(), MCR.getNumRegs()"; 1306b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen for (unsigned oi = 1, oe = RC.getNumOrders(); oi != oe; ++oi) 1307f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen if (RC.getOrder(oi).empty()) 1308e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen OS << "),\n ArrayRef<MCPhysReg>("; 1309f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen else 1310f18a9a2314542ad3b7a601b86969073519e19b0dJakob Stoklund Olesen OS << "),\n makeArrayRef(AltOrder" << oi; 1311b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen OS << ")\n };\n const unsigned Select = " << RC.getName() 1312b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen << "AltOrderSelect(MF);\n assert(Select < " << RC.getNumOrders() 1313b4c704877d1600852a55ab7bef2918a7c0af5e0dJakob Stoklund Olesen << ");\n return Order[Select];\n}\n"; 1314ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 131560200e5d32f63b4e54575f5cbec348f3f9baeb5dChris Lattner } 13165d4314ef720630e6547fe41efec1608d4c14c78eJim Grosbach 1317ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer // Now emit the actual value-initialized register class instances. 1318ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "\nnamespace " << RegisterClasses.front().Namespace 1319ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer << " { // Register class instances\n"; 1320ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer 1321ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1322ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " extern const TargetRegisterClass " << RC.getName() 1323ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "RegClass = {\n " << '&' << Target.getName() 1324ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "MCRegisterClasses[" << RC.getName() << "RegClassID],\n " 1325ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "VTLists + " << VTSeqs.get(RC.VTs) << ",\n " << RC.getName() 1326ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << "SubClassMask,\n SuperRegIdxSeqs + " 1327ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << SuperRegIdxSeqs.get(SuperRegIdxLists[RC.EnumValue]) << ",\n " 13284c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar << format("0x%08x,\n ", RC.LaneMask) 13290c7f116bb6950ef819323d855415b2f2b0aad987Pirama Arumuga Nainar << (unsigned)RC.AllocationPriority << ",\n " 13304c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar << (RC.HasDisjunctSubRegs?"true":"false") 1331de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << ", /* HasDisjunctSubRegs */\n " 1332de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << (RC.CoveredBySubRegs?"true":"false") 1333de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << ", /* CoveredBySubRegs */\n "; 1334ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer if (RC.getSuperClasses().empty()) 1335ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << "NullRegClasses,\n "; 1336ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer else 1337ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << RC.getName() << "Superclasses,\n "; 1338ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer if (RC.AltOrderSelect.empty()) 1339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OS << "nullptr\n"; 1340ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer else 1341ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << RC.getName() << "GetRawAllocationOrder\n"; 1342ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer OS << " };\n\n"; 1343ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer } 1344ccc8d3ba06408feff0ca6e58973c20d15010e3fcBenjamin Kramer 1345de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n"; 13469fff8919eefa377936918eec763b392e59049353Chris Lattner } 13479fff8919eefa377936918eec763b392e59049353Chris Lattner 134842de581b2f28985ec0c8fcbb26ab4d78c684247fChris Lattner OS << "\nnamespace {\n"; 13499fff8919eefa377936918eec763b392e59049353Chris Lattner OS << " const TargetRegisterClass* const RegisterClasses[] = {\n"; 1350ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) 1351ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " &" << RC.getQualifiedName() << "RegClass,\n"; 13529fff8919eefa377936918eec763b392e59049353Chris Lattner OS << " };\n"; 1353de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end anonymous namespace\n"; 135454d156d33324b7715453993f21684915a28e310aChris Lattner 1355a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng // Emit extra information about registers. 13566844f7bcdec8c2691c8d1067d90e4a02cf658c27Evan Cheng const std::string &TargetName = Target.getName(); 13579b1b25f0631b22cd09c2fa7383ce28721fa3e212Craig Topper OS << "\nstatic const TargetRegisterInfoDesc " 13589b1b25f0631b22cd09c2fa7383ce28721fa3e212Craig Topper << TargetName << "RegInfoDesc[] = { // Extra Descriptors\n"; 1359de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << " { 0, false },\n"; 136026693113201f4c9d441678e50d96f38d3288798eChris Lattner 1361ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const auto &Regs = RegBank.getRegisters(); 1362ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &Reg : Regs) { 13639b1b25f0631b22cd09c2fa7383ce28721fa3e212Craig Topper OS << " { "; 1364a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng OS << Reg.CostPerUse << ", " 1365de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << ( AllocatableRegs.count(Reg.TheDef) != 0 ? "true" : "false" ) 1366de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar << " },\n"; 13679fff8919eefa377936918eec763b392e59049353Chris Lattner } 13689b1b25f0631b22cd09c2fa7383ce28721fa3e212Craig Topper OS << "};\n"; // End of register descriptors... 13691fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen 1370a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng 13717884b750c33b750177b3f22af75c874c97f728d8Chris Lattner std::string ClassName = Target.getName() + "GenRegisterInfo"; 13723da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman 1373ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines auto SubRegIndicesSize = 1374ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines std::distance(SubRegIndices.begin(), SubRegIndices.end()); 1375ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 1376ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (!SubRegIndices.empty()) { 1377ad0b3b21e3abea7a9e9918ae1724f7dd7376b2cfJakob Stoklund Olesen emitComposeSubRegIndices(OS, RegBank, ClassName); 1378ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines emitComposeSubRegIndexLaneMask(OS, RegBank, ClassName); 1379ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 13807c9a6e328407d681414aa66f3e80f92c3d35ad5cJakob Stoklund Olesen 1381845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen // Emit getSubClassWithSubReg. 1382309076ff76c61e03ddd3a0fbbfded3042d2da2e5Jakob Stoklund Olesen if (!SubRegIndices.empty()) { 1383309076ff76c61e03ddd3a0fbbfded3042d2da2e5Jakob Stoklund Olesen OS << "const TargetRegisterClass *" << ClassName 1384309076ff76c61e03ddd3a0fbbfded3042d2da2e5Jakob Stoklund Olesen << "::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx)" 1385309076ff76c61e03ddd3a0fbbfded3042d2da2e5Jakob Stoklund Olesen << " const {\n"; 1386845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen // Use the smallest type that can hold a regclass ID with room for a 1387845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen // sentinel. 1388845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen if (RegisterClasses.size() < UINT8_MAX) 1389845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen OS << " static const uint8_t Table["; 1390845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen else if (RegisterClasses.size() < UINT16_MAX) 1391845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen OS << " static const uint16_t Table["; 1392845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen else 139361131ab15fd593a2e295d79fe2714e7bc21f2ec8Joerg Sonnenberger PrintFatalError("Too many register classes."); 1394ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n"; 1395ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (const auto &RC : RegisterClasses) { 1396845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen OS << " {\t// " << RC.getName() << "\n"; 1397ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines for (auto &Idx : SubRegIndices) { 1398ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines if (CodeGenRegisterClass *SRC = RC.getSubClassWithSubReg(&Idx)) 1399ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " " << SRC->EnumValue + 1 << ",\t// " << Idx.getName() 1400845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen << " -> " << SRC->getName() << "\n"; 1401845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen else 1402ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << " 0,\t// " << Idx.getName() << "\n"; 1403845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen } 1404845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen OS << " },\n"; 1405845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen } 1406845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen OS << " };\n assert(RC && \"Missing regclass\");\n" 1407845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen << " if (!Idx) return RC;\n --Idx;\n" 1408ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " assert(Idx < " << SubRegIndicesSize << " && \"Bad subreg\");\n" 1409845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen << " unsigned TV = Table[RC->getID()][Idx];\n" 1410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines << " return TV ? getRegClass(TV - 1) : nullptr;\n}\n\n"; 1411845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen } 1412845d2c0c776abce551d16f7b1b7dc1f4d4df1a27Jakob Stoklund Olesen 1413176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick EmitRegUnitPressure(OS, RegBank, ClassName); 1414176194d4ee2774bc135ababc5bd6c6c9f606b2a5Andrew Trick 14159fff8919eefa377936918eec763b392e59049353Chris Lattner // Emit the constructor of the class... 14161a2f9886a2a60dbd41216468a240446bbfed3e76Benjamin Kramer OS << "extern const MCRegisterDesc " << TargetName << "RegDesc[];\n"; 1417e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen OS << "extern const MCPhysReg " << TargetName << "RegDiffLists[];\n"; 1418ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines OS << "extern const unsigned " << TargetName << "LaneMaskLists[];\n"; 1419d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen OS << "extern const char " << TargetName << "RegStrings[];\n"; 142037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines OS << "extern const char " << TargetName << "RegClassStrings[];\n"; 1421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OS << "extern const MCPhysReg " << TargetName << "RegUnitRoots[][2];\n"; 14220371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen OS << "extern const uint16_t " << TargetName << "SubRegIdxLists[];\n"; 1423bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha OS << "extern const MCRegisterInfo::SubRegCoveredBits " 1424bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha << TargetName << "SubRegIdxRanges[];\n"; 14250ee07e013095e8c298fbcc5203e0bc9f334e15e1Jim Grosbach OS << "extern const uint16_t " << TargetName << "RegEncodingTable[];\n"; 1426c60f9b752381baa6c4b80c0739034660f1748c84Evan Cheng 1427243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer EmitRegMappingTables(OS, Regs, true); 1428243018ffcf764e4dde2968f909f4a2e578aafe86Benjamin Kramer 1429b3acdcc00c9dfb01663780e858e586cc5f04423fJim Grosbach OS << ClassName << "::\n" << ClassName 1430fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach << "(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour, unsigned PC)\n" 14316844f7bcdec8c2691c8d1067d90e4a02cf658c27Evan Cheng << " : TargetRegisterInfo(" << TargetName << "RegInfoDesc" 14321fc8e759a767077726f9be35b93767e68bdf101fJakob Stoklund Olesen << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n" 1433997fa623fc14122153c58ddda8c90aa30f192cc8Jakob Stoklund Olesen << " SubRegIndexNameTable, SubRegIndexLaneMaskTable, 0x"; 1434997fa623fc14122153c58ddda8c90aa30f192cc8Jakob Stoklund Olesen OS.write_hex(RegBank.CoveringLanes); 1435997fa623fc14122153c58ddda8c90aa30f192cc8Jakob Stoklund Olesen OS << ") {\n" 1436ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " InitMCRegisterInfo(" << TargetName << "RegDesc, " << Regs.size() + 1 1437ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << ", RA, PC,\n " << TargetName 1438b3acdcc00c9dfb01663780e858e586cc5f04423fJim Grosbach << "MCRegisterClasses, " << RegisterClasses.size() << ",\n" 1439f5d4e5158fcbec26d1c243daa725878ca1ae560bJakob Stoklund Olesen << " " << TargetName << "RegUnitRoots,\n" 1440f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen << " " << RegBank.getNumNativeRegUnits() << ",\n" 1441f52baf72c116d9cf8680d25a8e751ce354c7d44bJakob Stoklund Olesen << " " << TargetName << "RegDiffLists,\n" 1442ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " " << TargetName << "LaneMaskLists,\n" 1443d5ce3ffa67698b9d21f58011f370a210a214d301Jakob Stoklund Olesen << " " << TargetName << "RegStrings,\n" 144437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines << " " << TargetName << "RegClassStrings,\n" 14450371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen << " " << TargetName << "SubRegIdxLists,\n" 1446ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines << " " << SubRegIndicesSize + 1 << ",\n" 1447bed23081860275c79137f65d592920e7991b8198Ahmed Bougacha << " " << TargetName << "SubRegIdxRanges,\n" 14480371cd8b1c0d2101295ca9381a0b437e1f2d8fa2Jakob Stoklund Olesen << " " << TargetName << "RegEncodingTable);\n\n"; 14495d4314ef720630e6547fe41efec1608d4c14c78eJim Grosbach 14500e6a052331f674dd70e28af41f654a7874405eabEvan Cheng EmitRegMapping(OS, Regs, true); 14515d4314ef720630e6547fe41efec1608d4c14c78eJim Grosbach 14520e6a052331f674dd70e28af41f654a7874405eabEvan Cheng OS << "}\n\n"; 14534794797f1213c4096a6f5ff2b6841dd5866b22baChris Lattner 1454ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen // Emit CalleeSavedRegs information. 1455ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen std::vector<Record*> CSRSets = 1456ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen Records.getAllDerivedDefinitions("CalleeSavedRegs"); 1457ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen for (unsigned i = 0, e = CSRSets.size(); i != e; ++i) { 1458ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen Record *CSRSet = CSRSets[i]; 1459ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen const SetTheory::RecVec *Regs = RegBank.getSets().expand(CSRSet); 1460ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen assert(Regs && "Cannot expand CalleeSavedRegs instance"); 1461ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen 1462ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen // Emit the *_SaveList list of callee-saved registers. 1463e26e8a64ab37e98c69801ac2028b187773bc1d1fJakob Stoklund Olesen OS << "static const MCPhysReg " << CSRSet->getName() 1464ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen << "_SaveList[] = { "; 1465ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen for (unsigned r = 0, re = Regs->size(); r != re; ++r) 1466ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen OS << getQualifiedName((*Regs)[r]) << ", "; 1467ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen OS << "0 };\n"; 1468ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen 1469ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen // Emit the *_RegMask bit mask of call-preserved registers. 1470d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen BitVector Covered = RegBank.computeCoveredRegisters(*Regs); 1471d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen 1472d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen // Check for an optional OtherPreserved set. 1473d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen // Add those registers to RegMask, but not to SaveList. 1474d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen if (DagInit *OPDag = 1475d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen dyn_cast<DagInit>(CSRSet->getValueInit("OtherPreserved"))) { 1476d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen SetTheory::RecSet OPSet; 1477d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen RegBank.getSets().evaluate(OPDag, OPSet, CSRSet->getLoc()); 1478d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen Covered |= RegBank.computeCoveredRegisters( 1479d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen ArrayRef<Record*>(OPSet.begin(), OPSet.end())); 1480d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen } 1481d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen 1482ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen OS << "static const uint32_t " << CSRSet->getName() 1483ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen << "_RegMask[] = { "; 1484d93969c32a6bbae3326a1f485c4c85be1cb39406Jakob Stoklund Olesen printBitVectorAsHex(OS, Covered, 32); 1485ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen OS << "};\n"; 1486ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen } 1487ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen OS << "\n\n"; 1488ec572539dd5660f9ca42027ac04df3a3f8c0cab1Jakob Stoklund Olesen 1489f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "ArrayRef<const uint32_t *> " << ClassName 1490f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << "::getRegMasks() const {\n"; 1491f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (!CSRSets.empty()) { 1492f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " static const uint32_t *const Masks[] = {\n"; 1493f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar for (Record *CSRSet : CSRSets) 1494f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " " << CSRSet->getName() << "_RegMask,\n"; 1495f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " };\n"; 1496f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " return makeArrayRef(Masks);\n"; 1497f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } else { 1498f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " return None;\n"; 1499f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 1500f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "}\n\n"; 1501f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 1502f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "ArrayRef<const char *> " << ClassName 1503f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << "::getRegMaskNames() const {\n"; 1504f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar if (!CSRSets.empty()) { 1505f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " static const char *const Names[] = {\n"; 1506f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar for (Record *CSRSet : CSRSets) 1507f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " " << '"' << CSRSet->getName() << '"' << ",\n"; 1508f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " };\n"; 1509f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " return makeArrayRef(Names);\n"; 1510f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } else { 1511f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << " return None;\n"; 1512f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar } 1513f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "}\n\n"; 1514f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 1515f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar OS << "const " << TargetName << "FrameLowering *\n" << TargetName 1516f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << "GenRegisterInfo::getFrameLowering(const MachineFunction &MF) {\n" 1517f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " return static_cast<const " << TargetName << "FrameLowering *>(\n" 1518f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << " MF.getSubtarget().getFrameLowering());\n" 1519f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar << "}\n\n"; 1520f3ef5332fa3f4d5ec72c178a2b19dac363a19383Pirama Arumuga Nainar 1521de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar OS << "} // end namespace llvm\n\n"; 152273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng OS << "#endif // GET_REGINFO_TARGET_DESC\n\n"; 15233112326c88b7090f770c4ff8a1546ef84fd2e8bbChris Lattner} 1524a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng 152573f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Chengvoid RegisterInfoEmitter::run(raw_ostream &OS) { 1526a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng CodeGenTarget Target(Records); 1527a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng CodeGenRegBank &RegBank = Target.getRegBank(); 1528a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng RegBank.computeDerivedInfo(); 1529a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng 153073f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng runEnums(OS, Target, RegBank); 153173f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng runMCDesc(OS, Target, RegBank); 1532ebbbfd0e2eeeb5b1a15f0e655a0a2119510713d4Evan Cheng runTargetHeader(OS, Target, RegBank); 153373f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng runTargetDesc(OS, Target, RegBank); 1534a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng} 15356f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 15366f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesennamespace llvm { 15376f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 15386f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesenvoid EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS) { 15396f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen RegisterInfoEmitter(RK).run(OS); 15406f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen} 15416f36fa981a59461466e12e5056ba209d289b81b1Jakob Stoklund Olesen 1542de2d8694e25a814696358e95141f4b1aa4d8847ePirama Arumuga Nainar} // end namespace llvm 1543