isl_gen6.c revision 84f9ef1de4680b48d646841965f963ea2b724ab2 
1/*
2 * Copyright 2015 Intel Corporation
3 *
4 *  Permission is hereby granted, free of charge, to any person obtaining a
5 *  copy of this software and associated documentation files (the "Software"),
6 *  to deal in the Software without restriction, including without limitation
7 *  the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 *  and/or sell copies of the Software, and to permit persons to whom the
9 *  Software is furnished to do so, subject to the following conditions:
10 *
11 *  The above copyright notice and this permission notice (including the next
12 *  paragraph) shall be included in all copies or substantial portions of the
13 *  Software.
14 *
15 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 *  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 *  IN THE SOFTWARE.
22 */
23
24#include "isl_gen6.h"
25#include "isl_priv.h"
26
27bool
28gen6_choose_msaa_layout(const struct isl_device *dev,
29                  const struct isl_surf_init_info *info,
30                  enum isl_tiling tiling,
31                  enum isl_msaa_layout *msaa_layout)
32{
33   assert(ISL_DEV_GEN(dev) == 6);
34   assert(info->samples >= 1);
35
36   if (info->samples == 1) {
37      *msaa_layout = ISL_MSAA_LAYOUT_NONE;
38      return true;
39   }
40
41   if (!isl_format_supports_multisampling(dev->info, info->format))
42      return false;
43
44   /* From the Sandybridge PRM, Volume 4 Part 1 p85, SURFACE_STATE, Number of
45    * Multisamples:
46    *
47    *    If this field is any value other than MULTISAMPLECOUNT_1 the
48    *    following restrictions apply:
49    *
50    *       - the Surface Type must be SURFTYPE_2D
51    *       - [...]
52    */
53   if (info->dim != ISL_SURF_DIM_2D)
54      return false;
55
56   /* More obvious restrictions */
57   if (isl_surf_usage_is_display(info->usage))
58      return false;
59   if (tiling == ISL_TILING_LINEAR)
60      return false;
61   if (info->levels > 1)
62      return false;
63
64   *msaa_layout = ISL_MSAA_LAYOUT_INTERLEAVED;
65   return true;
66}
67
68void
69gen6_choose_image_alignment_el(const struct isl_device *dev,
70                               const struct isl_surf_init_info *restrict info,
71                               enum isl_tiling tiling,
72                               enum isl_dim_layout dim_layout,
73                               enum isl_msaa_layout msaa_layout,
74                               struct isl_extent3d *image_align_el)
75{
76   /* Handled by isl_choose_image_alignment_el */
77   assert(info->format != ISL_FORMAT_HIZ);
78
79   /* Note that the surface's horizontal image alignment is not programmable
80    * on Sandybridge.
81    *
82    * From the Sandybridge PRM (2011-05), Volume 1, Part 1, Section 7.18.3.4
83    * Alignment Unit Size:
84    *
85    *    Note that the compressed formats are padded to a full compression cell.
86    *
87    *    +------------------------+--------+--------+
88    *    | format                 | halign | valign |
89    *    +------------------------+--------+--------+
90    *    | YUV 4:2:2 formats      |      4 |      * |
91    *    | uncompressed formats   |      4 |      * |
92    *    +------------------------+--------+--------+
93    *
94    *    * For these formats, the vertical alignment factor “j” is determined
95    *      as follows:
96    *       - j = 4 for any depth buffer
97    *       - j = 2 for separate stencil buffer
98    *       - j = 4 for any render target surface is multisampled (4x)
99    *       - j = 2 for all other render target surface
100    *
101    * From the Sandrybridge PRM (2011-05), Volume 4, Part 1, Section 2.11.2
102    * SURFACE_STATE, Surface Vertical Alignment:
103    *
104    *    - This field must be set to VALIGN_2 if the Surface Format is 96 bits
105    *      per element (BPE).
106    *
107    *    - Value of 1 [VALIGN_4] is not supported for format YCRCB_NORMAL
108    *      (0x182), YCRCB_SWAPUVY (0x183), YCRCB_SWAPUV (0x18f), YCRCB_SWAPY
109    *      (0x190)
110    */
111
112   if (isl_format_is_compressed(info->format)) {
113      *image_align_el = isl_extent3d(1, 1, 1);
114      return;
115   }
116
117   if (isl_format_is_yuv(info->format)) {
118      *image_align_el = isl_extent3d(4, 2, 1);
119      return;
120   }
121
122   if (info->samples > 1) {
123      *image_align_el = isl_extent3d(4, 4, 1);
124      return;
125   }
126
127   if (isl_surf_usage_is_depth_or_stencil(info->usage) &&
128       !ISL_DEV_USE_SEPARATE_STENCIL(dev)) {
129      /* interleaved depthstencil buffer */
130      *image_align_el = isl_extent3d(4, 4, 1);
131      return;
132   }
133
134   if (isl_surf_usage_is_depth(info->usage)) {
135      /* separate depth buffer */
136      *image_align_el = isl_extent3d(4, 4, 1);
137      return;
138   }
139
140   if (isl_surf_usage_is_stencil(info->usage)) {
141      /* separate stencil buffer */
142      *image_align_el = isl_extent3d(4, 2, 1);
143      return;
144   }
145
146   *image_align_el = isl_extent3d(4, 2, 1);
147}
148