intel_context.h revision 27eedca3e0b9ed47545b8cea8229e3d0a732a103 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef INTELCONTEXT_INC
29#define INTELCONTEXT_INC
30
31
32#include <stdbool.h>
33#include <string.h>
34#include "main/mtypes.h"
35#include "main/mm.h"
36
37#ifdef __cplusplus
38extern "C" {
39	/* Evil hack for using libdrm in a c++ compiler. */
40	#define virtual virt
41#endif
42
43#include "drm.h"
44#include "intel_bufmgr.h"
45
46#include "intel_screen.h"
47#include "intel_tex_obj.h"
48#include "i915_drm.h"
49
50#ifdef __cplusplus
51	#undef virtual
52#endif
53
54#include "tnl/t_vertex.h"
55
56#define TAG(x) intel##x
57#include "tnl_dd/t_dd_vertex.h"
58#undef TAG
59
60#define DV_PF_555  (1<<8)
61#define DV_PF_565  (2<<8)
62#define DV_PF_8888 (3<<8)
63#define DV_PF_4444 (8<<8)
64#define DV_PF_1555 (9<<8)
65
66struct intel_region;
67struct intel_context;
68
69typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70                                intelVertex *, intelVertex *);
71typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72                                 intelVertex *);
73typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75/**
76 * Bits for intel->Fallback field
77 */
78/*@{*/
79#define INTEL_FALLBACK_DRAW_BUFFER	 0x1
80#define INTEL_FALLBACK_READ_BUFFER	 0x2
81#define INTEL_FALLBACK_DEPTH_BUFFER      0x4
82#define INTEL_FALLBACK_STENCIL_BUFFER    0x8
83#define INTEL_FALLBACK_USER		 0x10
84#define INTEL_FALLBACK_RENDERMODE	 0x20
85#define INTEL_FALLBACK_TEXTURE   	 0x40
86#define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
87/*@}*/
88
89extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90                          bool mode);
91#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94#define INTEL_WRITE_PART  0x1
95#define INTEL_WRITE_FULL  0x2
96#define INTEL_READ        0x4
97
98#define INTEL_MAX_FIXUP 64
99
100#ifndef likely
101#ifdef __GNUC__
102#define likely(expr) (__builtin_expect(expr, 1))
103#define unlikely(expr) (__builtin_expect(expr, 0))
104#else
105#define likely(expr) (expr)
106#define unlikely(expr) (expr)
107#endif
108#endif
109
110struct intel_sync_object {
111   struct gl_sync_object Base;
112
113   /** Batch associated with this sync object */
114   drm_intel_bo *bo;
115};
116
117struct brw_context;
118
119struct intel_batchbuffer {
120   /** Current batchbuffer being queued up. */
121   drm_intel_bo *bo;
122   /** Last BO submitted to the hardware.  Used for glFinish(). */
123   drm_intel_bo *last_bo;
124   /** BO for post-sync nonzero writes for gen6 workaround. */
125   drm_intel_bo *workaround_bo;
126   bool need_workaround_flush;
127
128   struct cached_batch_item *cached_items;
129
130   uint16_t emit, total;
131   uint16_t used, reserved_space;
132   uint32_t *map;
133   uint32_t *cpu_map;
134#define BATCH_SZ (8192*sizeof(uint32_t))
135
136   uint32_t state_batch_offset;
137   bool is_blit;
138   bool needs_sol_reset;
139
140   struct {
141      uint16_t used;
142      int reloc_count;
143   } saved;
144};
145
146/**
147 * intel_context is derived from Mesa's context class: struct gl_context.
148 */
149struct intel_context
150{
151   struct gl_context ctx;  /**< base class, must be first field */
152
153   struct
154   {
155      void (*destroy) (struct intel_context * intel);
156      void (*emit_state) (struct intel_context * intel);
157      void (*finish_batch) (struct intel_context * intel);
158      void (*new_batch) (struct intel_context * intel);
159      void (*emit_invarient_state) (struct intel_context * intel);
160      void (*update_texture_state) (struct intel_context * intel);
161
162      void (*render_start) (struct intel_context * intel);
163      void (*render_prevalidate) (struct intel_context * intel);
164      void (*set_draw_region) (struct intel_context * intel,
165                               struct intel_region * draw_regions[],
166                               struct intel_region * depth_region,
167			       GLuint num_regions);
168      void (*update_draw_buffer)(struct intel_context *intel);
169
170      void (*reduced_primitive_state) (struct intel_context * intel,
171                                       GLenum rprim);
172
173      bool (*check_vertex_size) (struct intel_context * intel,
174				      GLuint expected);
175      void (*invalidate_state) (struct intel_context *intel,
176				GLuint new_state);
177
178      void (*assert_not_dirty) (struct intel_context *intel);
179
180      void (*debug_batch)(struct intel_context *intel);
181      void (*annotate_aub)(struct intel_context *intel);
182      bool (*render_target_supported)(struct intel_context *intel,
183				      struct gl_renderbuffer *rb);
184
185      /**
186       * Surface state operations (i965+ only)
187       * \{
188       */
189      void (*update_texture_surface)(struct gl_context *ctx,
190                                     unsigned unit,
191                                     uint32_t *binding_table,
192                                     unsigned surf_index);
193      void (*update_renderbuffer_surface)(struct brw_context *brw,
194					  struct gl_renderbuffer *rb,
195					  bool layered,
196					  unsigned unit);
197      void (*update_null_renderbuffer_surface)(struct brw_context *brw,
198					       unsigned unit);
199      void (*create_constant_surface)(struct brw_context *brw,
200				      drm_intel_bo *bo,
201				      uint32_t offset,
202				      uint32_t size,
203				      uint32_t *out_offset,
204                                      bool dword_pitch);
205      /** \} */
206   } vtbl;
207
208   GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
209   GLuint NewGLState;
210
211   dri_bufmgr *bufmgr;
212   unsigned int maxBatchSize;
213
214   /**
215    * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
216    */
217   int gen;
218   int gt;
219   bool needs_ff_sync;
220   bool is_haswell;
221   bool is_baytrail;
222   bool is_g4x;
223   bool is_945;
224   bool has_llc;
225   bool has_swizzling;
226
227   int urb_size;
228
229   drm_intel_context *hw_ctx;
230
231   struct intel_batchbuffer batch;
232
233   drm_intel_bo *first_post_swapbuffers_batch;
234   bool need_throttle;
235   bool no_batch_wrap;
236   bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
237
238   /**
239    * Set if we're either a debug context or the INTEL_DEBUG=perf environment
240    * variable is set, this is the flag indicating to do expensive work that
241    * might lead to a perf_debug() call.
242    */
243   bool perf_debug;
244
245   struct
246   {
247      GLuint id;
248      uint32_t start_ptr; /**< for i8xx */
249      uint32_t primitive;	/**< Current hardware primitive type */
250      void (*flush) (struct intel_context *);
251      drm_intel_bo *vb_bo;
252      uint8_t *vb;
253      unsigned int start_offset; /**< Byte offset of primitive sequence */
254      unsigned int current_offset; /**< Byte offset of next vertex */
255      unsigned int count;	/**< Number of vertices in current primitive */
256   } prim;
257
258   struct {
259      drm_intel_bo *bo;
260      GLuint offset;
261      uint32_t buffer_len;
262      uint32_t buffer_offset;
263      char buffer[4096];
264   } upload;
265
266   uint32_t max_gtt_map_object_size;
267
268   GLuint stats_wm;
269
270   /* Offsets of fields within the current vertex:
271    */
272   GLuint coloroffset;
273   GLuint specoffset;
274   GLuint wpos_offset;
275
276   struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
277   GLuint vertex_attr_count;
278
279   GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
280
281   bool hw_stencil;
282   bool hw_stipple;
283   bool no_rast;
284   bool always_flush_batch;
285   bool always_flush_cache;
286   bool disable_throttling;
287
288   /* State for intelvb.c and inteltris.c.
289    */
290   GLuint RenderIndex;
291   GLmatrix ViewportMatrix;
292   GLenum render_primitive;
293   GLenum reduced_primitive; /*< Only gen < 6 */
294   GLuint vertex_size;
295   GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
296
297   /* Fallback rasterization functions
298    */
299   intel_point_func draw_point;
300   intel_line_func draw_line;
301   intel_tri_func draw_tri;
302
303   /**
304    * Set if rendering has occured to the drawable's front buffer.
305    *
306    * This is used in the DRI2 case to detect that glFlush should also copy
307    * the contents of the fake front buffer to the real front buffer.
308    */
309   bool front_buffer_dirty;
310
311   /**
312    * Track whether front-buffer rendering is currently enabled
313    *
314    * A separate flag is used to track this in order to support MRT more
315    * easily.
316    */
317   bool is_front_buffer_rendering;
318   /**
319    * Track whether front-buffer is the current read target.
320    *
321    * This is closely associated with is_front_buffer_rendering, but may
322    * be set separately.  The DRI2 fake front buffer must be referenced
323    * either way.
324    */
325   bool is_front_buffer_reading;
326
327   bool use_early_z;
328
329   int driFd;
330
331   __DRIcontext *driContext;
332   struct intel_screen *intelScreen;
333   void (*saved_viewport)(struct gl_context * ctx,
334			  GLint x, GLint y, GLsizei width, GLsizei height);
335
336   /**
337    * Configuration cache
338    */
339   driOptionCache optionCache;
340};
341
342extern char *__progname;
343
344
345#define SUBPIXEL_X 0.125
346#define SUBPIXEL_Y 0.125
347
348/**
349 * Align a value down to an alignment value
350 *
351 * If \c value is not already aligned to the requested alignment value, it
352 * will be rounded down.
353 *
354 * \param value  Value to be rounded
355 * \param alignment  Alignment value to be used.  This must be a power of two.
356 *
357 * \sa ALIGN()
358 */
359#define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
360
361static INLINE uint32_t
362U_FIXED(float value, uint32_t frac_bits)
363{
364   value *= (1 << frac_bits);
365   return value < 0 ? 0 : value;
366}
367
368static INLINE uint32_t
369S_FIXED(float value, uint32_t frac_bits)
370{
371   return value * (1 << frac_bits);
372}
373
374#define INTEL_FIREVERTICES(intel)		\
375do {						\
376   if ((intel)->prim.flush)			\
377      (intel)->prim.flush(intel);		\
378} while (0)
379
380/* ================================================================
381 * From linux kernel i386 header files, copes with odd sizes better
382 * than COPY_DWORDS would:
383 * XXX Put this in src/mesa/main/imports.h ???
384 */
385#if defined(i386) || defined(__i386__)
386static INLINE void * __memcpy(void * to, const void * from, size_t n)
387{
388   int d0, d1, d2;
389   __asm__ __volatile__(
390      "rep ; movsl\n\t"
391      "testb $2,%b4\n\t"
392      "je 1f\n\t"
393      "movsw\n"
394      "1:\ttestb $1,%b4\n\t"
395      "je 2f\n\t"
396      "movsb\n"
397      "2:"
398      : "=&c" (d0), "=&D" (d1), "=&S" (d2)
399      :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
400      : "memory");
401   return (to);
402}
403#else
404#define __memcpy(a,b,c) memcpy(a,b,c)
405#endif
406
407
408/* ================================================================
409 * Debugging:
410 */
411extern int INTEL_DEBUG;
412
413#define DEBUG_TEXTURE	0x1
414#define DEBUG_STATE	0x2
415#define DEBUG_IOCTL	0x4
416#define DEBUG_BLIT	0x8
417#define DEBUG_MIPTREE   0x10
418#define DEBUG_PERF	0x20
419#define DEBUG_BATCH     0x80
420#define DEBUG_PIXEL     0x100
421#define DEBUG_BUFMGR    0x200
422#define DEBUG_REGION    0x400
423#define DEBUG_FBO       0x800
424#define DEBUG_GS        0x1000
425#define DEBUG_SYNC	0x2000
426#define DEBUG_PRIMS	0x4000
427#define DEBUG_VERTS	0x8000
428#define DEBUG_DRI       0x10000
429#define DEBUG_SF        0x20000
430#define DEBUG_STATS     0x100000
431#define DEBUG_WM        0x400000
432#define DEBUG_URB       0x800000
433#define DEBUG_VS        0x1000000
434#define DEBUG_CLIP      0x2000000
435#define DEBUG_AUB       0x4000000
436#define DEBUG_SHADER_TIME 0x8000000
437#define DEBUG_BLORP     0x10000000
438#define DEBUG_NO16      0x20000000
439
440#ifdef HAVE_ANDROID_PLATFORM
441#define LOG_TAG "INTEL-MESA"
442#include <cutils/log.h>
443#ifndef ALOGW
444#define ALOGW LOGW
445#endif
446#define dbg_printf(...)	ALOGW(__VA_ARGS__)
447#else
448#define dbg_printf(...)	printf(__VA_ARGS__)
449#endif /* HAVE_ANDROID_PLATFORM */
450
451#define DBG(...) do {						\
452	if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))		\
453		dbg_printf(__VA_ARGS__);			\
454} while(0)
455
456#define perf_debug(...) do {					\
457   static GLuint msg_id = 0;                                    \
458   if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
459      dbg_printf(__VA_ARGS__);                                  \
460   if (intel->perf_debug)                                       \
461      _mesa_gl_debug(&intel->ctx, &msg_id,                      \
462                     MESA_DEBUG_TYPE_PERFORMANCE,               \
463                     MESA_DEBUG_SEVERITY_MEDIUM,                \
464                     __VA_ARGS__);                              \
465} while(0)
466
467#define WARN_ONCE(cond, fmt...) do {                            \
468   if (unlikely(cond)) {                                        \
469      static bool _warned = false;                              \
470      static GLuint msg_id = 0;                                 \
471      if (!_warned) {                                           \
472         fprintf(stderr, "WARNING: ");                          \
473         fprintf(stderr, fmt);                                  \
474         _warned = true;                                        \
475                                                                \
476         _mesa_gl_debug(ctx, &msg_id,                           \
477                        MESA_DEBUG_TYPE_OTHER,                  \
478                        MESA_DEBUG_SEVERITY_HIGH, fmt);         \
479      }                                                         \
480   }                                                            \
481} while (0)
482
483#define PCI_CHIP_845_G			0x2562
484#define PCI_CHIP_I830_M			0x3577
485#define PCI_CHIP_I855_GM		0x3582
486#define PCI_CHIP_I865_G			0x2572
487#define PCI_CHIP_I915_G			0x2582
488#define PCI_CHIP_I915_GM		0x2592
489#define PCI_CHIP_I945_G			0x2772
490#define PCI_CHIP_I945_GM		0x27A2
491#define PCI_CHIP_I945_GME		0x27AE
492#define PCI_CHIP_G33_G			0x29C2
493#define PCI_CHIP_Q35_G			0x29B2
494#define PCI_CHIP_Q33_G			0x29D2
495
496
497/* ================================================================
498 * intel_context.c:
499 */
500
501extern bool intelInitContext(struct intel_context *intel,
502                             int api,
503                             unsigned major_version,
504                             unsigned minor_version,
505                             const struct gl_config * mesaVis,
506                             __DRIcontext * driContextPriv,
507                             void *sharedContextPrivate,
508                             struct dd_function_table *functions,
509                             unsigned *dri_ctx_error);
510
511extern void intelFinish(struct gl_context * ctx);
512extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
513extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
514
515#define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
516
517extern void intelInitDriverFunctions(struct dd_function_table *functions);
518
519void intel_init_syncobj_functions(struct dd_function_table *functions);
520
521
522/* ================================================================
523 * intel_state.c:
524 */
525
526#define COMPAREFUNC_ALWAYS		0
527#define COMPAREFUNC_NEVER		0x1
528#define COMPAREFUNC_LESS		0x2
529#define COMPAREFUNC_EQUAL		0x3
530#define COMPAREFUNC_LEQUAL		0x4
531#define COMPAREFUNC_GREATER		0x5
532#define COMPAREFUNC_NOTEQUAL		0x6
533#define COMPAREFUNC_GEQUAL		0x7
534
535#define STENCILOP_KEEP			0
536#define STENCILOP_ZERO			0x1
537#define STENCILOP_REPLACE		0x2
538#define STENCILOP_INCRSAT		0x3
539#define STENCILOP_DECRSAT		0x4
540#define STENCILOP_INCR			0x5
541#define STENCILOP_DECR			0x6
542#define STENCILOP_INVERT		0x7
543
544#define LOGICOP_CLEAR			0
545#define LOGICOP_NOR			0x1
546#define LOGICOP_AND_INV 		0x2
547#define LOGICOP_COPY_INV		0x3
548#define LOGICOP_AND_RVRSE		0x4
549#define LOGICOP_INV			0x5
550#define LOGICOP_XOR			0x6
551#define LOGICOP_NAND			0x7
552#define LOGICOP_AND			0x8
553#define LOGICOP_EQUIV			0x9
554#define LOGICOP_NOOP			0xa
555#define LOGICOP_OR_INV			0xb
556#define LOGICOP_COPY			0xc
557#define LOGICOP_OR_RVRSE		0xd
558#define LOGICOP_OR			0xe
559#define LOGICOP_SET			0xf
560
561#define BLENDFACT_ZERO			0x01
562#define BLENDFACT_ONE			0x02
563#define BLENDFACT_SRC_COLR		0x03
564#define BLENDFACT_INV_SRC_COLR 		0x04
565#define BLENDFACT_SRC_ALPHA		0x05
566#define BLENDFACT_INV_SRC_ALPHA 	0x06
567#define BLENDFACT_DST_ALPHA		0x07
568#define BLENDFACT_INV_DST_ALPHA 	0x08
569#define BLENDFACT_DST_COLR		0x09
570#define BLENDFACT_INV_DST_COLR		0x0a
571#define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
572#define BLENDFACT_CONST_COLOR		0x0c
573#define BLENDFACT_INV_CONST_COLOR	0x0d
574#define BLENDFACT_CONST_ALPHA		0x0e
575#define BLENDFACT_INV_CONST_ALPHA	0x0f
576#define BLENDFACT_MASK          	0x0f
577
578enum {
579   DRI_CONF_BO_REUSE_DISABLED,
580   DRI_CONF_BO_REUSE_ALL
581};
582
583extern int intel_translate_shadow_compare_func(GLenum func);
584extern int intel_translate_compare_func(GLenum func);
585extern int intel_translate_stencil_op(GLenum op);
586extern int intel_translate_blend_factor(GLenum factor);
587extern int intel_translate_logic_op(GLenum opcode);
588
589void intel_update_renderbuffers(__DRIcontext *context,
590				__DRIdrawable *drawable);
591void intel_prepare_render(struct intel_context *intel);
592
593void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
594				  uint32_t buffer_id);
595void intel_init_texture_formats(struct gl_context *ctx);
596
597/*======================================================================
598 * Inline conversion functions.
599 * These are better-typed than the macros used previously:
600 */
601static INLINE struct intel_context *
602intel_context(struct gl_context * ctx)
603{
604   return (struct intel_context *) ctx;
605}
606
607static INLINE bool
608is_power_of_two(uint32_t value)
609{
610   return (value & (value - 1)) == 0;
611}
612
613#ifdef __cplusplus
614}
615#endif
616
617#endif
618