15df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 308cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger/** 318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \file radeon_screen.c 328cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * Screen initialization functions for the Radeon driver. 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * 348cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author Kevin E. Martin <martin@valinux.com> 358cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author Gareth Hughes <gareth@valinux.com> 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3872cd2c8c0c863873d280a0e49dfa381e5c3236c8Dave Airlie#include <errno.h> 39ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/glheader.h" 40ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/imports.h" 41ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/mtypes.h" 42ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/framebuffer.h" 43ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/renderbuffer.h" 44b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff#include "main/fbobject.h" 45d0dc75c000d5af92648c7de901756400672b8447Brian Paul#include "swrast/s_renderbuffer.h" 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 473a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "radeon_chipset.h" 483a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "radeon_screen.h" 4923d3559bd4ece1fcab5513ebdaa38600d6654374Dave Airlie#include "radeon_common.h" 50b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff#include "radeon_common_context.h" 51858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#if defined(RADEON_R100) 523a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "radeon_context.h" 535e600209f4908ece2ba8b7f880e1d7e950d2cfb4Chris Rankin#include "radeon_tex.h" 54858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#elif defined(RADEON_R200) 553a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "r200_context.h" 564f96000e294fa0d6ba6f5915ff508017d9c26d50Chris Rankin#include "r200_tex.h" 573a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#endif 585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "utils.h" 605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6174d563cdfbfb07cc666d60dc909e90ddb9949cbbKeith Whitwell#include "GL/internal/dri_interface.h" 625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 63d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul/* Radeon configuration 64d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul */ 65d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul#include "xmlpool.h" 66d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul 67ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie#define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \ 68ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave AirlieDRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \ 69ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie DRI_CONF_DESC(en,"Size of command buffer (in KB)") \ 70ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \ 71ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave AirlieDRI_CONF_OPT_END 72ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie 73858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#if defined(RADEON_R100) /* R100 */ 746868923702d5cdb93d06627ea4f40abe99cda75aEric Anholtstatic const __DRIconfigOptionsExtension radeon_config_options = { 756868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt .base = { __DRI_CONFIG_OPTIONS, 1 }, 766868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt .xml = 77d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian PaulDRI_CONF_BEGIN 78d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_PERFORMANCE 79d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN) 80d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) 81d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0) 82f76ff7e4a7b728258606950f182a0a9a8cce791bRoland Scheidegger DRI_CONF_MAX_TEXTURE_UNITS(3,2,3) 83ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_HYPERZ("false") 84ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32) 85d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 86d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_QUALITY 87d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB) 88effc73931f86c7961b4eb296d2d4c5d91624a9e3Felix Kuehling DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0") 89ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_NO_NEG_LOD_BIAS("false") 90ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_FORCE_S3TC_ENABLE("false") 91d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER) 92d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC) 93d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF) 94d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 95d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_DEBUG 96ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_NO_RAST("false") 97d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 986868923702d5cdb93d06627ea4f40abe99cda75aEric AnholtDRI_CONF_END 996868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt}; 100d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul 101858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#elif defined(RADEON_R200) 1026868923702d5cdb93d06627ea4f40abe99cda75aEric Anholtstatic const __DRIconfigOptionsExtension radeon_config_options = { 1036868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt .base = { __DRI_CONFIG_OPTIONS, 1 }, 1046868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt .xml = 1053a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric AnholtDRI_CONF_BEGIN 1063a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_PERFORMANCE 1073a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN) 1083a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) 1093a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0) 110f76ff7e4a7b728258606950f182a0a9a8cce791bRoland Scheidegger DRI_CONF_MAX_TEXTURE_UNITS(6,2,6) 111ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_HYPERZ("false") 112ed3a1cce73fcd0d6f4b6e9b5f69a98ad179ddc4bDave Airlie DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32) 1133a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_END 1143a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_QUALITY 1153a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB) 1163a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0") 117ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_NO_NEG_LOD_BIAS("false") 118ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_FORCE_S3TC_ENABLE("false") 1193a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER) 1203a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC) 1213a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF) 1223a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0") 1233a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_END 1243a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_DEBUG 125ea6cf2b68614e9f8d0db44ee917ce93f9ad1ac2fEric Anholt DRI_CONF_NO_RAST("false") 1263a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt DRI_CONF_SECTION_END 1276868923702d5cdb93d06627ea4f40abe99cda75aEric AnholtDRI_CONF_END 1286868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt}; 129858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#endif 1305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 131e93d413a0d81f591318f362f770083e9ecc7e0c0Alex Deucher#ifndef RADEON_INFO_TILE_CONFIG 132e93d413a0d81f591318f362f770083e9ecc7e0c0Alex Deucher#define RADEON_INFO_TILE_CONFIG 0x6 133e93d413a0d81f591318f362f770083e9ecc7e0c0Alex Deucher#endif 134e93d413a0d81f591318f362f770083e9ecc7e0c0Alex Deucher 1356a9f0a27c3853738e4bbfb33e8b20464a7d92923Dave Airliestatic int 136d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonGetParam(__DRIscreen *sPriv, int param, void *value) 1376a9f0a27c3853738e4bbfb33e8b20464a7d92923Dave Airlie{ 1383d83a709b94e72608a061449bc30edc8af7c9eccMaciej Cencora struct drm_radeon_info info = { 0 }; 139741aaaa2881e5ab60cfa55f081f7b9ca6f4de46bJerome Glisse 14048926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov info.value = (uint64_t)(uintptr_t)value; 14148926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov switch (param) { 14248926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov case RADEON_PARAM_DEVICE_ID: 14348926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov info.request = RADEON_INFO_DEVICE_ID; 14448926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov break; 14548926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov case RADEON_PARAM_NUM_GB_PIPES: 14648926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov info.request = RADEON_INFO_NUM_GB_PIPES; 14748926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov break; 14848926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov case RADEON_PARAM_NUM_Z_PIPES: 14948926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov info.request = RADEON_INFO_NUM_Z_PIPES; 15048926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov break; 15148926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov case RADEON_INFO_TILE_CONFIG: 15248926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov info.request = RADEON_INFO_TILE_CONFIG; 15348926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov break; 15448926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov default: 15548926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov return -EINVAL; 156741aaaa2881e5ab60cfa55f081f7b9ca6f4de46bJerome Glisse } 15748926da0f7a1d1656bfbaf9d5344cc1fa0b6e089Emil Velikov return drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info)); 1586a9f0a27c3853738e4bbfb33e8b20464a7d92923Dave Airlie} 1596a9f0a27c3853738e4bbfb33e8b20464a7d92923Dave Airlie 160858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#if defined(RADEON_R100) 161924bf0d8d3db28941efa97911bdcdd01a3f33b7cDave Airliestatic const __DRItexBufferExtension radeonTexBufferExtension = { 16238f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .base = { __DRI_TEX_BUFFER, 3 }, 16338f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov 16438f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .setTexBuffer = radeonSetTexBuffer, 16538f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .setTexBuffer2 = radeonSetTexBuffer2, 16638f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .releaseTexBuffer = NULL, 167924bf0d8d3db28941efa97911bdcdd01a3f33b7cDave Airlie}; 1688f55f5b77b1f3f6b5777d0e75ba390b67c7a0901Fabio Pedretti#elif defined(RADEON_R200) 1695c80eb7ec13e064b81302da6c672e96a7a7e4e95Dave Airliestatic const __DRItexBufferExtension r200TexBufferExtension = { 17038f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .base = { __DRI_TEX_BUFFER, 3 }, 17138f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov 17238f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .setTexBuffer = r200SetTexBuffer, 17338f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .setTexBuffer2 = r200SetTexBuffer2, 17438f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .releaseTexBuffer = NULL, 1755c80eb7ec13e064b81302da6c672e96a7a7e4e95Dave Airlie}; 176f29f0ae8383888a6493b615edc3bab254cf6df39Kristian Høgsberg#endif 17778a6aa57a0155d72280dd91c05513c847bf76f3bKristian Høgsberg 178646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleinerstatic void 179646d2e9fbc41bf49075013009e9583bec4a51168Mario KleinerradeonDRI2Flush(__DRIdrawable *drawable) 180646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner{ 181646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner radeonContextPtr rmesa; 182646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner 183646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate; 1845a63634a136caa905e7a1fa5da8fe5dc9f26add5Brian Paul radeonFlush(&rmesa->glCtx); 185646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner} 186646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner 187646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleinerstatic const struct __DRI2flushExtensionRec radeonFlushExtension = { 18873b35b913e62c8d3f7d670fce272adf14e3f73f4Emil Velikov .base = { __DRI2_FLUSH, 3 }, 18973b35b913e62c8d3f7d670fce272adf14e3f73f4Emil Velikov 19073b35b913e62c8d3f7d670fce272adf14e3f73f4Emil Velikov .flush = radeonDRI2Flush, 19173b35b913e62c8d3f7d670fce272adf14e3f73f4Emil Velikov .invalidate = dri2InvalidateDrawable, 192646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner}; 193646d2e9fbc41bf49075013009e9583bec4a51168Mario Kleiner 194b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstatic __DRIimage * 1957d40bf25662feea57a804502814634ffa908b58cBrian Paulradeon_create_image_from_name(__DRIscreen *screen, 196b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int width, int height, int format, 197b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int name, int pitch, void *loaderPrivate) 198b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff{ 199b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff __DRIimage *image; 200875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis radeonScreenPtr radeonScreen = screen->driverPrivate; 201b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 202b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (name == 0) 203b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 204b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 2054fdac659f800da0aa4504489f627738c83c94d66Brian Paul image = calloc(1, sizeof *image); 206b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (image == NULL) 207b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 208b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 209b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff switch (format) { 210b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_RGB565: 211eeed49f5f290793870c60b5b635b977a732a1eb4Mark Mueller image->format = MESA_FORMAT_B5G6R5_UNORM; 212b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGB; 213b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 214b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 215b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_XRGB8888: 216ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller image->format = MESA_FORMAT_B8G8R8X8_UNORM; 217b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGB; 218b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 219b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 220b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_ARGB8888: 221ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller image->format = MESA_FORMAT_B8G8R8A8_UNORM; 222b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGBA; 223b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 224b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 225b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff default: 226b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff free(image); 227b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 228b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 229b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 230b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data = loaderPrivate; 231b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->cpp = _mesa_get_format_bytes(image->format); 232b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->width = width; 233b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->pitch = pitch; 234b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->height = height; 235b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 2367d40bf25662feea57a804502814634ffa908b58cBrian Paul image->bo = radeon_bo_open(radeonScreen->bom, 237b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff (uint32_t)name, 238b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->pitch * image->height * image->cpp, 239b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 0, 240b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff RADEON_GEM_DOMAIN_VRAM, 241b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 0); 242b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 243b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (image->bo == NULL) { 244fe72a069d1fcce943f315907b4744b63158938b1Brian Paul free(image); 245b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 246b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 247b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 248b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return image; 249b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff} 250b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 251b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstatic __DRIimage * 252b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffradeon_create_image_from_renderbuffer(__DRIcontext *context, 253b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int renderbuffer, void *loaderPrivate) 254b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff{ 255b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff __DRIimage *image; 256b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff radeonContextPtr radeon = context->driverPrivate; 257b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff struct gl_renderbuffer *rb; 258b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff struct radeon_renderbuffer *rrb; 259b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 2605a63634a136caa905e7a1fa5da8fe5dc9f26add5Brian Paul rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer); 261b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (!rb) { 2625a63634a136caa905e7a1fa5da8fe5dc9f26add5Brian Paul _mesa_error(&radeon->glCtx, 263b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff GL_INVALID_OPERATION, "glRenderbufferExternalMESA"); 264b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 265b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 266b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 267b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff rrb = radeon_renderbuffer(rb); 2684fdac659f800da0aa4504489f627738c83c94d66Brian Paul image = calloc(1, sizeof *image); 269b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (image == NULL) 270b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 271b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 272b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = rb->InternalFormat; 273b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->format = rb->Format; 274b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->cpp = rrb->cpp; 275f9874feef4d8952df5054bd8e8f4e0deda4ef44fBrian Paul image->data_type = GL_UNSIGNED_BYTE; 276b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data = loaderPrivate; 277b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff radeon_bo_ref(rrb->bo); 278b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->bo = rrb->bo; 279b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 280b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->width = rb->Width; 281b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->height = rb->Height; 282b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->pitch = rrb->pitch / image->cpp; 283b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 284b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return image; 285b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff} 286b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 287b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstatic void 288b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffradeon_destroy_image(__DRIimage *image) 289b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff{ 290b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff radeon_bo_unref(image->bo); 291fe72a069d1fcce943f315907b4744b63158938b1Brian Paul free(image); 292b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff} 293b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 294b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstatic __DRIimage * 295b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffradeon_create_image(__DRIscreen *screen, 296b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int width, int height, int format, 297b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff unsigned int use, 298b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff void *loaderPrivate) 299b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff{ 300b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff __DRIimage *image; 301875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis radeonScreenPtr radeonScreen = screen->driverPrivate; 302b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 3034fdac659f800da0aa4504489f627738c83c94d66Brian Paul image = calloc(1, sizeof *image); 304b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (image == NULL) 305b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 306b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 3078de5c355fa2bf0f30df2c7cf39aee01e793284bfJesse Barnes image->dri_format = format; 3088de5c355fa2bf0f30df2c7cf39aee01e793284bfJesse Barnes 309b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff switch (format) { 310b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_RGB565: 311eeed49f5f290793870c60b5b635b977a732a1eb4Mark Mueller image->format = MESA_FORMAT_B5G6R5_UNORM; 312b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGB; 313b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 314b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 315b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_XRGB8888: 316ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller image->format = MESA_FORMAT_B8G8R8X8_UNORM; 317b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGB; 318b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 319b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 320b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_FORMAT_ARGB8888: 321ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller image->format = MESA_FORMAT_B8G8R8A8_UNORM; 322b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->internal_format = GL_RGBA; 323b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data_type = GL_UNSIGNED_BYTE; 324b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff break; 325b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff default: 326b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff free(image); 327b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 328b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 329b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 330b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->data = loaderPrivate; 331b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->cpp = _mesa_get_format_bytes(image->format); 332b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->width = width; 333b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->height = height; 334b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp; 335b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 336b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->bo = radeon_bo_open(radeonScreen->bom, 337b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 0, 338b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff image->pitch * image->height * image->cpp, 339b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 0, 340b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff RADEON_GEM_DOMAIN_VRAM, 341b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 0); 342b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 343b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff if (image->bo == NULL) { 344fe72a069d1fcce943f315907b4744b63158938b1Brian Paul free(image); 345b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return NULL; 346b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 347b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 348b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return image; 349b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff} 350b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 351b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstatic GLboolean 352b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffradeon_query_image(__DRIimage *image, int attrib, int *value) 353b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff{ 354b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff switch (attrib) { 355b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_ATTRIB_STRIDE: 356b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff *value = image->pitch * image->cpp; 357b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return GL_TRUE; 358b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_ATTRIB_HANDLE: 359b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff *value = image->bo->handle; 360b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return GL_TRUE; 361b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff case __DRI_IMAGE_ATTRIB_NAME: 362b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff radeon_gem_get_kernel_name(image->bo, (uint32_t *) value); 363b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return GL_TRUE; 364b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff default: 365b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff return GL_FALSE; 366b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff } 367b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff} 368b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 36938f20f79da4212c86d0869951f533d66a5ef907eEmil Velikovstatic const __DRIimageExtension radeonImageExtension = { 37038f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .base = { __DRI_IMAGE, 1 }, 37138f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov 37238f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .createImageFromName = radeon_create_image_from_name, 37338f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .createImageFromRenderbuffer = radeon_create_image_from_renderbuffer, 37438f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .destroyImage = radeon_destroy_image, 37538f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .createImage = radeon_create_image, 37638f20f79da4212c86d0869951f533d66a5ef907eEmil Velikov .queryImage = radeon_query_image 377b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff}; 378b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 37923d3559bd4ece1fcab5513ebdaa38600d6654374Dave Airliestatic int radeon_set_screen_flags(radeonScreenPtr screen, int device_id) 3805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 381c1ccc7d5394c23a371540e1b2c3d35b0da3b30d6Nicolai Hähnle screen->device_id = device_id; 3823a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_flags = 0; 383efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie switch ( device_id ) { 3841401b96bb9f485eb5c08fb724b4366a16ea93aefFabio Pedretti#if defined(RADEON_R100) 385e015a4c29bf61077a50780cc99381510671b20ecDave Airlie case PCI_CHIP_RN50_515E: 386e015a4c29bf61077a50780cc99381510671b20ecDave Airlie case PCI_CHIP_RN50_5969: 387e015a4c29bf61077a50780cc99381510671b20ecDave Airlie return -1; 388e015a4c29bf61077a50780cc99381510671b20ecDave Airlie 3893a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RADEON_LY: 3903a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RADEON_LZ: 3913a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RADEON_QY: 3923a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RADEON_QZ: 3933a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RV100; 3943a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 3953a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 3963a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS100_4136: 3973a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS100_4336: 3983a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RS100; 3993a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4003a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4013a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS200_4137: 4023a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS200_4337: 4033a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS250_4237: 4043a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS250_4437: 4053a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RS200; 4063a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4073a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QD: 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QE: 4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QF: 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QG: 412de7b071b5534fc423a056abd521de8bf9120f89eRoland Scheidegger /* all original radeons (7200) presumably have a stencil op bug */ 4133a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_R100; 4142ee8704a8a160f2a627669bdf978072a1597c205Dave Airlie screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4153a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4163a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RV200_QW: 418de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger case PCI_CHIP_RV200_QX: 4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_LW: 420de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger case PCI_CHIP_RADEON_LX: 4213a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RV200; 422781a204bcf5599716991e5d36b08a36db5209441Dave Airlie screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4233a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4243a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4251401b96bb9f485eb5c08fb724b4366a16ea93aefFabio Pedretti#elif defined(RADEON_R200) 4263a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_R200_BB: 4273a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_R200_QH: 4283a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_R200_QL: 4293a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_R200_QM: 4303a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_R200; 431781a204bcf5599716991e5d36b08a36db5209441Dave Airlie screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul break; 4333a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4343a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV250_If: 4353a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV250_Ig: 4363a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV250_Ld: 4373a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV250_Lf: 4383a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV250_Lg: 4393a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RV250; 440781a204bcf5599716991e5d36b08a36db5209441Dave Airlie screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4413a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4423a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 443494d0053909f4304c4d8050f8bc859edc7f05e36Alex Deucher case PCI_CHIP_RV280_4C6E: 4443a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5960: 4453a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5961: 4463a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5962: 4473a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5964: 4483a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5965: 4493a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5C61: 4503a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RV280_5C63: 4513a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RV280; 452781a204bcf5599716991e5d36b08a36db5209441Dave Airlie screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4533a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4543a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt 4553a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS300_5834: 4563a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt case PCI_CHIP_RS300_5835: 4574e7766992607db215430ee388751f32692401c0aRoland Scheidegger case PCI_CHIP_RS350_7834: 4584e7766992607db215430ee388751f32692401c0aRoland Scheidegger case PCI_CHIP_RS350_7835: 4593a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt screen->chip_family = CHIP_FAMILY_RS300; 460781a204bcf5599716991e5d36b08a36db5209441Dave Airlie screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED; 4613a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt break; 4621401b96bb9f485eb5c08fb724b4366a16ea93aefFabio Pedretti#endif 4637b97bdba4096180df4e32e6c52f79713a649478bAlex Deucher 4643a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt default: 4653a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt fprintf(stderr, "unknown chip id 0x%x, can't guess.\n", 466efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie device_id); 467efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie return -1; 468efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie } 469efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie 470efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie return 0; 471efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie} 472efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie 4739c65361457f2cc89685792957b66242d3e72b1b4Emil Velikovstatic int 4749c65361457f2cc89685792957b66242d3e72b1b4Emil VelikovradeonQueryRendererInteger(__DRIscreen *psp, int param, 4759c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov unsigned int *value) 4769c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov{ 4779c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate; 4789c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 4799c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov switch (param) { 4809c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_VENDOR_ID: 4819c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = 0x1002; 4829c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 4839c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_DEVICE_ID: 4849c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = screen->device_id; 4859c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 4869c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_ACCELERATED: 4879c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = 1; 4889c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 4899c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_VIDEO_MEMORY: { 4909c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov struct drm_radeon_gem_info gem_info; 4919c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov int retval; 4929c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov memset(&gem_info, 0, sizeof(gem_info)); 4939c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 4949c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov /* Get GEM info. */ 4959c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov retval = drmCommandWriteRead(psp->fd, DRM_RADEON_GEM_INFO, &gem_info, 4969c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov sizeof(gem_info)); 4979c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 4989c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov if (retval) { 4999c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov fprintf(stderr, "radeon: Failed to get MM info, error number %d\n", 5009c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov retval); 5019c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return -1; 5029c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 5039c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov } 5049c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov /* XXX: Do we want to return vram_size or vram_visible ? */ 5059c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = gem_info.vram_size >> 20; 5069c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 5079c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov } 5089c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE: 5099c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = 0; 5109c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 5119c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov default: 5129c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return driQueryRendererIntegerCommon(psp, param, value); 5139c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov } 5149c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov} 5159c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 5169c65361457f2cc89685792957b66242d3e72b1b4Emil Velikovstatic int 5179c65361457f2cc89685792957b66242d3e72b1b4Emil VelikovradeonQueryRendererString(__DRIscreen *psp, int param, const char **value) 5189c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov{ 5199c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate; 5209c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 5219c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov switch (param) { 5229c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_VENDOR_ID: 5239c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = radeonVendorString; 5249c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 5259c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov case __DRI2_RENDERER_DEVICE_ID: 5269c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov value[0] = radeonGetRendererString(screen); 5279c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return 0; 5289c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov default: 5299c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov return -1; 5309c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov } 5319c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov} 5329c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 5339c65361457f2cc89685792957b66242d3e72b1b4Emil Velikovstatic const __DRI2rendererQueryExtension radeonRendererQueryExtension = { 5349c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov .base = { __DRI2_RENDERER_QUERY, 1 }, 5359c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 5369c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov .queryInteger = radeonQueryRendererInteger, 5379c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov .queryString = radeonQueryRendererString 5389c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov}; 5399c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov 540748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov 541748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikovstatic const __DRIextension *radeon_screen_extensions[] = { 542748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov &dri2ConfigQueryExtension.base, 543748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov#if defined(RADEON_R100) 544748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov &radeonTexBufferExtension.base, 545748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov#elif defined(RADEON_R200) 546748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov &r200TexBufferExtension.base, 547748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov#endif 548748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov &radeonFlushExtension.base, 549748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov &radeonImageExtension.base, 5509c65361457f2cc89685792957b66242d3e72b1b4Emil Velikov &radeonRendererQueryExtension.base, 551748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov NULL 552748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov}; 553748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov 5543b43c28195ffce79822728b546a707ee14a03320Jerome Glissestatic radeonScreenPtr 555d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonCreateScreen2(__DRIscreen *sPriv) 5565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5573b43c28195ffce79822728b546a707ee14a03320Jerome Glisse radeonScreenPtr screen; 558efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie int ret; 5593d83a709b94e72608a061449bc30edc8af7c9eccMaciej Cencora uint32_t device_id = 0; 5603b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 5613b43c28195ffce79822728b546a707ee14a03320Jerome Glisse /* Allocate the private area */ 5622b7a972e3f36bfcdc6fbe2b59d7ffdcde49c9405Matt Turner screen = calloc(1, sizeof(*screen)); 5633b43c28195ffce79822728b546a707ee14a03320Jerome Glisse if ( !screen ) { 564d8b14a57a98f4bad6528eda8dd1406c15bdcce75Marius Predut fprintf(stderr, "%s: Could not allocate memory for screen structure", __func__); 5653b43c28195ffce79822728b546a707ee14a03320Jerome Glisse fprintf(stderr, "leaving here\n"); 5663b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return NULL; 5673b43c28195ffce79822728b546a707ee14a03320Jerome Glisse } 5683b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 5694e0d99a63588c67a955f797733da32d04e6f4ee6Pauli Nieminen radeon_init_debug(); 5703b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 5713b43c28195ffce79822728b546a707ee14a03320Jerome Glisse /* parse information in __driConfigOptions */ 5726868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt driParseOptionInfo (&screen->optionCache, radeon_config_options.xml); 5733b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 5743b43c28195ffce79822728b546a707ee14a03320Jerome Glisse screen->chip_flags = 0; 575efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie 576a67c29a268bdfecb910b929e05c0ea02c720caa6Jerome Glisse screen->irq = 1; 577692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie 578741aaaa2881e5ab60cfa55f081f7b9ca6f4de46bJerome Glisse ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id); 579efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie if (ret) { 580fe72a069d1fcce943f315907b4744b63158938b1Brian Paul free( screen ); 581efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret); 582efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie return NULL; 583efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie } 584efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie 585efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie ret = radeon_set_screen_flags(screen, device_id); 586da7029dcb498f80d1837323038617b49cc28431fVinson Lee if (ret == -1) { 587da7029dcb498f80d1837323038617b49cc28431fVinson Lee free(screen); 588efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie return NULL; 589da7029dcb498f80d1837323038617b49cc28431fVinson Lee } 590efe68930dce815b3ecda7dc1164dcd9a504dc525Dave Airlie 591ef3cec5804dfecd60d5d34545d73f9f2dc8b0a22Matt Turner if (getenv("RADEON_NO_TCL")) 5924138bdb3b1e845d8a6172015025e1231fda7dcd1Alex Deucher screen->chip_flags &= ~RADEON_CHIPSET_TCL; 5934138bdb3b1e845d8a6172015025e1231fda7dcd1Alex Deucher 594748b35a69f4b4653ebe1e685ec4fae123d78c68aEmil Velikov sPriv->extensions = radeon_screen_extensions; 595e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 5963b43c28195ffce79822728b546a707ee14a03320Jerome Glisse screen->driScreen = sPriv; 59756c458e0f2027bc19b45ed3112e84b6ace67920fJerome Glisse screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd); 5983b43c28195ffce79822728b546a707ee14a03320Jerome Glisse if (screen->bom == NULL) { 5993b43c28195ffce79822728b546a707ee14a03320Jerome Glisse free(screen); 6003b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return NULL; 6015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6023b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return screen; 6033b43c28195ffce79822728b546a707ee14a03320Jerome Glisse} 6045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6053b43c28195ffce79822728b546a707ee14a03320Jerome Glisse/* Destroy the device specific screen private data struct. 6063b43c28195ffce79822728b546a707ee14a03320Jerome Glisse */ 6073b43c28195ffce79822728b546a707ee14a03320Jerome Glissestatic void 608d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonDestroyScreen( __DRIscreen *sPriv ) 6093b43c28195ffce79822728b546a707ee14a03320Jerome Glisse{ 610875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate; 6113b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 6123b43c28195ffce79822728b546a707ee14a03320Jerome Glisse if (!screen) 6133b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return; 6143b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 615d513915d27eac8a57ff7f5c1973b4a07fe288c53Dave Airlie#ifdef RADEON_BO_TRACK 6169171bfe5f6549858ba952313829c50c5f905cd3dEric Anholt radeon_tracker_print(&screen->bom->tracker, stderr); 617d513915d27eac8a57ff7f5c1973b4a07fe288c53Dave Airlie#endif 6189171bfe5f6549858ba952313829c50c5f905cd3dEric Anholt radeon_bo_manager_gem_dtor(screen->bom); 6193b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 6203b43c28195ffce79822728b546a707ee14a03320Jerome Glisse /* free all option information */ 6213b43c28195ffce79822728b546a707ee14a03320Jerome Glisse driDestroyOptionInfo (&screen->optionCache); 622bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl 623fe72a069d1fcce943f315907b4744b63158938b1Brian Paul free( screen ); 624875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis sPriv->driverPrivate = NULL; 6255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 6265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialize the driver specific screen private data. 6295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 6305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean 631d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonInitDriver( __DRIscreen *sPriv ) 6325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 633875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv ); 634875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis if ( !sPriv->driverPrivate ) { 6353b43c28195ffce79822728b546a707ee14a03320Jerome Glisse radeonDestroyScreen( sPriv ); 6363b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return GL_FALSE; 6373b43c28195ffce79822728b546a707ee14a03320Jerome Glisse } 6385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6393b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return GL_TRUE; 6405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 6415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 642e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 643e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 644e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse/** 645e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse * Create the Mesa framebuffer and renderbuffers for a given window/drawable. 646e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse * 647e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse * \todo This function (and its interface) will need to be updated to support 648e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse * pbuffers. 649e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse */ 650e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glissestatic GLboolean 651d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonCreateBuffer( __DRIscreen *driScrnPriv, 652d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg __DRIdrawable *driDrawPriv, 653d3491e775fb07f891463b2185d74bbad62f3ed24Kristian Høgsberg const struct gl_config *mesaVis, 654e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse GLboolean isPixmap ) 655e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse{ 656875a757ddd103722cfe9a2b21035024aa5a23d32George Sapountzis radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate; 657e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 658e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse const GLboolean swDepth = GL_FALSE; 659e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse const GLboolean swAlpha = GL_FALSE; 660e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse const GLboolean swAccum = mesaVis->accumRedBits > 0; 661e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse const GLboolean swStencil = mesaVis->stencilBits > 0 && 662e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse mesaVis->depthBits != 24; 66371fe9437169cfdafda8814aa814bb85429fb6cfcMark Mueller mesa_format rgbFormat; 6642b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie struct radeon_framebuffer *rfb; 6652b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie 6662b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie if (isPixmap) 6672b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie return GL_FALSE; /* not implemented */ 6682b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie 6692b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie rfb = CALLOC_STRUCT(radeon_framebuffer); 6702b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie if (!rfb) 6712b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie return GL_FALSE; 6722b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie 6732ec50d256d49ff3b987459ed42a5dc66f02a6b9dFrancisco Jerez _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); 674e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 6752f3be8ab14d6f4a3cc44817f6f55bc640faadde0Dave Airlie if (mesaVis->redBits == 5) 676eeed49f5f290793870c60b5b635b977a732a1eb4Mark Mueller rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM; 6772f3be8ab14d6f4a3cc44817f6f55bc640faadde0Dave Airlie else if (mesaVis->alphaBits == 0) 678ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM; 6792f3be8ab14d6f4a3cc44817f6f55bc640faadde0Dave Airlie else 680ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8A8_UNORM : MESA_FORMAT_A8R8G8B8_UNORM; 6812f3be8ab14d6f4a3cc44817f6f55bc640faadde0Dave Airlie 682e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse /* front color renderbuffer */ 6832b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); 684c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base); 6852b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie rfb->color_rb[0]->has_surface = 1; 686e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 687e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse /* back color renderbuffer */ 688e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse if (mesaVis->doubleBufferMode) { 6898c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); 690c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base); 6912b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie rfb->color_rb[1]->has_surface = 1; 692e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse } 693e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 6948c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie if (mesaVis->depthBits == 24) { 6958c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie if (mesaVis->stencilBits == 8) { 696cf0e25d4c89b62f37ff8d1f11c50efcab6557c7fBrian Paul struct radeon_renderbuffer *depthStencilRb = 697a487ef87fe4aa8c4b8e5c0d888bfb18727c8e570Kenneth Graunke radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv); 698c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base); 699c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base); 7008c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie depthStencilRb->has_surface = screen->depthHasSurface; 7018c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie } else { 7028c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie /* depth renderbuffer */ 703cf0e25d4c89b62f37ff8d1f11c50efcab6557c7fBrian Paul struct radeon_renderbuffer *depth = 704a487ef87fe4aa8c4b8e5c0d888bfb18727c8e570Kenneth Graunke radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); 705c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base); 7068c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie depth->has_surface = screen->depthHasSurface; 7078c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie } 7088c7e30fb950c83f5e9e29e60735e999ac608145aDave Airlie } else if (mesaVis->depthBits == 16) { 709cf0e25d4c89b62f37ff8d1f11c50efcab6557c7fBrian Paul /* just 16-bit depth buffer, no hw stencil */ 710cf0e25d4c89b62f37ff8d1f11c50efcab6557c7fBrian Paul struct radeon_renderbuffer *depth = 71150a01d2acafb2a937e62b24258e2e777c0cd1489Mark Mueller radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv); 712c080202db5363a18a759a9a7c82b40ac558c8abeBrian Paul _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base); 7133b43c28195ffce79822728b546a707ee14a03320Jerome Glisse depth->has_surface = screen->depthHasSurface; 714e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse } 715e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 716d0dc75c000d5af92648c7de901756400672b8447Brian Paul _swrast_add_soft_renderbuffers(&rfb->base, 717e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse GL_FALSE, /* color */ 718e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse swDepth, 719e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse swStencil, 720e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse swAccum, 721e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse swAlpha, 722e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse GL_FALSE /* aux */); 7232b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie driDrawPriv->driverPrivate = (void *) rfb; 724e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse 725e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse return (driDrawPriv->driverPrivate != NULL); 726e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse} 7275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7286e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie 7296e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airliestatic void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb) 7306e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie{ 7316e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie struct radeon_renderbuffer *rb; 7326e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie 7336e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb = rfb->color_rb[0]; 7346e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie if (rb && rb->bo) { 7356e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie radeon_bo_unref(rb->bo); 7366e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb->bo = NULL; 7376e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie } 7386e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb = rfb->color_rb[1]; 7396e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie if (rb && rb->bo) { 7406e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie radeon_bo_unref(rb->bo); 7416e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb->bo = NULL; 7426e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie } 7436e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); 7446e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie if (rb && rb->bo) { 7456e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie radeon_bo_unref(rb->bo); 7466e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie rb->bo = NULL; 7476e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie } 7486e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie} 7496e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie 7506e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlievoid 751d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian HøgsbergradeonDestroyBuffer(__DRIdrawable *driDrawPriv) 7525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 7532b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie struct radeon_framebuffer *rfb; 7546e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie if (!driDrawPriv) 7556e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie return; 7566e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie 7572b85fccae5ba33748846f74f90fe0f72c673a4b1Dave Airlie rfb = (void*)driDrawPriv->driverPrivate; 7586e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie if (!rfb) 7596e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie return; 7606e30fe4873f30ccf9edec9ab6113ea647dccb9b7Dave Airlie radeon_cleanup_renderbuffers(rfb); 76131aca27c08d6a385c595d34fe4ee06390bf5b0e8Kristian Høgsberg _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL); 7625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 7635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7643b43c28195ffce79822728b546a707ee14a03320Jerome Glisse/** 7653b43c28195ffce79822728b546a707ee14a03320Jerome Glisse * This is the driver specific part of the createNewScreen entry point. 7663b43c28195ffce79822728b546a707ee14a03320Jerome Glisse * Called when using DRI2. 7673b43c28195ffce79822728b546a707ee14a03320Jerome Glisse * 768d3491e775fb07f891463b2185d74bbad62f3ed24Kristian Høgsberg * \return the struct gl_config supported by this driver 7693b43c28195ffce79822728b546a707ee14a03320Jerome Glisse */ 7703b43c28195ffce79822728b546a707ee14a03320Jerome Glissestatic const 771d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg__DRIconfig **radeonInitScreen2(__DRIscreen *psp) 7723b43c28195ffce79822728b546a707ee14a03320Jerome Glisse{ 77371fe9437169cfdafda8814aa814bb85429fb6cfcMark Mueller static const mesa_format formats[3] = { 774eeed49f5f290793870c60b5b635b977a732a1eb4Mark Mueller MESA_FORMAT_B5G6R5_UNORM, 775ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller MESA_FORMAT_B8G8R8X8_UNORM, 776ef145ba4ded6aafb28e3bda02fb348e6b8bff12aMark Mueller MESA_FORMAT_B8G8R8A8_UNORM 7771f6e10f67b0fce811eb91abfbdb3e9c6ed0035a3Ian Romanick }; 77826c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't 77926c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie * support pageflipping at all. 78026c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie */ 78126c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie static const GLenum back_buffer_modes[] = { 78226c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/ 78326c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie }; 78426c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1]; 78526c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie int color; 78626c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie __DRIconfig **configs = NULL; 78726c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie 788083f66fdd6451648fe355b64b02b29a6a4389f0dEric Anholt psp->max_gl_compat_version = 13; 789083f66fdd6451648fe355b64b02b29a6a4389f0dEric Anholt psp->max_gl_es1_version = 11; 790083f66fdd6451648fe355b64b02b29a6a4389f0dEric Anholt 7913b43c28195ffce79822728b546a707ee14a03320Jerome Glisse if (!radeonInitDriver(psp)) { 7923b43c28195ffce79822728b546a707ee14a03320Jerome Glisse return NULL; 7933b43c28195ffce79822728b546a707ee14a03320Jerome Glisse } 79426c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie depth_bits[0] = 0; 79526c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie stencil_bits[0] = 0; 79626c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie depth_bits[1] = 16; 79726c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie stencil_bits[1] = 0; 79826c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie depth_bits[2] = 24; 79926c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie stencil_bits[2] = 0; 80026c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie depth_bits[3] = 24; 80126c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie stencil_bits[3] = 8; 80226c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie 80326c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie msaa_samples_array[0] = 0; 80426c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie 8051f6e10f67b0fce811eb91abfbdb3e9c6ed0035a3Ian Romanick for (color = 0; color < ARRAY_SIZE(formats); color++) { 80626c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie __DRIconfig **new_configs; 80726c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie 8081f6e10f67b0fce811eb91abfbdb3e9c6ed0035a3Ian Romanick new_configs = driCreateConfigs(formats[color], 80926c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie depth_bits, 81026c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie stencil_bits, 81126c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie ARRAY_SIZE(depth_bits), 81226c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie back_buffer_modes, 81326c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie ARRAY_SIZE(back_buffer_modes), 81426c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie msaa_samples_array, 8153cce4a1e10361458630511543b7a8a6438544775Ian Romanick ARRAY_SIZE(msaa_samples_array), 816528390021fdda0d8b39a50762003af743a22ff9fIlia Mirkin GL_TRUE, GL_FALSE); 817a4bf68ca50da0ce291a464aec9b03a469ab2561aChad Versace configs = driConcatConfigs(configs, new_configs); 81826c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie } 8193b43c28195ffce79822728b546a707ee14a03320Jerome Glisse 82026c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie if (configs == NULL) { 82126c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__, 82226c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie __LINE__); 82326c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie return NULL; 82426c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie } 82526c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie 82626c1b0af024e4847ce1000ee471ab5b5bdb18a1bDave Airlie return (const __DRIconfig **)configs; 8273b43c28195ffce79822728b546a707ee14a03320Jerome Glisse} 8285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 82986d50c2f1567eebd193ac797a49c58c969646787Eric Anholtstatic const struct __DriverAPIRec radeon_driver_api = { 8307192c37294964b3f6e1551469f161593ec8f851dGeorge Sapountzis .InitScreen = radeonInitScreen2, 831e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .DestroyScreen = radeonDestroyScreen, 832858a2a2ac7b1c8f1a7f7c4b3c66b3919989798d4Dave Airlie#if defined(RADEON_R200) 833b6a4f5f1d3f0a79b4502d0b30d8b259e8189b70fPauli Nieminen .CreateContext = r200CreateContext, 834b6a4f5f1d3f0a79b4502d0b30d8b259e8189b70fPauli Nieminen .DestroyContext = r200DestroyContext, 835b6a4f5f1d3f0a79b4502d0b30d8b259e8189b70fPauli Nieminen#else 836c3374bf97ecd82b915fb29c7c04951e2b75d4dbcPauli Nieminen .CreateContext = r100CreateContext, 837e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .DestroyContext = radeonDestroyContext, 838b6a4f5f1d3f0a79b4502d0b30d8b259e8189b70fPauli Nieminen#endif 839e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .CreateBuffer = radeonCreateBuffer, 840e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .DestroyBuffer = radeonDestroyBuffer, 841e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .MakeCurrent = radeonMakeCurrent, 842e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg .UnbindContext = radeonUnbindContext, 843e82dd8c6e1fa2fff5b960de26961080ba5e9651dKristian Høgsberg}; 844d07d1379314c9222ccb955244fa7e56bd4d03d6dJerome Glisse 84586d50c2f1567eebd193ac797a49c58c969646787Eric Anholtstatic const struct __DRIDriverVtableExtensionRec radeon_vtable = { 84686d50c2f1567eebd193ac797a49c58c969646787Eric Anholt .base = { __DRI_DRIVER_VTABLE, 1 }, 84786d50c2f1567eebd193ac797a49c58c969646787Eric Anholt .vtable = &radeon_driver_api, 84886d50c2f1567eebd193ac797a49c58c969646787Eric Anholt}; 84986d50c2f1567eebd193ac797a49c58c969646787Eric Anholt 85039a0e4e7de379a182c1544fa24d5cb2a7687ec72Kristian Høgsberg/* This is the table of extensions that the loader will dlsym() for. */ 85186d50c2f1567eebd193ac797a49c58c969646787Eric Anholtstatic const __DRIextension *radeon_driver_extensions[] = { 85239a0e4e7de379a182c1544fa24d5cb2a7687ec72Kristian Høgsberg &driCoreExtension.base, 85339a0e4e7de379a182c1544fa24d5cb2a7687ec72Kristian Høgsberg &driDRI2Extension.base, 8546868923702d5cdb93d06627ea4f40abe99cda75aEric Anholt &radeon_config_options.base, 85586d50c2f1567eebd193ac797a49c58c969646787Eric Anholt &radeon_vtable.base, 85639a0e4e7de379a182c1544fa24d5cb2a7687ec72Kristian Høgsberg NULL 85739a0e4e7de379a182c1544fa24d5cb2a7687ec72Kristian Høgsberg}; 85886d50c2f1567eebd193ac797a49c58c969646787Eric Anholt 85986d50c2f1567eebd193ac797a49c58c969646787Eric Anholt#ifdef RADEON_R200 86086d50c2f1567eebd193ac797a49c58c969646787Eric AnholtPUBLIC const __DRIextension **__driDriverGetExtensions_r200(void) 86186d50c2f1567eebd193ac797a49c58c969646787Eric Anholt{ 86286d50c2f1567eebd193ac797a49c58c969646787Eric Anholt globalDriverAPI = &radeon_driver_api; 86386d50c2f1567eebd193ac797a49c58c969646787Eric Anholt 86486d50c2f1567eebd193ac797a49c58c969646787Eric Anholt return radeon_driver_extensions; 86586d50c2f1567eebd193ac797a49c58c969646787Eric Anholt} 86686d50c2f1567eebd193ac797a49c58c969646787Eric Anholt#else 86786d50c2f1567eebd193ac797a49c58c969646787Eric AnholtPUBLIC const __DRIextension **__driDriverGetExtensions_radeon(void) 86886d50c2f1567eebd193ac797a49c58c969646787Eric Anholt{ 86986d50c2f1567eebd193ac797a49c58c969646787Eric Anholt globalDriverAPI = &radeon_driver_api; 87086d50c2f1567eebd193ac797a49c58c969646787Eric Anholt 87186d50c2f1567eebd193ac797a49c58c969646787Eric Anholt return radeon_driver_extensions; 87286d50c2f1567eebd193ac797a49c58c969646787Eric Anholt} 87386d50c2f1567eebd193ac797a49c58c969646787Eric Anholt#endif 874