1//=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the X86 specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86SUBTARGET_H
15#define X86SUBTARGET_H
16
17#include "llvm/ADT/Triple.h"
18#include "llvm/Target/TargetSubtargetInfo.h"
19#include "llvm/CallingConv.h"
20#include <string>
21
22#define GET_SUBTARGETINFO_HEADER
23#include "X86GenSubtargetInfo.inc"
24
25namespace llvm {
26class GlobalValue;
27class StringRef;
28class TargetMachine;
29
30/// PICStyles - The X86 backend supports a number of different styles of PIC.
31///
32namespace PICStyles {
33enum Style {
34  StubPIC,          // Used on i386-darwin in -fPIC mode.
35  StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
36  GOT,              // Used on many 32-bit unices in -fPIC mode.
37  RIPRel,           // Used on X86-64 when not in -static mode.
38  None              // Set when in -static mode (not PIC or DynamicNoPIC mode).
39};
40}
41
42class X86Subtarget : public X86GenSubtargetInfo {
43protected:
44  enum X86SSEEnum {
45    NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
46  };
47
48  enum X863DNowEnum {
49    NoThreeDNow, ThreeDNow, ThreeDNowA
50  };
51
52  /// PICStyle - Which PIC style to use
53  ///
54  PICStyles::Style PICStyle;
55
56  /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
57  /// none supported.
58  X86SSEEnum X86SSELevel;
59
60  /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
61  ///
62  X863DNowEnum X863DNowLevel;
63
64  /// HasCMov - True if this processor has conditional move instructions
65  /// (generally pentium pro+).
66  bool HasCMov;
67
68  /// HasX86_64 - True if the processor supports X86-64 instructions.
69  ///
70  bool HasX86_64;
71
72  /// HasPOPCNT - True if the processor supports POPCNT.
73  bool HasPOPCNT;
74
75  /// HasSSE4A - True if the processor supports SSE4A instructions.
76  bool HasSSE4A;
77
78  /// HasAVX - Target has AVX instructions
79  bool HasAVX;
80
81  /// HasAES - Target has AES instructions
82  bool HasAES;
83
84  /// HasCLMUL - Target has carry-less multiplication
85  bool HasCLMUL;
86
87  /// HasFMA3 - Target has 3-operand fused multiply-add
88  bool HasFMA3;
89
90  /// HasFMA4 - Target has 4-operand fused multiply-add
91  bool HasFMA4;
92
93  /// HasMOVBE - True if the processor has the MOVBE instruction.
94  bool HasMOVBE;
95
96  /// HasRDRAND - True if the processor has the RDRAND instruction.
97  bool HasRDRAND;
98
99  /// HasF16C - Processor has 16-bit floating point conversion instructions.
100  bool HasF16C;
101
102  /// HasLZCNT - Processor has LZCNT instruction.
103  bool HasLZCNT;
104
105  /// HasBMI - Processor has BMI1 instructions.
106  bool HasBMI;
107
108  /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
109  bool IsBTMemSlow;
110
111  /// IsUAMemFast - True if unaligned memory access is fast.
112  bool IsUAMemFast;
113
114  /// HasVectorUAMem - True if SIMD operations can have unaligned memory
115  /// operands. This may require setting a feature bit in the processor.
116  bool HasVectorUAMem;
117
118  /// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction;
119  /// this is true for most x86-64 chips, but not the first AMD chips.
120  bool HasCmpxchg16b;
121
122  /// stackAlignment - The minimum alignment known to hold of the stack frame on
123  /// entry to the function and which must be maintained by every function.
124  unsigned stackAlignment;
125
126  /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
127  ///
128  unsigned MaxInlineSizeThreshold;
129
130  /// TargetTriple - What processor and OS we're targeting.
131  Triple TargetTriple;
132
133private:
134  /// In64BitMode - True if compiling for 64-bit, false for 32-bit.
135  bool In64BitMode;
136
137  /// InNaClMode - True if compiling for Native Client target.
138  bool InNaClMode;
139
140public:
141
142  /// This constructor initializes the data members to match that
143  /// of the specified triple.
144  ///
145  X86Subtarget(const std::string &TT, const std::string &CPU,
146               const std::string &FS,
147               unsigned StackAlignOverride, bool is64Bit);
148
149  /// getStackAlignment - Returns the minimum alignment known to hold of the
150  /// stack frame on entry to the function and which must be maintained by every
151  /// function for this subtarget.
152  unsigned getStackAlignment() const { return stackAlignment; }
153
154  /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
155  /// that still makes it profitable to inline the call.
156  unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
157
158  /// ParseSubtargetFeatures - Parses features string setting specified
159  /// subtarget options.  Definition of function is auto generated by tblgen.
160  void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
161
162  /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
163  /// instruction.
164  void AutoDetectSubtargetFeatures();
165
166  bool is64Bit() const { return In64BitMode; }
167
168  PICStyles::Style getPICStyle() const { return PICStyle; }
169  void setPICStyle(PICStyles::Style Style)  { PICStyle = Style; }
170
171  bool hasCMov() const { return HasCMov; }
172  bool hasMMX() const { return X86SSELevel >= MMX; }
173  bool hasSSE1() const { return X86SSELevel >= SSE1; }
174  bool hasSSE2() const { return X86SSELevel >= SSE2; }
175  bool hasSSE3() const { return X86SSELevel >= SSE3; }
176  bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
177  bool hasSSE41() const { return X86SSELevel >= SSE41; }
178  bool hasSSE42() const { return X86SSELevel >= SSE42; }
179  bool hasSSE4A() const { return HasSSE4A; }
180  bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
181  bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
182  bool hasPOPCNT() const { return HasPOPCNT; }
183  bool hasAVX() const { return HasAVX; }
184  bool hasXMM() const { return hasSSE1() || hasAVX(); }
185  bool hasXMMInt() const { return hasSSE2() || hasAVX(); }
186  bool hasAES() const { return HasAES; }
187  bool hasCLMUL() const { return HasCLMUL; }
188  bool hasFMA3() const { return HasFMA3; }
189  bool hasFMA4() const { return HasFMA4; }
190  bool hasMOVBE() const { return HasMOVBE; }
191  bool hasRDRAND() const { return HasRDRAND; }
192  bool hasF16C() const { return HasF16C; }
193  bool hasLZCNT() const { return HasLZCNT; }
194  bool hasBMI() const { return HasBMI; }
195  bool isBTMemSlow() const { return IsBTMemSlow; }
196  bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
197  bool hasVectorUAMem() const { return HasVectorUAMem; }
198  bool hasCmpxchg16b() const { return HasCmpxchg16b; }
199
200  const Triple &getTargetTriple() const { return TargetTriple; }
201
202  bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
203  bool isTargetFreeBSD() const {
204    return TargetTriple.getOS() == Triple::FreeBSD;
205  }
206  bool isTargetSolaris() const {
207    return TargetTriple.getOS() == Triple::Solaris;
208  }
209
210  // ELF is a reasonably sane default and the only other X86 targets we
211  // support are Darwin and Windows. Just use "not those".
212  bool isTargetELF() const {
213    return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
214  }
215  bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
216  bool isTargetNaCl() const {
217    return TargetTriple.getOS() == Triple::NativeClient;
218  }
219  bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); }
220  bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); }
221
222  bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
223  bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
224  bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
225  bool isTargetCygMing() const {
226    return isTargetMingw() || isTargetCygwin();
227  }
228
229  /// isTargetCOFF - Return true if this is any COFF/Windows target variant.
230  bool isTargetCOFF() const {
231    return isTargetMingw() || isTargetCygwin() || isTargetWindows();
232  }
233
234  bool isTargetWin64() const {
235    // FIXME: x86_64-cygwin has not been released yet.
236    return In64BitMode && (isTargetCygMing() || isTargetWindows());
237  }
238
239  bool isTargetEnvMacho() const {
240    return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO);
241  }
242
243  bool isTargetWin32() const {
244    return !In64BitMode && (isTargetMingw() || isTargetWindows());
245  }
246
247  bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
248  bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
249  bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
250
251  bool isPICStyleStubPIC() const {
252    return PICStyle == PICStyles::StubPIC;
253  }
254
255  bool isPICStyleStubNoDynamic() const {
256    return PICStyle == PICStyles::StubDynamicNoPIC;
257  }
258  bool isPICStyleStubAny() const {
259    return PICStyle == PICStyles::StubDynamicNoPIC ||
260           PICStyle == PICStyles::StubPIC; }
261
262  /// ClassifyGlobalReference - Classify a global variable reference for the
263  /// current subtarget according to how we should reference it in a non-pcrel
264  /// context.
265  unsigned char ClassifyGlobalReference(const GlobalValue *GV,
266                                        const TargetMachine &TM)const;
267
268  /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
269  /// current subtarget according to how we should reference it in a non-pcrel
270  /// context.
271  unsigned char ClassifyBlockAddressReference() const;
272
273  /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
274  /// to immediate address.
275  bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
276
277  /// This function returns the name of a function which has an interface
278  /// like the non-standard bzero function, if such a function exists on
279  /// the current subtarget and it is considered prefereable over
280  /// memset with zero passed as the second argument. Otherwise it
281  /// returns null.
282  const char *getBZeroEntry() const;
283
284  /// getSpecialAddressLatency - For targets where it is beneficial to
285  /// backschedule instructions that compute addresses, return a value
286  /// indicating the number of scheduling cycles of backscheduling that
287  /// should be attempted.
288  unsigned getSpecialAddressLatency() const;
289};
290
291} // End llvm namespace
292
293#endif
294