1; Show that we can take advantage of the vmls instruction for floating point
2; operations during optimization.
3
4; Note that we use -O2 to force the result of the fmul to be
5; (immediately) available for the fsub. When using -Om1, the merge of
6; fmul and fsub does not happen.
7
8; REQUIRES: allow_dump
9
10; Compile using standalone assembler.
11; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
12; RUN:   -reg-use=s20,s21,s22,d20,d21,d22 \
13; RUN:   | FileCheck %s --check-prefix=ASM
14
15; Show bytes in assembled standalone code.
16; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
17; RUN:   --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
18; RUN:   | FileCheck %s --check-prefix=DIS
19
20; Compile using integrated assembler.
21; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
22; RUN:   -reg-use=s20,s21,s22,d20,d21,d22 \
23; RUN:   | FileCheck %s --check-prefix=IASM
24
25; Show bytes in assembled integrated code.
26; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
27; RUN:   --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
28; RUN:   | FileCheck %s --check-prefix=DIS
29
30define internal float @mulSubFloat(float %f1, float %f2) {
31; ASM-LABEL: mulSubFloat:
32; DIS-LABEL: 00000000 <mulSubFloat>:
33
34  %v1 = fmul float %f1, 1.5
35  %v2 = fsub float %f2, %v1
36
37; ASM:  vmls.f32        s21, s20, s22
38; DIS:   10:    ee4aaa4b
39; IASM-NOT: vmls.f32
40
41  ret float %v2
42}
43
44define internal double @mulSubDouble(double %f1, double %f2) {
45; ASM-LABEL: mulSubDouble:
46; DIS-LABEL: 00000020 <mulSubDouble>:
47
48  %v1 = fmul double %f1, 1.5
49  %v2 = fsub double %f2, %v1
50
51; ASM:  vmls.f64        d21, d20, d22
52; DIS:   2c:    ee445be6
53; IASM-NOT: vmls.f64
54
55  ret double %v2
56}
57