176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* 276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 3c90x.c -- This file implements the 3c90x driver for etherboot. Written 376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * by Greg Beeley, Greg.Beeley@LightSys.org. Modified by Steve Smith, 476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Steve.Smith@Juno.Com. Alignment bug fix Neil Newell (nn@icenoir.net). 576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Port from etherboot to gPXE API, implementation of tx/rx ring support 776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * by Thomas Miletich, thomas.miletich@gmail.com 876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Thanks to Marty Connor and Stefan Hajnoczi for their help and feedback. 976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 1076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * This program Copyright (C) 1999 LightSys Technology Services, Inc. 1176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Portions Copyright (C) 1999 Steve Smith 1276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 1376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * This program may be re-distributed in source or binary form, modified, 1476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * sold, or copied for any purpose, provided that the above copyright message 1576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * and this text are included with all source copies or derivative works, and 1676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * provided that the above copyright message and this text are included in the 1776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * documentation of any binary-only distributions. This program is distributed 1876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * WITHOUT ANY WARRANTY, without even the warranty of FITNESS FOR A PARTICULAR 1976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * PURPOSE or MERCHANTABILITY. Please read the associated documentation 2076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * "3c90x.txt" before compiling and using this driver. 2176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 2276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * -------- 2376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 2476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Program written with the assistance of the 3com documentation for 2576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * the 3c905B-TX card, as well as with some assistance from the 3c59x 2676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * driver Donald Becker wrote for the Linux kernel, and with some assistance 2776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * from the remainder of the Etherboot distribution. 2876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 2976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * REVISION HISTORY: 3076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 3176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v0.10 1-26-1998 GRB Initial implementation. 3276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v0.90 1-27-1998 GRB System works. 3376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v1.00pre1 2-11-1998 GRB Got prom boot issue fixed. 3476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v2.0 9-24-1999 SCS Modified for 3c905 (from 3c905b code) 3576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * Re-wrote poll and transmit for 3676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * better error recovery and heavy 3776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * network traffic operation 3876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v2.01 5-26-2003 NN Fixed driver alignment issue which 3976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * caused system lockups if driver structures 4076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * not 8-byte aligned. 4176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * v2.02 11-28-2007 GSt Got polling working again by replacing 4276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * "for(i=0;i<40000;i++);" with "mdelay(1);" 4376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 4476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * 4576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman * indent options: indent -kr -i8 3c90x.c 4676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman */ 4776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 4876d05dc695b06c4e987bb8078f78032441e1430cGreg HartmanFILE_LICENCE ( BSD2 ); 4976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 5076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#ifndef __3C90X_H_ 5176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define __3C90X_H_ 5276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 5376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstatic struct net_device_operations a3c90x_operations; 5476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 5576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define XCVR_MAGIC (0x5A00) 5676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 5776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Register definitions for the 3c905 */ 5876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers { 5976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regPowerMgmtCtrl_w = 0x7c, /* 905B Revision Only */ 6076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpMaxBurst_w = 0x7a, /* 905B Revision Only */ 6176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDnMaxBurst_w = 0x78, /* 905B Revision Only */ 6276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDebugControl_w = 0x74, /* 905B Revision Only */ 6376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDebugData_l = 0x70, /* 905B Revision Only */ 6476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRealTimeCnt_l = 0x40, /* Universal */ 6576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpBurstThresh_b = 0x3e, /* 905B Revision Only */ 6676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpPoll_b = 0x3d, /* 905B Revision Only */ 6776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpPriorityThresh_b = 0x3c, /* 905B Revision Only */ 6876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpListPtr_l = 0x38, /* Universal */ 6976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regCountdown_w = 0x36, /* Universal */ 7076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regFreeTimer_w = 0x34, /* Universal */ 7176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpPktStatus_l = 0x30, /* Universal with Exception, pg 130 */ 7276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxFreeThresh_b = 0x2f, /* 90X Revision Only */ 7376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDnPoll_b = 0x2d, /* 905B Revision Only */ 7476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDnPriorityThresh_b = 0x2c, /* 905B Revision Only */ 7576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDnBurstThresh_b = 0x2a, /* 905B Revision Only */ 7676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDnListPtr_l = 0x24, /* Universal with Exception, pg 107 */ 7776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regDmaCtrl_l = 0x20, /* Universal with Exception, pg 106 */ 7876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* */ 7976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regIntStatusAuto_w = 0x1e, /* 905B Revision Only */ 8076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxStatus_b = 0x1b, /* Universal with Exception, pg 113 */ 8176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTimer_b = 0x1a, /* Universal */ 8276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxPktId_b = 0x18, /* 905B Revision Only */ 8376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regCommandIntStatus_w = 0x0e, /* Universal (Command Variations) */ 8476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 8576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 8676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* following are windowed registers */ 8776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers7 { 8876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regPowerMgmtEvent_7_w = 0x0c, /* 905B Revision Only */ 8976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regVlanEtherType_7_w = 0x04, /* 905B Revision Only */ 9076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regVlanMask_7_w = 0x00, /* 905B Revision Only */ 9176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 9276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 9376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers6 { 9476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regBytesXmittedOk_6_w = 0x0c, /* Universal */ 9576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regBytesRcvdOk_6_w = 0x0a, /* Universal */ 9676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpperFramesOk_6_b = 0x09, /* Universal */ 9776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regFramesDeferred_6_b = 0x08, /* Universal */ 9876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regFramesRecdOk_6_b = 0x07, /* Universal with Exceptions, pg 142 */ 9976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regFramesXmittedOk_6_b = 0x06, /* Universal */ 10076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRxOverruns_6_b = 0x05, /* Universal */ 10176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regLateCollisions_6_b = 0x04, /* Universal */ 10276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regSingleCollisions_6_b = 0x03, /* Universal */ 10376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regMultipleCollisions_6_b = 0x02, /* Universal */ 10476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regSqeErrors_6_b = 0x01, /* Universal */ 10576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regCarrierLost_6_b = 0x00, /* Universal */ 10676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 10776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 10876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers5 { 10976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regIndicationEnable_5_w = 0x0c, /* Universal */ 11076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regInterruptEnable_5_w = 0x0a, /* Universal */ 11176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxReclaimThresh_5_b = 0x09, /* 905B Revision Only */ 11276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRxFilter_5_b = 0x08, /* Universal */ 11376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRxEarlyThresh_5_w = 0x06, /* Universal */ 11476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxStartThresh_5_w = 0x00, /* Universal */ 11576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 11676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 11776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers4 { 11876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regUpperBytesOk_4_b = 0x0d, /* Universal */ 11976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regBadSSD_4_b = 0x0c, /* Universal */ 12076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regMediaStatus_4_w = 0x0a, /* Universal with Exceptions, pg 201 */ 12176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regPhysicalMgmt_4_w = 0x08, /* Universal */ 12276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regNetworkDiagnostic_4_w = 0x06, /* Universal with Exceptions, pg 203 */ 12376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regFifoDiagnostic_4_w = 0x04, /* Universal with Exceptions, pg 196 */ 12476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regVcoDiagnostic_4_w = 0x02, /* Undocumented? */ 12576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 12676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 12776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers3 { 12876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regTxFree_3_w = 0x0c, /* Universal */ 12976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRxFree_3_w = 0x0a, /* Universal with Exceptions, pg 125 */ 13076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regResetMediaOptions_3_w = 0x08, /* Media Options on B Revision, */ 13176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* Reset Options on Non-B Revision */ 13276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regMacControl_3_w = 0x06, /* Universal with Exceptions, pg 199 */ 13376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regMaxPktSize_3_w = 0x04, /* 905B Revision Only */ 13476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regInternalConfig_3_l = 0x00, /* Universal, different bit */ 13576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman /* definitions, pg 59 */ 13676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 13776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 13876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers2 { 13976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regResetOptions_2_w = 0x0c, /* 905B Revision Only */ 14076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regStationMask_2_3w = 0x06, /* Universal with Exceptions, pg 127 */ 14176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regStationAddress_2_3w = 0x00, /* Universal with Exceptions, pg 127 */ 14276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 14376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 14476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers1 { 14576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regRxStatus_1_w = 0x0a, /* 90X Revision Only, Pg 126 */ 14676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 14776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 14876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Registers0 { 14976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regEepromData_0_w = 0x0c, /* Universal */ 15076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regEepromCommand_0_w = 0x0a, /* Universal */ 15176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regBiosRomData_0_b = 0x08, /* 905B Revision Only */ 15276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman regBiosRomAddr_0_l = 0x04, /* 905B Revision Only */ 15376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 15476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 15576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 15676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* The names for the eight register windows */ 15776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Windows { 15876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winNone = 0xff, 15976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winPowerVlan7 = 0x07, 16076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winStatistics6 = 0x06, 16176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winTxRxControl5 = 0x05, 16276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winDiagnostics4 = 0x04, 16376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winTxRxOptions3 = 0x03, 16476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winAddressing2 = 0x02, 16576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winUnused1 = 0x01, 16676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman winEepromBios0 = 0x00, 16776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 16876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 16976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 17076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Command definitions for the 3c90X */ 17176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Commands { 17276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdGlobalReset = 0x00, /* Universal with Exceptions, pg 151 */ 17376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSelectRegisterWindow = 0x01, /* Universal */ 17476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdEnableDcConverter = 0x02, /* */ 17576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdRxDisable = 0x03, /* */ 17676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdRxEnable = 0x04, /* Universal */ 17776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdRxReset = 0x05, /* Universal */ 17876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdStallCtl = 0x06, /* Universal */ 17976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdTxEnable = 0x09, /* Universal */ 18076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdTxDisable = 0x0A, /* */ 18176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdTxReset = 0x0B, /* Universal */ 18276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdRequestInterrupt = 0x0C, /* */ 18376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdAcknowledgeInterrupt = 0x0D, /* Universal */ 18476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetInterruptEnable = 0x0E, /* Universal */ 18576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetIndicationEnable = 0x0F, /* Universal */ 18676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetRxFilter = 0x10, /* Universal */ 18776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetRxEarlyThresh = 0x11, /* */ 18876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetTxStartThresh = 0x13, /* */ 18976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdStatisticsEnable = 0x15, /* */ 19076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdStatisticsDisable = 0x16, /* */ 19176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdDisableDcConverter = 0x17, /* */ 19276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetTxReclaimThresh = 0x18, /* */ 19376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman cmdSetHashFilterBit = 0x19, /* */ 19476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 19576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 19676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum FrameStartHeader { 19776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman fshTxIndicate = 0x8000, 19876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman fshDnComplete = 0x10000, 19976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 20076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 20176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum UpDownDesc { 20276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman upLastFrag = (1 << 31), 20376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman downLastFrag = (1 << 31), 20476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 20576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 20676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum UpPktStatus { 20776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman upComplete = (1 << 15), 20876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman upError = (1 << 14), 20976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 21076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 21176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Stalls { 21276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman upStall = 0x00, 21376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman upUnStall = 0x01, 21476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 21576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman dnStall = 0x02, 21676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman dnUnStall = 0x03, 21776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 21876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 21976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum Resources { 22076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman resRxRing = 0x00, 22176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman resTxRing = 0x02, 22276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman resRxIOBuf = 0x04 22376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 22476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 22576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum eeprom { 22676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eepromBusy = (1 << 15), 22776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eepromRead = ((0x02) << 6), 22876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eepromRead_556 = 0x230, 22976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman eepromHwAddrOffset = 0x0a, 23076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 23176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 23276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Bit 4 is only used in revison B and upwards */ 23376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanenum linktype { 23476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman link10BaseT = 0x00, 23576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman linkAUI = 0x01, 23676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman link10Base2 = 0x03, 23776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman link100BaseFX = 0x05, 23876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman linkMII = 0x06, 23976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman linkAutoneg = 0x08, 24076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman linkExternalMII = 0x09, 24176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 24276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 24376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Values for int status register bitmask */ 24476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_INTERRUPTLATCH (1<<0) 24576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_HOSTERROR (1<<1) 24676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_TXCOMPLETE (1<<2) 24776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_RXCOMPLETE (1<<4) 24876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_RXEARLY (1<<5) 24976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_INTREQUESTED (1<<6) 25076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_UPDATESTATS (1<<7) 25176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_LINKEVENT (1<<8) 25276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_DNCOMPLETE (1<<9) 25376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_UPCOMPLETE (1<<10) 25476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_CMDINPROGRESS (1<<12) 25576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define INT_WINDOWNUMBER (7<<13) 25676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 25776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Buffer sizes */ 25876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TX_RING_SIZE 8 25976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define RX_RING_SIZE 8 26076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define TX_RING_ALIGN 16 26176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define RX_RING_ALIGN 16 26276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define RX_BUF_SIZE 1536 26376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 26476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Timeouts for eeprom and command completion */ 26576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Timeout 1 second, to be save */ 26676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#define EEPROM_TIMEOUT 1 * 1000 * 1000 26776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 26876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* TX descriptor */ 26976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct TXD { 27076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int DnNextPtr; 27176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int FrameStartHeader; 27276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int DataAddr; 27376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int DataLength; 27476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ 27576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 27676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* RX descriptor */ 27776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct RXD { 27876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int UpNextPtr; 27976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int UpPktStatus; 28076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int DataAddr; 28176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman volatile unsigned int DataLength; 28276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman} __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ 28376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 28476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman/* Private NIC dats */ 28576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartmanstruct INF_3C90X { 28676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int is3c556; 28776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char isBrev; 28876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned char CurrentWindow; 28976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int IOAddr; 29076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned short eeprom[0x21]; 29176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int tx_cur; /* current entry in tx_ring */ 29276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int tx_cnt; /* current number of used tx descriptors */ 29376d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int tx_tail; /* entry of last finished packet */ 29476d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman unsigned int rx_cur; 29576d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct TXD *tx_ring; 29676d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct RXD *rx_ring; 29776d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct io_buffer *tx_iobuf[TX_RING_SIZE]; 29876d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct io_buffer *rx_iobuf[RX_RING_SIZE]; 29976d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman struct nvs_device nvs; 30076d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman}; 30176d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman 30276d05dc695b06c4e987bb8078f78032441e1430cGreg Hartman#endif 303