1 2/* To compile: 3 aarch64-linux-gnu-gcc -Wall -g -O0 -o memory none/tests/arm64/memory.c 4*/ 5 6#include <stdio.h> 7#include <malloc.h> // memalign 8#include <string.h> // memset 9#include "tests/malloc.h" 10#include <assert.h> 11 12typedef unsigned char UChar; 13typedef unsigned short int UShort; 14typedef unsigned int UInt; 15typedef signed int Int; 16typedef unsigned char UChar; 17typedef signed long long int Long; 18typedef unsigned long long int ULong; 19 20typedef unsigned char Bool; 21#define False ((Bool)0) 22#define True ((Bool)1) 23 24static inline UChar randUChar ( void ) 25{ 26 static UInt seed = 80021; 27 seed = 1103515245 * seed + 12345; 28 return (seed >> 17) & 0xFF; 29} 30 31static ULong randULong ( void ) 32{ 33 Int i; 34 ULong r = 0; 35 for (i = 0; i < 8; i++) { 36 r = (r << 8) | (ULong)(0xFF & randUChar()); 37 } 38 return r; 39} 40 41 42// Same as TESTINST2 except it doesn't print the RN value, since 43// that may differ between runs (it's a stack address). Also, 44// claim it trashes x28 so that can be used as scratch if needed. 45#define TESTINST2_hide2(instruction, RNval, RD, RN, carryin) \ 46{ \ 47 ULong out; \ 48 ULong nzcv_out; \ 49 ULong nzcv_in = (carryin ? (1<<29) : 0); \ 50 __asm__ __volatile__( \ 51 "msr nzcv,%3;" \ 52 "mov " #RN ",%2;" \ 53 instruction ";" \ 54 "mov %0," #RD ";" \ 55 "mrs %1,nzcv;" \ 56 : "=&r" (out), "=&r" (nzcv_out) \ 57 : "r" (RNval), "r" (nzcv_in) \ 58 : #RD, #RN, "cc", "memory", "x28" \ 59 ); \ 60 printf("%s :: rd %016llx rn (hidden), " \ 61 "cin %d, nzcv %08llx %c%c%c%c\n", \ 62 instruction, out, \ 63 carryin ? 1 : 0, \ 64 nzcv_out & 0xffff0000, \ 65 ((1<<31) & nzcv_out) ? 'N' : ' ', \ 66 ((1<<30) & nzcv_out) ? 'Z' : ' ', \ 67 ((1<<29) & nzcv_out) ? 'C' : ' ', \ 68 ((1<<28) & nzcv_out) ? 'V' : ' ' \ 69 ); \ 70} 71 72#define TESTINST3_hide2and3(instruction, RMval, RNval, RD, RM, RN, carryin) \ 73{ \ 74 ULong out; \ 75 ULong nzcv_out; \ 76 ULong nzcv_in = (carryin ? (1<<29) : 0); \ 77 __asm__ __volatile__( \ 78 "msr nzcv,%4;" \ 79 "mov " #RM ",%2;" \ 80 "mov " #RN ",%3;" \ 81 instruction ";" \ 82 "mov %0," #RD ";" \ 83 "mrs %1,nzcv;" \ 84 : "=&r" (out), "=&r" (nzcv_out) \ 85 : "r" (RMval), "r" (RNval), "r" (nzcv_in) \ 86 : #RD, #RM, #RN, "cc", "memory" \ 87 ); \ 88 printf("%s :: rd %016llx rm (hidden), rn (hidden), " \ 89 "cin %d, nzcv %08llx %c%c%c%c\n", \ 90 instruction, out, \ 91 carryin ? 1 : 0, \ 92 nzcv_out & 0xffff0000, \ 93 ((1<<31) & nzcv_out) ? 'N' : ' ', \ 94 ((1<<30) & nzcv_out) ? 'Z' : ' ', \ 95 ((1<<29) & nzcv_out) ? 'C' : ' ', \ 96 ((1<<28) & nzcv_out) ? 'V' : ' ' \ 97 ); \ 98} 99 100 101//////////////////////////////////////////////////////////////// 102//////////////////////////////////////////////////////////////// 103//////////////////////////////////////////////////////////////// 104// // 105// test_memory_old // 106// // 107//////////////////////////////////////////////////////////////// 108//////////////////////////////////////////////////////////////// 109//////////////////////////////////////////////////////////////// 110 111static __attribute((noinline)) void test_memory_old ( void ) 112{ 113printf("Integer loads\n"); 114 115unsigned char area[512]; 116 117#define RESET \ 118 do { int i; for (i = 0; i < sizeof(area); i++) \ 119 area[i] = i | 0x80; \ 120 } while (0) 121 122#define AREA_MID (((ULong)(&area[(sizeof(area)/2)-1])) & (~(ULong)0xF)) 123 124RESET; 125 126//////////////////////////////////////////////////////////////// 127printf("LDR,STR (immediate, uimm12) (STR cases are MISSING)"); 128TESTINST2_hide2("ldr x21, [x22, #24]", AREA_MID, x21,x22,0); 129TESTINST2_hide2("ldr w21, [x22, #20]", AREA_MID, x21,x22,0); 130TESTINST2_hide2("ldrh w21, [x22, #44]", AREA_MID, x21,x22,0); 131TESTINST2_hide2("ldrb w21, [x22, #56]", AREA_MID, x21,x22,0); 132 133//////////////////////////////////////////////////////////////// 134printf("LDUR,STUR (immediate, simm9) (STR cases and wb check are MISSING)\n"); 135TESTINST2_hide2("ldr x21, [x22], #-24", AREA_MID, x21,x22,0); 136TESTINST2_hide2("ldr x21, [x22, #-40]!", AREA_MID, x21,x22,0); 137TESTINST2_hide2("ldr x21, [x22, #-48]", AREA_MID, x21,x22,0); 138printf("LDUR,STUR (immediate, simm9): STR cases are MISSING"); 139 140//////////////////////////////////////////////////////////////// 141// TESTINST2_hide2 allows use of x28 as scratch 142printf("LDP,STP (immediate, simm7) (STR cases and wb check is MISSING)\n"); 143 144TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0); 145TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0); 146TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0); 147TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0); 148TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0); 149TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0); 150 151TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0); 152TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0); 153TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0); 154TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0); 155TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0); 156TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0); 157 158//////////////////////////////////////////////////////////////// 159// This is a bit tricky. We load the value from just before and 160// just after the actual instruction. So we place a couple of 161// nop insns either side of the test insn, these should "safe" 162// to check. 163 164printf("LDR (literal, int reg)\n"); 165TESTINST2_hide2("nop; nop; nop; xyzzy00: ldr x21, xyzzy00 - 8; nop; nop; nop", AREA_MID, x21,x22,0); 166TESTINST2_hide2("nop; nop; nop; xyzzy01: ldr x21, xyzzy01 + 0; nop; nop; nop", AREA_MID, x21,x22,0); 167TESTINST2_hide2("nop; nop; nop; xyzzy02: ldr x21, xyzzy02 + 8; nop; nop; nop", AREA_MID, x21,x22,0); 168 169TESTINST2_hide2("nop; nop; nop; xyzzy03: ldr x21, xyzzy03 - 4; nop; nop; nop", AREA_MID, x21,x22,0); 170TESTINST2_hide2("nop; nop; nop; xyzzy04: ldr x21, xyzzy04 + 0; nop; nop; nop", AREA_MID, x21,x22,0); 171TESTINST2_hide2("nop; nop; nop; xyzzy05: ldr x21, xyzzy05 + 4; nop; nop; nop", AREA_MID, x21,x22,0); 172 173//////////////////////////////////////////////////////////////// 174printf("{LD,ST}R (integer register) (entirely MISSING)\n"); 175 176//////////////////////////////////////////////////////////////// 177printf("LDRS{B,H,W} (uimm12)\n"); 178TESTINST2_hide2("ldrsw x21, [x22, #24]", AREA_MID, x21,x22,0); 179TESTINST2_hide2("ldrsh x21, [x22, #20]", AREA_MID, x21,x22,0); 180TESTINST2_hide2("ldrsh w21, [x22, #44]", AREA_MID, x21,x22,0); 181TESTINST2_hide2("ldrsb x21, [x22, #88]", AREA_MID, x21,x22,0); 182TESTINST2_hide2("ldrsb w21, [x22, #56]", AREA_MID, x21,x22,0); 183 184//////////////////////////////////////////////////////////////// 185printf("LDRS{B,H,W} (simm9, upd) (upd check is MISSING)\n"); 186TESTINST2_hide2("ldrsw x21, [x22, #-24]!", AREA_MID, x21,x22,0); 187TESTINST2_hide2("ldrsh x21, [x22, #-20]!", AREA_MID, x21,x22,0); 188TESTINST2_hide2("ldrsh w21, [x22, #-44]!", AREA_MID, x21,x22,0); 189TESTINST2_hide2("ldrsb x21, [x22, #-88]!", AREA_MID, x21,x22,0); 190TESTINST2_hide2("ldrsb w21, [x22, #-56]!", AREA_MID, x21,x22,0); 191 192TESTINST2_hide2("ldrsw x21, [x22], #-24", AREA_MID, x21,x22,0); 193TESTINST2_hide2("ldrsh x21, [x22], #-20", AREA_MID, x21,x22,0); 194TESTINST2_hide2("ldrsh w21, [x22], #-44", AREA_MID, x21,x22,0); 195TESTINST2_hide2("ldrsb x21, [x22], #-88", AREA_MID, x21,x22,0); 196TESTINST2_hide2("ldrsb w21, [x22], #-56", AREA_MID, x21,x22,0); 197 198//////////////////////////////////////////////////////////////// 199printf("LDRS{B,H,W} (simm9, noUpd)\n"); 200TESTINST2_hide2("ldrsw x21, [x22, #-24]", AREA_MID, x21,x22,0); 201TESTINST2_hide2("ldrsh x21, [x22, #-20]", AREA_MID, x21,x22,0); 202TESTINST2_hide2("ldrsh w21, [x22, #-44]", AREA_MID, x21,x22,0); 203TESTINST2_hide2("ldrsb x21, [x22, #-88]", AREA_MID, x21,x22,0); 204TESTINST2_hide2("ldrsb w21, [x22, #-56]", AREA_MID, x21,x22,0); 205 206//////////////////////////////////////////////////////////////// 207printf("LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)\n"); 208 209//////////////////////////////////////////////////////////////// 210printf("{LD,ST}R (vector register) (entirely MISSING)\n"); 211 212//////////////////////////////////////////////////////////////// 213printf("LDRS{B,H,W} (integer register, SX)\n"); 214 215TESTINST3_hide2and3("ldrsw x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0); 216TESTINST3_hide2and3("ldrsw x21, [x22,x23, lsl #2]", AREA_MID, 5, x21,x22,x23,0); 217TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 218TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #2]", AREA_MID, 5, x21,x22,x23,0); 219TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 220TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #2]", AREA_MID, -5ULL, x21,x22,x23,0); 221 222TESTINST3_hide2and3("ldrsh x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0); 223TESTINST3_hide2and3("ldrsh x21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0); 224TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 225TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0); 226TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 227TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0); 228 229TESTINST3_hide2and3("ldrsh w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0); 230TESTINST3_hide2and3("ldrsh w21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0); 231TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 232TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0); 233TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 234TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0); 235 236TESTINST3_hide2and3("ldrsb x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0); 237TESTINST3_hide2and3("ldrsb x21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0); 238TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 239TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 240TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 241TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 242 243TESTINST3_hide2and3("ldrsb w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0); 244TESTINST3_hide2and3("ldrsb w21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0); 245TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 246TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0); 247TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 248TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0); 249 250//////////////////////////////////////////////////////////////// 251printf("LDR/STR (immediate, SIMD&FP, unsigned offset) (entirely MISSING)\n"); 252 253//////////////////////////////////////////////////////////////// 254printf("LDR/STR (immediate, SIMD&FP, pre/post index) (entirely MISSING)\n"); 255 256//////////////////////////////////////////////////////////////// 257printf("LDUR/STUR (unscaled offset, SIMD&FP) (entirely MISSING)\n"); 258 259//////////////////////////////////////////////////////////////// 260printf("LDR (literal, SIMD&FP) (entirely MISSING)\n"); 261 262//////////////////////////////////////////////////////////////// 263printf("LD1/ST1 (single structure, no offset) (entirely MISSING)\n"); 264 265//////////////////////////////////////////////////////////////// 266printf("LD1/ST1 (single structure, post index) (entirely MISSING)\n"); 267 268//////////////////////////////////////////////////////////////// 269printf("LD{,A}X{R,RH,RB} (entirely MISSING)\n"); 270 271//////////////////////////////////////////////////////////////// 272printf("ST{,L}X{R,RH,RB} (entirely MISSING)\n"); 273 274//////////////////////////////////////////////////////////////// 275printf("LDA{R,RH,RB}\n"); 276TESTINST2_hide2("ldar x21, [x22]", AREA_MID, x21,x22,0); 277TESTINST2_hide2("ldar w21, [x22]", AREA_MID, x21,x22,0); 278TESTINST2_hide2("ldarh w21, [x22]", AREA_MID, x21,x22,0); 279TESTINST2_hide2("ldarb w21, [x22]", AREA_MID, x21,x22,0); 280 281//////////////////////////////////////////////////////////////// 282printf("STL{R,RH,RB} (entirely MISSING)\n"); 283 284//////////////////////////////////////////////////////////////// 285// TESTINST2_hide2 allows use of x28 as scratch 286printf("LDPSW (immediate, simm7)\n"); 287 288TESTINST2_hide2("ldpsw x21, x28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0); 289TESTINST2_hide2("ldpsw x21, x28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0); 290TESTINST2_hide2("ldpsw x21, x28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0); 291TESTINST2_hide2("ldpsw x21, x28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0); 292TESTINST2_hide2("ldpsw x21, x28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0); 293TESTINST2_hide2("ldpsw x21, x28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0); 294 295} /* end of test_memory_old() */ 296 297 298//////////////////////////////////////////////////////////////// 299//////////////////////////////////////////////////////////////// 300//////////////////////////////////////////////////////////////// 301// // 302// test_memory_new // 303// // 304//////////////////////////////////////////////////////////////// 305//////////////////////////////////////////////////////////////// 306//////////////////////////////////////////////////////////////// 307 308static void show_block_xor ( UChar* block1, UChar* block2, Int n ) 309{ 310 Int i; 311 printf(" "); 312 for (i = 0; i < n; i++) { 313 if (i > 0 && 0 == (i & 15)) printf("\n "); 314 if (0 == (i & 15)) printf("[%3d] ", i); 315 UInt diff = 0xFF & (UInt)(block1[i] - block2[i]); 316 if (diff == 0) 317 printf(".. "); 318 else 319 printf("%02x ", diff); 320 } 321 printf("\n"); 322} 323 324 325// In: rand: 326// memory area, xferred vec regs, xferred int regs, 327// caller spec: 328// addr reg1, addr reg2 329// 330// Out: memory area, xferred vec regs, xferred int regs, addr reg1, addr reg2 331// 332// INSN may mention the following regs as containing load/store data: 333// x13 x23 v17 v18 v19 v20 334// and 335// x5 as containing the base address 336// x6 as containing an offset, if required 337// A memory area is filled with random data, and x13, x23, v17, v18, v19, v20 338// are loaded with random data too. INSN is then executed, with 339// x5 set to the middle of the memory area + AREG1OFF, and x6 set to AREG2VAL. 340// 341// What is printed out: the XOR of the new and old versions of the 342// following: 343// the memory area 344// x13 x23 v17 v18 v19 v20 345// and the SUB of the new and old values of the following: 346// x5 x6 347// If the insn modifies its base register then (obviously) the x5 "new - old" 348// value will be nonzero. 349 350#define MEM_TEST(INSN, AREG1OFF, AREG2VAL) { \ 351 int i; \ 352 const int N = 256; \ 353 UChar* area = memalign16(N); \ 354 UChar area2[N]; \ 355 for (i = 0; i < N; i++) area[i] = area2[i] = randUChar(); \ 356 ULong block[12]; \ 357 /* 0:x13 1:x23 2:v17.d[0] 3:v17.d[1] 4:v18.d[0] 5:v18.d[1] */ \ 358 /* 6:v19.d[0] 7:v19.d[1] 8:v20.d[0] 9:v20.d[1] 10:x5 11:x6 */ \ 359 for (i = 0; i < 12; i++) block[i] = randULong(); \ 360 block[10] = (ULong)(&area[128]) + (Long)(Int)AREG1OFF; \ 361 block[11] = (Long)AREG2VAL; \ 362 ULong block2[12]; \ 363 for (i = 0; i < 12; i++) block2[i] = block[i]; \ 364 __asm__ __volatile__( \ 365 "ldr x13, [%0, #0] ; " \ 366 "ldr x23, [%0, #8] ; " \ 367 "ldr q17, [%0, #16] ; " \ 368 "ldr q18, [%0, #32] ; " \ 369 "ldr q19, [%0, #48] ; " \ 370 "ldr q20, [%0, #64] ; " \ 371 "ldr x5, [%0, #80] ; " \ 372 "ldr x6, [%0, #88] ; " \ 373 INSN " ; " \ 374 "str x13, [%0, #0] ; " \ 375 "str x23, [%0, #8] ; " \ 376 "str q17, [%0, #16] ; " \ 377 "str q18, [%0, #32] ; " \ 378 "str q19, [%0, #48] ; " \ 379 "str q20, [%0, #64] ; " \ 380 "str x5, [%0, #80] ; " \ 381 "str x6, [%0, #88] ; " \ 382 : : "r"(&block[0]) : "x5", "x6", "x13", "x23", \ 383 "v17", "v18", "v19", "v20", "memory", "cc" \ 384 ); \ 385 printf("%s with x5 = middle_of_block+%lld, x6=%lld\n", \ 386 INSN, (Long)AREG1OFF, (Long)AREG2VAL); \ 387 show_block_xor(&area2[0], area, 256); \ 388 printf(" %016llx x13 (xor, xfer intreg #1)\n", block[0] ^ block2[0]); \ 389 printf(" %016llx x23 (xor, xfer intreg #2)\n", block[1] ^ block2[1]); \ 390 printf(" %016llx v17.d[0] (xor, xfer vecreg #1)\n", block[2] ^ block2[2]); \ 391 printf(" %016llx v17.d[1] (xor, xfer vecreg #1)\n", block[3] ^ block2[3]); \ 392 printf(" %016llx v18.d[0] (xor, xfer vecreg #2)\n", block[4] ^ block2[4]); \ 393 printf(" %016llx v18.d[1] (xor, xfer vecreg #2)\n", block[5] ^ block2[5]); \ 394 printf(" %016llx v19.d[0] (xor, xfer vecreg #3)\n", block[6] ^ block2[6]); \ 395 printf(" %016llx v19.d[1] (xor, xfer vecreg #3)\n", block[7] ^ block2[7]); \ 396 printf(" %016llx v20.d[0] (xor, xfer vecreg #3)\n", block[8] ^ block2[8]); \ 397 printf(" %016llx v20.d[1] (xor, xfer vecreg #3)\n", block[9] ^ block2[9]); \ 398 printf(" %16lld x5 (sub, base reg)\n", block[10] - block2[10]); \ 399 printf(" %16lld x6 (sub, index reg)\n", block[11] - block2[11]); \ 400 printf("\n"); \ 401 free(area); \ 402 } 403 404 405static __attribute__((noinline)) void test_memory_new ( void ) 406{ 407//////////////////////////////////////////////////////////////// 408printf("LDR,STR (immediate, uimm12)"); 409MEM_TEST("ldr x13, [x5, #24]", -1, 0); 410MEM_TEST("ldr w13, [x5, #20]", 1, 0); 411MEM_TEST("ldrh w13, [x5, #44]", 2, 0); 412MEM_TEST("ldrb w13, [x5, #56]", 3, 0); 413MEM_TEST("str x13, [x5, #24]", -3, 0); 414MEM_TEST("str w13, [x5, #20]", 5, 0); 415MEM_TEST("strh w13, [x5, #44]", 6, 0); 416MEM_TEST("strb w13, [x5, #56]", 7, 0); 417 418//////////////////////////////////////////////////////////////// 419printf("LDUR,STUR (immediate, simm9)\n"); 420MEM_TEST("ldr x13, [x5], #-24", 0, 0); 421MEM_TEST("ldr x13, [x5, #-40]!", 0, 0); 422MEM_TEST("ldr x13, [x5, #-48]", 0, 0); 423MEM_TEST("str x13, [x5], #-24", 0, 0); 424MEM_TEST("str x13, [x5, #-40]!", 0, 0); 425MEM_TEST("str x13, [x5, #-48]", 0, 0); 426 427//////////////////////////////////////////////////////////////// 428printf("LDP,STP (immediate, simm7)\n"); 429MEM_TEST("ldp x13, x23, [x5], #-24", 0, 0); 430MEM_TEST("ldp x13, x23, [x5, #-40]!", 0, 0); 431MEM_TEST("ldp x13, x23, [x5, #-40]", 0, 0); 432MEM_TEST("stp x13, x23, [x5], #-24", 0, 0); 433MEM_TEST("stp x13, x23, [x5, #-40]!", 0, 0); 434MEM_TEST("stp x13, x23, [x5, #-40]", 0, 0); 435 436MEM_TEST("ldp w13, w23, [x5], #-24", 0, 0); 437MEM_TEST("ldp w13, w23, [x5, #-40]!", 0, 0); 438MEM_TEST("ldp w13, w23, [x5, #-40]", 0, 0); 439MEM_TEST("stp w13, w23, [x5], #-24", 0, 0); 440MEM_TEST("stp w13, w23, [x5, #-40]!", 0, 0); 441MEM_TEST("stp w13, w23, [x5, #-40]", 0, 0); 442 443//////////////////////////////////////////////////////////////// 444printf("LDR (literal, int reg) (done above by test_memory_old)\n"); 445 446//////////////////////////////////////////////////////////////// 447printf("{LD,ST}R (integer register)\n"); 448MEM_TEST("str x13, [x5, x6]", 12, -4); 449MEM_TEST("str x13, [x5, x6, lsl #3]", 12, -4); 450MEM_TEST("str x13, [x5, w6, uxtw]", 12, 4); 451MEM_TEST("str x13, [x5, w6, uxtw #3]", 12, 4); 452MEM_TEST("str x13, [x5, w6, sxtw]", 12, 4); 453MEM_TEST("str x13, [x5, w6, sxtw #3]", 12, -4); 454MEM_TEST("ldr x13, [x5, x6]", 12, -4); 455MEM_TEST("ldr x13, [x5, x6, lsl #3]", 12, -4); 456MEM_TEST("ldr x13, [x5, w6, uxtw]", 12, 4); 457MEM_TEST("ldr x13, [x5, w6, uxtw #3]", 12, 4); 458MEM_TEST("ldr x13, [x5, w6, sxtw]", 12, 4); 459MEM_TEST("ldr x13, [x5, w6, sxtw #3]", 12, -4); 460 461MEM_TEST("str w13, [x5, x6]", 12, -4); 462MEM_TEST("str w13, [x5, x6, lsl #2]", 12, -4); 463MEM_TEST("str w13, [x5, w6, uxtw]", 12, 4); 464MEM_TEST("str w13, [x5, w6, uxtw #2]", 12, 4); 465MEM_TEST("str w13, [x5, w6, sxtw]", 12, 4); 466MEM_TEST("str w13, [x5, w6, sxtw #2]", 12, -4); 467MEM_TEST("ldr w13, [x5, x6]", 12, -4); 468MEM_TEST("ldr w13, [x5, x6, lsl #2]", 12, -4); 469MEM_TEST("ldr w13, [x5, w6, uxtw]", 12, 4); 470MEM_TEST("ldr w13, [x5, w6, uxtw #2]", 12, 4); 471MEM_TEST("ldr w13, [x5, w6, sxtw]", 12, 4); 472MEM_TEST("ldr w13, [x5, w6, sxtw #2]", 12, -4); 473 474MEM_TEST("strh w13, [x5, x6]", 12, -4); 475MEM_TEST("strh w13, [x5, x6, lsl #1]", 12, -4); 476MEM_TEST("strh w13, [x5, w6, uxtw]", 12, 4); 477MEM_TEST("strh w13, [x5, w6, uxtw #1]", 12, 4); 478MEM_TEST("strh w13, [x5, w6, sxtw]", 12, 4); 479MEM_TEST("strh w13, [x5, w6, sxtw #1]", 12, -4); 480MEM_TEST("ldrh w13, [x5, x6]", 12, -4); 481MEM_TEST("ldrh w13, [x5, x6, lsl #1]", 12, -4); 482MEM_TEST("ldrh w13, [x5, w6, uxtw]", 12, 4); 483MEM_TEST("ldrh w13, [x5, w6, uxtw #1]", 12, 4); 484MEM_TEST("ldrh w13, [x5, w6, sxtw]", 12, 4); 485MEM_TEST("ldrh w13, [x5, w6, sxtw #1]", 12, -4); 486 487MEM_TEST("strb w13, [x5, x6]", 12, -4); 488MEM_TEST("strb w13, [x5, x6, lsl #0]", 12, -4); 489MEM_TEST("strb w13, [x5, w6, uxtw]", 12, 4); 490MEM_TEST("strb w13, [x5, w6, uxtw #0]", 12, 4); 491MEM_TEST("strb w13, [x5, w6, sxtw]", 12, 4); 492MEM_TEST("strb w13, [x5, w6, sxtw #0]", 12, -4); 493MEM_TEST("ldrb w13, [x5, x6]", 12, -4); 494MEM_TEST("ldrb w13, [x5, x6, lsl #0]", 12, -4); 495MEM_TEST("ldrb w13, [x5, w6, uxtw]", 12, 4); 496MEM_TEST("ldrb w13, [x5, w6, uxtw #0]", 12, 4); 497MEM_TEST("ldrb w13, [x5, w6, sxtw]", 12, 4); 498MEM_TEST("ldrb w13, [x5, w6, sxtw #0]", 12, -4); 499 500//////////////////////////////////////////////////////////////// 501printf("LDRS{B,H,W} (uimm12)\n"); 502MEM_TEST("ldrsw x13, [x5, #24]", -16, 4); 503MEM_TEST("ldrsh x13, [x5, #20]", -16, 4); 504MEM_TEST("ldrsh w13, [x5, #44]", -16, 4); 505MEM_TEST("ldrsb x13, [x5, #72]", -16, 4); 506MEM_TEST("ldrsb w13, [x5, #56]", -16, 4); 507 508//////////////////////////////////////////////////////////////// 509printf("LDRS{B,H,W} (simm9, upd)\n"); 510MEM_TEST("ldrsw x13, [x5, #-24]!", -16, 4); 511MEM_TEST("ldrsh x13, [x5, #-20]!", -16, 4); 512MEM_TEST("ldrsh w13, [x5, #-44]!", -16, 4); 513MEM_TEST("ldrsb x13, [x5, #-72]!", -16, 4); 514MEM_TEST("ldrsb w13, [x5, #-56]!", -16, 4); 515 516MEM_TEST("ldrsw x13, [x5], #-24", -16, 4); 517MEM_TEST("ldrsh x13, [x5], #-20", -16, 4); 518MEM_TEST("ldrsh w13, [x5], #-44", -16, 4); 519MEM_TEST("ldrsb x13, [x5], #-72", -16, 4); 520MEM_TEST("ldrsb w13, [x5], #-56", -16, 4); 521 522//////////////////////////////////////////////////////////////// 523printf("LDRS{B,H,W} (simm9, noUpd)\n"); 524MEM_TEST("ldrsw x13, [x5, #-24]", -16, 4); 525MEM_TEST("ldrsh x13, [x5, #-20]", -16, 4); 526MEM_TEST("ldrsh w13, [x5, #-44]", -16, 4); 527MEM_TEST("ldrsb x13, [x5, #-72]", -16, 4); 528MEM_TEST("ldrsb w13, [x5, #-56]", -16, 4); 529 530//////////////////////////////////////////////////////////////// 531printf("LDP,STP (immediate, simm7) (FP&VEC)\n"); 532 533MEM_TEST("stp q17, q18, [x5, 16]", -15, 4); 534MEM_TEST("stp q19, q18, [x5, 32]!", -11, 4); 535MEM_TEST("stp q20, q17, [x5], -48", -7, 4); 536 537MEM_TEST("stp d18, d17, [x5, 16]", -15, 4); 538MEM_TEST("stp d17, d19, [x5, 32]!", -11, 4); 539MEM_TEST("stp d20, d18, [x5], -48", -7, 4); 540 541MEM_TEST("stp s17, s18, [x5, 16]", -15, 4); 542MEM_TEST("stp s19, s18, [x5, 32]!", -11, 4); 543MEM_TEST("stp s20, s17, [x5], -48", -7, 4); 544 545MEM_TEST("ldp q17, q18, [x5, 16]", -15, 4); 546MEM_TEST("ldp q18, q19, [x5, 32]!", -11, 4); 547MEM_TEST("ldp q19, q20, [x5], -48", -7, 4); 548 549MEM_TEST("ldp d20, d17, [x5, 16]", -15, 4); 550MEM_TEST("ldp d17, d18, [x5, 32]!", -11, 4); 551MEM_TEST("ldp d18, d19, [x5], -48", -7, 4); 552 553MEM_TEST("ldp s19, s20, [x5, 16]", -15, 4); 554MEM_TEST("ldp s20, s17, [x5, 32]!", -11, 4); 555MEM_TEST("ldp s17, s18, [x5], -48", -7, 4); 556 557//////////////////////////////////////////////////////////////// 558printf("LDNP,STNP (immediate, simm7) (FP&VEC, w/ nontemporal hint)\n"); 559 560MEM_TEST("stnp q18, q17, [x5, 16]", -15, 4); 561MEM_TEST("stnp d20, d19, [x5, 40]", -15, 4); 562MEM_TEST("stnp s19, s18, [x5, 68]", -15, 4); 563 564MEM_TEST("ldnp q18, q17, [x5, 16]", -15, 4); 565MEM_TEST("ldnp d17, d20, [x5, 40]", -15, 4); 566MEM_TEST("ldnp s20, s19, [x5, 68]", -15, 4); 567 568//////////////////////////////////////////////////////////////// 569printf("{LD,ST}R (vector register)\n"); 570 571MEM_TEST("str q17, [x5, x6]", 12, -4); 572MEM_TEST("str q17, [x5, x6, lsl #4]", 12, -4); 573MEM_TEST("str q17, [x5, w6, uxtw]", 12, 4); 574MEM_TEST("str q17, [x5, w6, uxtw #4]", 12, 4); 575MEM_TEST("str q17, [x5, w6, sxtw]", 12, 4); 576MEM_TEST("str q17, [x5, w6, sxtw #4]", 12, -4); 577MEM_TEST("ldr q17, [x5, x6]", 12, -4); 578MEM_TEST("ldr q17, [x5, x6, lsl #4]", 12, -4); 579MEM_TEST("ldr q17, [x5, w6, uxtw]", 12, 4); 580MEM_TEST("ldr q17, [x5, w6, uxtw #4]", 12, 4); 581MEM_TEST("ldr q17, [x5, w6, sxtw]", 12, 4); 582MEM_TEST("ldr q17, [x5, w6, sxtw #4]", 12, -4); 583 584MEM_TEST("str d17, [x5, x6]", 12, -4); 585MEM_TEST("str d17, [x5, x6, lsl #3]", 12, -4); 586MEM_TEST("str d17, [x5, w6, uxtw]", 12, 4); 587MEM_TEST("str d17, [x5, w6, uxtw #3]", 12, 4); 588MEM_TEST("str d17, [x5, w6, sxtw]", 12, 4); 589MEM_TEST("str d17, [x5, w6, sxtw #3]", 12, -4); 590MEM_TEST("ldr d17, [x5, x6]", 12, -4); 591MEM_TEST("ldr d17, [x5, x6, lsl #3]", 12, -4); 592MEM_TEST("ldr d17, [x5, w6, uxtw]", 12, 4); 593MEM_TEST("ldr d17, [x5, w6, uxtw #3]", 12, 4); 594MEM_TEST("ldr d17, [x5, w6, sxtw]", 12, 4); 595MEM_TEST("ldr d17, [x5, w6, sxtw #3]", 12, -4); 596 597MEM_TEST("str s17, [x5, x6]", 12, -4); 598MEM_TEST("str s17, [x5, x6, lsl #2]", 12, -4); 599MEM_TEST("str s17, [x5, w6, uxtw]", 12, 4); 600MEM_TEST("str s17, [x5, w6, uxtw #2]", 12, 4); 601MEM_TEST("str s17, [x5, w6, sxtw]", 12, 4); 602MEM_TEST("str s17, [x5, w6, sxtw #2]", 12, -4); 603MEM_TEST("ldr s17, [x5, x6]", 12, -4); 604MEM_TEST("ldr s17, [x5, x6, lsl #2]", 12, -4); 605MEM_TEST("ldr s17, [x5, w6, uxtw]", 12, 4); 606MEM_TEST("ldr s17, [x5, w6, uxtw #2]", 12, 4); 607MEM_TEST("ldr s17, [x5, w6, sxtw]", 12, 4); 608MEM_TEST("ldr s17, [x5, w6, sxtw #2]", 12, -4); 609 610MEM_TEST("str h17, [x5, x6]", 12, -4); 611MEM_TEST("str h17, [x5, x6, lsl #1]", 12, -4); 612MEM_TEST("str h17, [x5, w6, uxtw]", 12, 4); 613MEM_TEST("str h17, [x5, w6, uxtw #1]", 12, 4); 614MEM_TEST("str h17, [x5, w6, sxtw]", 12, 4); 615MEM_TEST("str h17, [x5, w6, sxtw #1]", 12, -4); 616MEM_TEST("ldr h17, [x5, x6]", 12, -4); 617MEM_TEST("ldr h17, [x5, x6, lsl #1]", 12, -4); 618MEM_TEST("ldr h17, [x5, w6, uxtw]", 12, 4); 619MEM_TEST("ldr h17, [x5, w6, uxtw #1]", 12, 4); 620MEM_TEST("ldr h17, [x5, w6, sxtw]", 12, 4); 621MEM_TEST("ldr h17, [x5, w6, sxtw #1]", 12, -4); 622 623MEM_TEST("str b17, [x5, x6]", 12, -4); 624MEM_TEST("str b17, [x5, x6, lsl #0]", 12, -4); 625MEM_TEST("str b17, [x5, w6, uxtw]", 12, 4); 626MEM_TEST("str b17, [x5, w6, uxtw #0]", 12, 4); 627MEM_TEST("str b17, [x5, w6, sxtw]", 12, 4); 628MEM_TEST("str b17, [x5, w6, sxtw #0]", 12, -4); 629MEM_TEST("ldr b17, [x5, x6]", 12, -4); 630MEM_TEST("ldr b17, [x5, x6, lsl #0]", 12, -4); 631MEM_TEST("ldr b17, [x5, w6, uxtw]", 12, 4); 632MEM_TEST("ldr b17, [x5, w6, uxtw #0]", 12, 4); 633MEM_TEST("ldr b17, [x5, w6, sxtw]", 12, 4); 634MEM_TEST("ldr b17, [x5, w6, sxtw #0]", 12, -4); 635 636//////////////////////////////////////////////////////////////// 637printf("LDRS{B,H,W} (integer register, SX)\n"); 638 639MEM_TEST("ldrsw x13, [x5,x6]", 12, -4); 640MEM_TEST("ldrsw x13, [x5,x6, lsl #2]", 12, -4); 641MEM_TEST("ldrsw x13, [x5,w6,uxtw #0]", 12, 4); 642MEM_TEST("ldrsw x13, [x5,w6,uxtw #2]", 12, 4); 643MEM_TEST("ldrsw x13, [x5,w6,sxtw #0]", 12, 4); 644MEM_TEST("ldrsw x13, [x5,w6,sxtw #2]", 12, -4); 645 646MEM_TEST("ldrsh x13, [x5,x6]", 12, -4); 647MEM_TEST("ldrsh x13, [x5,x6, lsl #1]", 12, -4); 648MEM_TEST("ldrsh x13, [x5,w6,uxtw #0]", 12, 4); 649MEM_TEST("ldrsh x13, [x5,w6,uxtw #1]", 12, 4); 650MEM_TEST("ldrsh x13, [x5,w6,sxtw #0]", 12, 4); 651MEM_TEST("ldrsh x13, [x5,w6,sxtw #1]", 12, -4); 652 653MEM_TEST("ldrsh w13, [x5,x6]", 12, -4); 654MEM_TEST("ldrsh w13, [x5,x6, lsl #1]", 12, -4); 655MEM_TEST("ldrsh w13, [x5,w6,uxtw #0]", 12, 4); 656MEM_TEST("ldrsh w13, [x5,w6,uxtw #1]", 12, 4); 657MEM_TEST("ldrsh w13, [x5,w6,sxtw #0]", 12, 4); 658MEM_TEST("ldrsh w13, [x5,w6,sxtw #1]", 12, -4); 659 660MEM_TEST("ldrsb x13, [x5,x6]", 12, -4); 661MEM_TEST("ldrsb x13, [x5,x6, lsl #0]", 12, -4); 662MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4); 663MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4); 664MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]", 12, 4); 665MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]", 12, -4); 666 667MEM_TEST("ldrsb w13, [x5,x6]", 12, -4); 668MEM_TEST("ldrsb w13, [x5,x6, lsl #0]", 12, -4); 669MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4); 670MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4); 671MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]", 12, 4); 672MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]", 12, -4); 673 674//////////////////////////////////////////////////////////////// 675printf("LDR/STR (immediate, SIMD&FP, unsigned offset)\n"); 676 677MEM_TEST("str q17, [x5, #-32]", 16, 0); 678MEM_TEST("str d17, [x5, #-32]", 16, 0); 679MEM_TEST("str s17, [x5, #-32]", 16, 0); 680MEM_TEST("str h17, [x5, #-32]", 16, 0); 681MEM_TEST("str b17, [x5, #-32]", 16, 0); 682MEM_TEST("ldr q17, [x5, #-32]", 16, 0); 683MEM_TEST("ldr d17, [x5, #-32]", 16, 0); 684MEM_TEST("ldr s17, [x5, #-32]", 16, 0); 685MEM_TEST("ldr h17, [x5, #-32]", 16, 0); 686MEM_TEST("ldr b17, [x5, #-32]", 16, 0); 687 688//////////////////////////////////////////////////////////////// 689printf("LDR/STR (immediate, SIMD&FP, pre/post index)\n"); 690 691MEM_TEST("str q17, [x5], #-32", 16, 0); 692MEM_TEST("str d17, [x5], #-32", 16, 0); 693MEM_TEST("str s17, [x5], #-32", 16, 0); 694MEM_TEST("str h17, [x5], #-32", 16, 0); 695MEM_TEST("str b17, [x5], #-32", 16, 0); 696MEM_TEST("ldr q17, [x5], #-32", 16, 0); 697MEM_TEST("ldr d17, [x5], #-32", 16, 0); 698MEM_TEST("ldr s17, [x5], #-32", 16, 0); 699MEM_TEST("ldr h17, [x5], #-32", 16, 0); 700MEM_TEST("ldr b17, [x5], #-32", 16, 0); 701 702MEM_TEST("str q17, [x5, #-32]!", 16, 0); 703MEM_TEST("str d17, [x5, #-32]!", 16, 0); 704MEM_TEST("str s17, [x5, #-32]!", 16, 0); 705MEM_TEST("str h17, [x5, #-32]!", 16, 0); 706MEM_TEST("str b17, [x5, #-32]!", 16, 0); 707MEM_TEST("ldr q17, [x5, #-32]!", 16, 0); 708MEM_TEST("ldr d17, [x5, #-32]!", 16, 0); 709MEM_TEST("ldr s17, [x5, #-32]!", 16, 0); 710MEM_TEST("ldr h17, [x5, #-32]!", 16, 0); 711MEM_TEST("ldr b17, [x5, #-32]!", 16, 0); 712 713//////////////////////////////////////////////////////////////// 714printf("LDUR/STUR (unscaled offset, SIMD&FP)\n"); 715 716MEM_TEST("str q17, [x5, #-13]", 16, 0); 717MEM_TEST("str d17, [x5, #-13]", 16, 0); 718MEM_TEST("str s17, [x5, #-13]", 16, 0); 719MEM_TEST("str h17, [x5, #-13]", 16, 0); 720MEM_TEST("str b17, [x5, #-13]", 16, 0); 721MEM_TEST("ldr q17, [x5, #-13]", 16, 0); 722MEM_TEST("ldr d17, [x5, #-13]", 16, 0); 723MEM_TEST("ldr s17, [x5, #-13]", 16, 0); 724MEM_TEST("ldr h17, [x5, #-13]", 16, 0); 725MEM_TEST("ldr b17, [x5, #-13]", 16, 0); 726 727//////////////////////////////////////////////////////////////// 728printf("LDR (literal, SIMD&FP) (entirely MISSING)\n"); 729 730MEM_TEST("xyzzy10: ldr s17, xyzzy10 - 8", 0, 0) 731MEM_TEST("xyzzy11: ldr d17, xyzzy11 + 8", 0, 0) 732MEM_TEST("xyzzy12: ldr q17, xyzzy12 + 4", 0, 0) 733 734//////////////////////////////////////////////////////////////// 735printf("LD1/ST1 (multiple 1-elem structs to/from 1 reg\n"); 736 737MEM_TEST("st1 {v18.2d}, [x5]", 17, 7) 738MEM_TEST("st1 {v18.2d}, [x5], #16", 9, 9) 739MEM_TEST("st1 {v18.2d}, [x5], x6", -13, -5) 740 741MEM_TEST("st1 {v18.1d}, [x5]", 17, 7) 742MEM_TEST("st1 {v18.1d}, [x5], #8", 9, 9) 743MEM_TEST("st1 {v18.1d}, [x5], x6", -13, -5) 744 745MEM_TEST("st1 {v18.4s}, [x5]", 17, 7) 746MEM_TEST("st1 {v18.4s}, [x5], #16", 9, 9) 747MEM_TEST("st1 {v18.4s}, [x5], x6", -13, -5) 748 749MEM_TEST("st1 {v18.2s}, [x5]", 17, 7) 750MEM_TEST("st1 {v18.2s}, [x5], #8", 9, 9) 751MEM_TEST("st1 {v18.2s}, [x5], x6", -13, -5) 752 753MEM_TEST("st1 {v18.8h}, [x5]", 17, 7) 754MEM_TEST("st1 {v18.8h}, [x5], #16", 9, 9) 755MEM_TEST("st1 {v18.8h}, [x5], x6", -13, -5) 756 757MEM_TEST("st1 {v18.4h}, [x5]", 17, 7) 758MEM_TEST("st1 {v18.4h}, [x5], #8", 9, 9) 759MEM_TEST("st1 {v18.4h}, [x5], x6", -13, -5) 760 761MEM_TEST("st1 {v18.16b}, [x5]", 17, 7) 762MEM_TEST("st1 {v18.16b}, [x5], #16", 9, 9) 763MEM_TEST("st1 {v18.16b}, [x5], x6", -13, -5) 764 765MEM_TEST("st1 {v18.8b}, [x5]", 17, 7) 766MEM_TEST("st1 {v18.8b}, [x5], #8", 9, 9) 767MEM_TEST("st1 {v18.8b}, [x5], x6", -13, -5) 768 769MEM_TEST("ld1 {v18.2d}, [x5]", 17, 7) 770MEM_TEST("ld1 {v18.2d}, [x5], #16", 9, 9) 771MEM_TEST("ld1 {v18.2d}, [x5], x6", -13, -5) 772 773MEM_TEST("ld1 {v18.1d}, [x5]", 17, 7) 774MEM_TEST("ld1 {v18.1d}, [x5], #8", 9, 9) 775MEM_TEST("ld1 {v18.1d}, [x5], x6", -13, -5) 776 777MEM_TEST("ld1 {v18.4s}, [x5]", 17, 7) 778MEM_TEST("ld1 {v18.4s}, [x5], #16", 9, 9) 779MEM_TEST("ld1 {v18.4s}, [x5], x6", -13, -5) 780 781MEM_TEST("ld1 {v18.2s}, [x5]", 17, 7) 782MEM_TEST("ld1 {v18.2s}, [x5], #8", 9, 9) 783MEM_TEST("ld1 {v18.2s}, [x5], x6", -13, -5) 784 785MEM_TEST("ld1 {v18.8h}, [x5]", 17, 7) 786MEM_TEST("ld1 {v18.8h}, [x5], #16", 9, 9) 787MEM_TEST("ld1 {v18.8h}, [x5], x6", -13, -5) 788 789MEM_TEST("ld1 {v18.4h}, [x5]", 17, 7) 790MEM_TEST("ld1 {v18.4h}, [x5], #8", 9, 9) 791MEM_TEST("ld1 {v18.4h}, [x5], x6", -13, -5) 792 793MEM_TEST("ld1 {v18.16b}, [x5]", 17, 7) 794MEM_TEST("ld1 {v18.16b}, [x5], #16", 9, 9) 795MEM_TEST("ld1 {v18.16b}, [x5], x6", -13, -5) 796 797MEM_TEST("ld1 {v18.8b}, [x5]", 17, 7) 798MEM_TEST("ld1 {v18.8b}, [x5], #8", 9, 9) 799MEM_TEST("ld1 {v18.8b}, [x5], x6", -13, -5) 800 801//////////////////////////////////////////////////////////////// 802printf("LD2/ST2 (multiple 2-elem structs to/from 2 regs\n"); 803 804MEM_TEST("st2 {v18.2d, v19.2d}, [x5]", 17, 7) 805MEM_TEST("st2 {v18.2d, v19.2d}, [x5], #32", 9, 9) 806MEM_TEST("st2 {v18.2d, v19.2d}, [x5], x6", -13, -5) 807 808/* no 1d case */ 809 810MEM_TEST("st2 {v18.4s, v19.4s}, [x5]", 17, 7) 811MEM_TEST("st2 {v18.4s, v19.4s}, [x5], #32", 9, 9) 812MEM_TEST("st2 {v18.4s, v19.4s}, [x5], x6", -13, -5) 813 814MEM_TEST("st2 {v18.2s, v19.2s}, [x5]", 17, 7) 815MEM_TEST("st2 {v18.2s, v19.2s}, [x5], #16", 9, 9) 816MEM_TEST("st2 {v18.2s, v19.2s}, [x5], x6", -13, -5) 817 818MEM_TEST("st2 {v18.8h, v19.8h}, [x5]", 17, 7) 819MEM_TEST("st2 {v18.8h, v19.8h}, [x5], #32", 9, 9) 820MEM_TEST("st2 {v18.8h, v19.8h}, [x5], x6", -13, -5) 821 822MEM_TEST("st2 {v18.4h, v19.4h}, [x5]", 17, 7) 823MEM_TEST("st2 {v18.4h, v19.4h}, [x5], #16", 9, 9) 824MEM_TEST("st2 {v18.4h, v19.4h}, [x5], x6", -13, -5) 825 826MEM_TEST("st2 {v18.16b, v19.16b}, [x5]", 17, 7) 827MEM_TEST("st2 {v18.16b, v19.16b}, [x5], #32", 9, 9) 828MEM_TEST("st2 {v18.16b, v19.16b}, [x5], x6", -13, -5) 829 830MEM_TEST("st2 {v18.8b, v19.8b}, [x5]", 17, 7) 831MEM_TEST("st2 {v18.8b, v19.8b}, [x5], #16", 9, 9) 832MEM_TEST("st2 {v18.8b, v19.8b}, [x5], x6", -13, -5) 833 834MEM_TEST("ld2 {v18.2d, v19.2d}, [x5]", 17, 7) 835MEM_TEST("ld2 {v18.2d, v19.2d}, [x5], #32", 9, 9) 836MEM_TEST("ld2 {v18.2d, v19.2d}, [x5], x6", -13, -5) 837 838/* no 1d case */ 839 840MEM_TEST("ld2 {v18.4s, v19.4s}, [x5]", 17, 7) 841MEM_TEST("ld2 {v18.4s, v19.4s}, [x5], #32", 9, 9) 842MEM_TEST("ld2 {v18.4s, v19.4s}, [x5], x6", -13, -5) 843 844MEM_TEST("ld2 {v18.2s, v19.2s}, [x5]", 17, 7) 845MEM_TEST("ld2 {v18.2s, v19.2s}, [x5], #16", 9, 9) 846MEM_TEST("ld2 {v18.2s, v19.2s}, [x5], x6", -13, -5) 847 848MEM_TEST("ld2 {v18.8h, v19.8h}, [x5]", 17, 7) 849MEM_TEST("ld2 {v18.8h, v19.8h}, [x5], #32", 9, 9) 850MEM_TEST("ld2 {v18.8h, v19.8h}, [x5], x6", -13, -5) 851 852MEM_TEST("ld2 {v18.4h, v19.4h}, [x5]", 17, 7) 853MEM_TEST("ld2 {v18.4h, v19.4h}, [x5], #16", 9, 9) 854MEM_TEST("ld2 {v18.4h, v19.4h}, [x5], x6", -13, -5) 855 856MEM_TEST("ld2 {v18.16b, v19.16b}, [x5]", 17, 7) 857MEM_TEST("ld2 {v18.16b, v19.16b}, [x5], #32", 9, 9) 858MEM_TEST("ld2 {v18.16b, v19.16b}, [x5], x6", -13, -5) 859 860MEM_TEST("ld2 {v18.8b, v19.8b}, [x5]", 17, 7) 861MEM_TEST("ld2 {v18.8b, v19.8b}, [x5], #16", 9, 9) 862MEM_TEST("ld2 {v18.8b, v19.8b}, [x5], x6", -13, -5) 863 864//////////////////////////////////////////////////////////////// 865printf("LD3/ST3 (multiple 3-elem structs to/from 3 regs\n"); 866 867MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5]", 17, 7) 868MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5], #48", 9, 9) 869MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5], x6", -13, -5) 870 871/* no 1d case */ 872 873MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5]", 17, 7) 874MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5], #48", 9, 9) 875MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5], x6", -13, -5) 876 877MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5]", 17, 7) 878MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5], #24", 9, 9) 879MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5], x6", -13, -5) 880 881MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5]", 17, 7) 882MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5], #48", 9, 9) 883MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5], x6", -13, -5) 884 885MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5]", 17, 7) 886MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5], #24", 9, 9) 887MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5], x6", -13, -5) 888 889MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5]", 17, 7) 890MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5], #48", 9, 9) 891MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5], x6", -13, -5) 892 893MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5]", 17, 7) 894MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5], #24", 9, 9) 895MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5], x6", -13, -5) 896 897MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5]", 17, 7) 898MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5], #48", 9, 9) 899MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5], x6", -13, -5) 900 901/* no 1d case */ 902 903MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5]", 17, 7) 904MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5], #48", 9, 9) 905MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5], x6", -13, -5) 906 907MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5]", 17, 7) 908MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5], #24", 9, 9) 909MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5], x6", -13, -5) 910 911MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5]", 17, 7) 912MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5], #48", 9, 9) 913MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5], x6", -13, -5) 914 915MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5]", 17, 7) 916MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5], #24", 9, 9) 917MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5], x6", -13, -5) 918 919MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5]", 17, 7) 920MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5], #48", 9, 9) 921MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5], x6", -13, -5) 922 923MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5]", 17, 7) 924MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5], #24", 9, 9) 925MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5], x6", -13, -5) 926 927//////////////////////////////////////////////////////////////// 928printf("LD4/ST4 (multiple 4-elem structs to/from 4 regs\n"); 929 930MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]", 17, 7) 931MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64", 9, 9) 932MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6", -13, -5) 933 934/* no 1d case */ 935 936MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]", 17, 7) 937MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64", 9, 9) 938MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6", -13, -5) 939 940MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]", 17, 7) 941MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32", 9, 9) 942MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6", -13, -5) 943 944MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]", 17, 7) 945MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64", 9, 9) 946MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6", -13, -5) 947 948MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]", 17, 7) 949MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32", 9, 9) 950MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6", -13, -5) 951 952MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7) 953MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9) 954MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5) 955 956MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]", 17, 7) 957MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32", 9, 9) 958MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6", -13, -5) 959 960MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]", 17, 7) 961MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64", 9, 9) 962MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6", -13, -5) 963 964/* no 1d case */ 965 966MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]", 17, 7) 967MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64", 9, 9) 968MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6", -13, -5) 969 970MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]", 17, 7) 971MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32", 9, 9) 972MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6", -13, -5) 973 974MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]", 17, 7) 975MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64", 9, 9) 976MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6", -13, -5) 977 978MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]", 17, 7) 979MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32", 9, 9) 980MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6", -13, -5) 981 982MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7) 983MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9) 984MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5) 985 986MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]", 17, 7) 987MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32", 9, 9) 988MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6", -13, -5) 989 990//////////////////////////////////////////////////////////////// 991printf("LD1/ST1 (multiple 1-elem structs to/from 2/3/4 regs\n"); 992 993MEM_TEST("st1 {v19.2d, v20.2d}, [x5]", 17, 7) 994MEM_TEST("st1 {v19.2d, v20.2d}, [x5], #32", 9, 9) 995MEM_TEST("st1 {v19.2d, v20.2d}, [x5], x6", -13, -5) 996 997MEM_TEST("st1 {v17.2d, v18.2d, v19.2d}, [x5]", 17, 7) 998MEM_TEST("st1 {v17.2d, v18.2d, v19.2d}, [x5], #48", 9, 9) 999MEM_TEST("st1 {v17.2d, v18.2d, v19.2d}, [x5], x6", -13, -5) 1000 1001MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]", 17, 7) 1002MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64", 9, 9) 1003MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6", -13, -5) 1004 1005 1006MEM_TEST("st1 {v19.1d, v20.1d}, [x5]", 17, 7) 1007MEM_TEST("st1 {v19.1d, v20.1d}, [x5], #16", 9, 9) 1008MEM_TEST("st1 {v19.1d, v20.1d}, [x5], x6", -13, -5) 1009 1010MEM_TEST("st1 {v17.1d, v18.1d, v19.1d}, [x5]", 17, 7) 1011MEM_TEST("st1 {v17.1d, v18.1d, v19.1d}, [x5], #24", 9, 9) 1012MEM_TEST("st1 {v17.1d, v18.1d, v19.1d}, [x5], x6", -13, -5) 1013 1014MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5]", 17, 7) 1015MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5], #32", 9, 9) 1016MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5], x6", -13, -5) 1017 1018 1019MEM_TEST("st1 {v19.4s, v20.4s}, [x5]", 17, 7) 1020MEM_TEST("st1 {v19.4s, v20.4s}, [x5], #32", 9, 9) 1021MEM_TEST("st1 {v19.4s, v20.4s}, [x5], x6", -13, -5) 1022 1023MEM_TEST("st1 {v17.4s, v18.4s, v19.4s}, [x5]", 17, 7) 1024MEM_TEST("st1 {v17.4s, v18.4s, v19.4s}, [x5], #48", 9, 9) 1025MEM_TEST("st1 {v17.4s, v18.4s, v19.4s}, [x5], x6", -13, -5) 1026 1027MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]", 17, 7) 1028MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64", 9, 9) 1029MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6", -13, -5) 1030 1031 1032MEM_TEST("st1 {v19.2s, v20.2s}, [x5]", 17, 7) 1033MEM_TEST("st1 {v19.2s, v20.2s}, [x5], #16", 9, 9) 1034MEM_TEST("st1 {v19.2s, v20.2s}, [x5], x6", -13, -5) 1035 1036MEM_TEST("st1 {v17.2s, v18.2s, v19.2s}, [x5]", 17, 7) 1037MEM_TEST("st1 {v17.2s, v18.2s, v19.2s}, [x5], #24", 9, 9) 1038MEM_TEST("st1 {v17.2s, v18.2s, v19.2s}, [x5], x6", -13, -5) 1039 1040MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]", 17, 7) 1041MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32", 9, 9) 1042MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6", -13, -5) 1043 1044 1045MEM_TEST("st1 {v19.8h, v20.8h}, [x5]", 17, 7) 1046MEM_TEST("st1 {v19.8h, v20.8h}, [x5], #32", 9, 9) 1047MEM_TEST("st1 {v19.8h, v20.8h}, [x5], x6", -13, -5) 1048 1049MEM_TEST("st1 {v17.8h, v18.8h, v19.8h}, [x5]", 17, 7) 1050MEM_TEST("st1 {v17.8h, v18.8h, v19.8h}, [x5], #48", 9, 9) 1051MEM_TEST("st1 {v17.8h, v18.8h, v19.8h}, [x5], x6", -13, -5) 1052 1053MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]", 17, 7) 1054MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64", 9, 9) 1055MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6", -13, -5) 1056 1057 1058MEM_TEST("st1 {v19.4h, v20.4h}, [x5]", 17, 7) 1059MEM_TEST("st1 {v19.4h, v20.4h}, [x5], #16", 9, 9) 1060MEM_TEST("st1 {v19.4h, v20.4h}, [x5], x6", -13, -5) 1061 1062MEM_TEST("st1 {v17.4h, v18.4h, v19.4h}, [x5]", 17, 7) 1063MEM_TEST("st1 {v17.4h, v18.4h, v19.4h}, [x5], #24", 9, 9) 1064MEM_TEST("st1 {v17.4h, v18.4h, v19.4h}, [x5], x6", -13, -5) 1065 1066MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]", 17, 7) 1067MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32", 9, 9) 1068MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6", -13, -5) 1069 1070 1071MEM_TEST("st1 {v19.16b, v20.16b}, [x5]", 17, 7) 1072MEM_TEST("st1 {v19.16b, v20.16b}, [x5], #32", 9, 9) 1073MEM_TEST("st1 {v19.16b, v20.16b}, [x5], x6", -13, -5) 1074 1075MEM_TEST("st1 {v17.16b, v18.16b, v19.16b}, [x5]", 17, 7) 1076MEM_TEST("st1 {v17.16b, v18.16b, v19.16b}, [x5], #48", 9, 9) 1077MEM_TEST("st1 {v17.16b, v18.16b, v19.16b}, [x5], x6", -13, -5) 1078 1079MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7) 1080MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9) 1081MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5) 1082 1083 1084MEM_TEST("st1 {v19.8b, v20.8b}, [x5]", 17, 7) 1085MEM_TEST("st1 {v19.8b, v20.8b}, [x5], #16", 9, 9) 1086MEM_TEST("st1 {v19.8b, v20.8b}, [x5], x6", -13, -5) 1087 1088MEM_TEST("st1 {v17.8b, v18.8b, v19.8b}, [x5]", 17, 7) 1089MEM_TEST("st1 {v17.8b, v18.8b, v19.8b}, [x5], #24", 9, 9) 1090MEM_TEST("st1 {v17.8b, v18.8b, v19.8b}, [x5], x6", -13, -5) 1091 1092MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]", 17, 7) 1093MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32", 9, 9) 1094MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6", -13, -5) 1095 1096 1097MEM_TEST("ld1 {v19.2d, v20.2d}, [x5]", 17, 7) 1098MEM_TEST("ld1 {v19.2d, v20.2d}, [x5], #32", 9, 9) 1099MEM_TEST("ld1 {v19.2d, v20.2d}, [x5], x6", -13, -5) 1100 1101MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d}, [x5]", 17, 7) 1102MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d}, [x5], #48", 9, 9) 1103MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d}, [x5], x6", -13, -5) 1104 1105MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]", 17, 7) 1106MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64", 9, 9) 1107MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6", -13, -5) 1108 1109 1110MEM_TEST("ld1 {v19.1d, v20.1d}, [x5]", 17, 7) 1111MEM_TEST("ld1 {v19.1d, v20.1d}, [x5], #16", 9, 9) 1112MEM_TEST("ld1 {v19.1d, v20.1d}, [x5], x6", -13, -5) 1113 1114MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d}, [x5]", 17, 7) 1115MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d}, [x5], #24", 9, 9) 1116MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d}, [x5], x6", -13, -5) 1117 1118MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5]", 17, 7) 1119MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5], #32", 9, 9) 1120MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d}, [x5], x6", -13, -5) 1121 1122 1123MEM_TEST("ld1 {v19.4s, v20.4s}, [x5]", 17, 7) 1124MEM_TEST("ld1 {v19.4s, v20.4s}, [x5], #32", 9, 9) 1125MEM_TEST("ld1 {v19.4s, v20.4s}, [x5], x6", -13, -5) 1126 1127MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s}, [x5]", 17, 7) 1128MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s}, [x5], #48", 9, 9) 1129MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s}, [x5], x6", -13, -5) 1130 1131MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]", 17, 7) 1132MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64", 9, 9) 1133MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6", -13, -5) 1134 1135 1136MEM_TEST("ld1 {v19.2s, v20.2s}, [x5]", 17, 7) 1137MEM_TEST("ld1 {v19.2s, v20.2s}, [x5], #16", 9, 9) 1138MEM_TEST("ld1 {v19.2s, v20.2s}, [x5], x6", -13, -5) 1139 1140MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s}, [x5]", 17, 7) 1141MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s}, [x5], #24", 9, 9) 1142MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s}, [x5], x6", -13, -5) 1143 1144MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]", 17, 7) 1145MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32", 9, 9) 1146MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6", -13, -5) 1147 1148 1149MEM_TEST("ld1 {v19.8h, v20.8h}, [x5]", 17, 7) 1150MEM_TEST("ld1 {v19.8h, v20.8h}, [x5], #32", 9, 9) 1151MEM_TEST("ld1 {v19.8h, v20.8h}, [x5], x6", -13, -5) 1152 1153MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h}, [x5]", 17, 7) 1154MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h}, [x5], #48", 9, 9) 1155MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h}, [x5], x6", -13, -5) 1156 1157MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]", 17, 7) 1158MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64", 9, 9) 1159MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6", -13, -5) 1160 1161 1162MEM_TEST("ld1 {v19.4h, v20.4h}, [x5]", 17, 7) 1163MEM_TEST("ld1 {v19.4h, v20.4h}, [x5], #16", 9, 9) 1164MEM_TEST("ld1 {v19.4h, v20.4h}, [x5], x6", -13, -5) 1165 1166MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h}, [x5]", 17, 7) 1167MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h}, [x5], #24", 9, 9) 1168MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h}, [x5], x6", -13, -5) 1169 1170MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]", 17, 7) 1171MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32", 9, 9) 1172MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6", -13, -5) 1173 1174 1175MEM_TEST("ld1 {v19.16b, v20.16b}, [x5]", 17, 7) 1176MEM_TEST("ld1 {v19.16b, v20.16b}, [x5], #32", 9, 9) 1177MEM_TEST("ld1 {v19.16b, v20.16b}, [x5], x6", -13, -5) 1178 1179MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b}, [x5]", 17, 7) 1180MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b}, [x5], #48", 9, 9) 1181MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b}, [x5], x6", -13, -5) 1182 1183MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7) 1184MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9) 1185MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5) 1186 1187 1188MEM_TEST("ld1 {v19.8b, v20.8b}, [x5]", 17, 7) 1189MEM_TEST("ld1 {v19.8b, v20.8b}, [x5], #16", 9, 9) 1190MEM_TEST("ld1 {v19.8b, v20.8b}, [x5], x6", -13, -5) 1191 1192MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b}, [x5]", 17, 7) 1193MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b}, [x5], #24", 9, 9) 1194MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b}, [x5], x6", -13, -5) 1195 1196MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]", 17, 7) 1197MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32", 9, 9) 1198MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6", -13, -5) 1199 1200 1201//////////////////////////////////////////////////////////////// 1202printf("LD1R (single structure, replicate)\n"); 1203 1204MEM_TEST("ld1r {v17.2d}, [x5]", 3, -5) 1205MEM_TEST("ld1r {v17.1d}, [x5]", 3, -4) 1206MEM_TEST("ld1r {v17.4s}, [x5]", 3, -3) 1207MEM_TEST("ld1r {v17.2s}, [x5]", 3, -2) 1208MEM_TEST("ld1r {v17.8h}, [x5]", 3, -1) 1209MEM_TEST("ld1r {v17.4h}, [x5]", 3, 1) 1210MEM_TEST("ld1r {v17.16b}, [x5]", 3, 2) 1211MEM_TEST("ld1r {v17.8b}, [x5]", 3, 3) 1212 1213MEM_TEST("ld1r {v17.2d}, [x5], #8", 3, -5) 1214MEM_TEST("ld1r {v17.1d}, [x5], #8", 3, -4) 1215MEM_TEST("ld1r {v17.4s}, [x5], #4", 3, -3) 1216MEM_TEST("ld1r {v17.2s}, [x5], #4", 3, -2) 1217MEM_TEST("ld1r {v17.8h}, [x5], #2", 3, -1) 1218MEM_TEST("ld1r {v17.4h}, [x5], #2", 3, 1) 1219MEM_TEST("ld1r {v17.16b}, [x5], #1", 3, 2) 1220MEM_TEST("ld1r {v17.8b}, [x5], #1", 3, 3) 1221 1222MEM_TEST("ld1r {v17.2d}, [x5], x6", 3, -5) 1223MEM_TEST("ld1r {v17.1d}, [x5], x6", 3, -4) 1224MEM_TEST("ld1r {v17.4s}, [x5], x6", 3, -3) 1225MEM_TEST("ld1r {v17.2s}, [x5], x6", 3, -2) 1226MEM_TEST("ld1r {v17.8h}, [x5], x6", 3, -1) 1227MEM_TEST("ld1r {v17.4h}, [x5], x6", 3, 1) 1228MEM_TEST("ld1r {v17.16b}, [x5], x6", 3, 2) 1229MEM_TEST("ld1r {v17.8b}, [x5], x6", 3, 3) 1230 1231 1232//////////////////////////////////////////////////////////////// 1233printf("LD2R (single structure, replicate)\n"); 1234 1235MEM_TEST("ld2r {v17.2d , v18.2d }, [x5]", 3, -5) 1236MEM_TEST("ld2r {v18.1d , v19.1d }, [x5]", 3, -4) 1237MEM_TEST("ld2r {v19.4s , v20.4s }, [x5]", 3, -3) 1238MEM_TEST("ld2r {v17.2s , v18.2s }, [x5]", 3, -2) 1239MEM_TEST("ld2r {v18.8h , v19.8h }, [x5]", 3, -1) 1240MEM_TEST("ld2r {v19.4h , v20.4h }, [x5]", 3, 1) 1241MEM_TEST("ld2r {v17.16b, v18.16b}, [x5]", 3, 2) 1242MEM_TEST("ld2r {v18.8b , v19.8b }, [x5]", 3, 3) 1243 1244MEM_TEST("ld2r {v19.2d , v20.2d }, [x5], #16", 3, -5) 1245MEM_TEST("ld2r {v17.1d , v18.1d }, [x5], #16", 3, -4) 1246MEM_TEST("ld2r {v18.4s , v19.4s }, [x5], #8", 3, -3) 1247MEM_TEST("ld2r {v19.2s , v20.2s }, [x5], #8", 3, -2) 1248MEM_TEST("ld2r {v17.8h , v18.8h }, [x5], #4", 3, -1) 1249MEM_TEST("ld2r {v18.4h , v19.4h }, [x5], #4", 3, 1) 1250MEM_TEST("ld2r {v19.16b, v20.16b}, [x5], #2", 3, 2) 1251MEM_TEST("ld2r {v17.8b , v18.8b }, [x5], #2", 3, 3) 1252 1253MEM_TEST("ld2r {v18.2d , v19.2d }, [x5], x6", 3, -5) 1254MEM_TEST("ld2r {v19.1d , v20.1d }, [x5], x6", 3, -4) 1255MEM_TEST("ld2r {v17.4s , v18.4s }, [x5], x6", 3, -3) 1256MEM_TEST("ld2r {v18.2s , v19.2s }, [x5], x6", 3, -2) 1257MEM_TEST("ld2r {v19.8h , v20.8h }, [x5], x6", 3, -1) 1258MEM_TEST("ld2r {v17.4h , v18.4h }, [x5], x6", 3, 1) 1259MEM_TEST("ld2r {v18.16b, v19.16b}, [x5], x6", 3, 2) 1260MEM_TEST("ld2r {v19.8b , v20.8b }, [x5], x6", 3, 3) 1261 1262 1263////////////////////////////////////////////////////////////////// 1264printf("LD3R (single structure, replicate)\n"); 1265 1266MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d }, [x5]", 3, -5) 1267MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d }, [x5]", 3, -4) 1268MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s }, [x5]", 3, -3) 1269MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s }, [x5]", 3, -2) 1270MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h }, [x5]", 3, -5) 1271MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h }, [x5]", 3, -4) 1272MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b}, [x5]", 3, -3) 1273MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b }, [x5]", 3, -2) 1274 1275MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d }, [x5], #24", 3, -5) 1276MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d }, [x5], #24", 3, -4) 1277MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s }, [x5], #12", 3, -3) 1278MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s }, [x5], #12", 3, -2) 1279MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h }, [x5], #6", 3, -5) 1280MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h }, [x5], #6", 3, -4) 1281MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b}, [x5], #3", 3, -3) 1282MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b }, [x5], #3", 3, -2) 1283 1284MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d }, [x5], x6", 3, -5) 1285MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d }, [x5], x6", 3, -4) 1286MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s }, [x5], x6", 3, -3) 1287MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s }, [x5], x6", 3, -2) 1288MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h }, [x5], x6", 3, -5) 1289MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h }, [x5], x6", 3, -4) 1290MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b}, [x5], x6", 3, -3) 1291MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b }, [x5], x6", 3, -2) 1292 1293 1294//////////////////////////////////////////////////////////////// 1295printf("LD4R (single structure, replicate)\n"); 1296 1297MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d }, [x5]", 3, -5) 1298MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d }, [x5]", 3, -4) 1299MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s }, [x5]", 3, -3) 1300MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s }, [x5]", 3, -2) 1301MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h }, [x5]", 3, -5) 1302MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h }, [x5]", 3, -4) 1303MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 3, -3) 1304MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b }, [x5]", 3, -2) 1305 1306MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d }, [x5], #32", 3, -5) 1307MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d }, [x5], #32", 3, -4) 1308MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s }, [x5], #16", 3, -3) 1309MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s }, [x5], #16", 3, -2) 1310MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h }, [x5], #8", 3, -5) 1311MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h }, [x5], #8", 3, -4) 1312MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #4", 3, -3) 1313MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b }, [x5], #4", 3, -2) 1314 1315MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d }, [x5], x6", 3, -5) 1316MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d }, [x5], x6", 3, -4) 1317MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s }, [x5], x6", 3, -3) 1318MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s }, [x5], x6", 3, -2) 1319MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h }, [x5], x6", 3, -5) 1320MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h }, [x5], x6", 3, -4) 1321MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", 3, -3) 1322MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b }, [x5], x6", 3, -2) 1323 1324 1325//////////////////////////////////////////////////////////////// 1326printf("LD1/ST1 (single 1-elem struct to/from one lane of 1 reg\n"); 1327 1328MEM_TEST("st1 {v19.d}[0], [x5]", 17, 7) 1329MEM_TEST("st1 {v19.d}[0], [x5], #8", -9, 12) 1330MEM_TEST("st1 {v19.d}[0], [x5], x6", 9, 13) 1331 1332MEM_TEST("st1 {v19.d}[1], [x5]", 17, 7) 1333MEM_TEST("st1 {v19.d}[1], [x5], #8", -9, 12) 1334MEM_TEST("st1 {v19.d}[1], [x5], x6", 9, 13) 1335 1336MEM_TEST("st1 {v19.s}[0], [x5]", 17, 7) 1337MEM_TEST("st1 {v19.s}[0], [x5], #4", -9, 12) 1338MEM_TEST("st1 {v19.s}[0], [x5], x6", 9, 13) 1339 1340MEM_TEST("st1 {v19.s}[3], [x5]", 17, 7) 1341MEM_TEST("st1 {v19.s}[3], [x5], #4", -9, 12) 1342MEM_TEST("st1 {v19.s}[3], [x5], x6", 9, 13) 1343 1344MEM_TEST("st1 {v19.h}[0], [x5]", 17, 7) 1345MEM_TEST("st1 {v19.h}[0], [x5], #2", -9, 12) 1346MEM_TEST("st1 {v19.h}[0], [x5], x6", 9, 13) 1347 1348MEM_TEST("st1 {v19.h}[6], [x5]", 17, 7) 1349MEM_TEST("st1 {v19.h}[6], [x5], #2", -9, 12) 1350MEM_TEST("st1 {v19.h}[6], [x5], x6", 9, 13) 1351 1352MEM_TEST("st1 {v19.b}[0], [x5]", 17, 7) 1353MEM_TEST("st1 {v19.b}[0], [x5], #1", -9, 12) 1354MEM_TEST("st1 {v19.b}[0], [x5], x6", 9, 13) 1355 1356MEM_TEST("st1 {v19.b}[13], [x5]", 17, 7) 1357MEM_TEST("st1 {v19.b}[13], [x5], #1", -9, 12) 1358MEM_TEST("st1 {v19.b}[13], [x5], x6", 9, 13) 1359 1360 1361MEM_TEST("ld1 {v19.d}[0], [x5]", 17, 7) 1362MEM_TEST("ld1 {v19.d}[0], [x5], #8", -9, 12) 1363MEM_TEST("ld1 {v19.d}[0], [x5], x6", 9, 13) 1364 1365MEM_TEST("ld1 {v19.d}[1], [x5]", 17, 7) 1366MEM_TEST("ld1 {v19.d}[1], [x5], #8", -9, 12) 1367MEM_TEST("ld1 {v19.d}[1], [x5], x6", 9, 13) 1368 1369MEM_TEST("ld1 {v19.s}[0], [x5]", 17, 7) 1370MEM_TEST("ld1 {v19.s}[0], [x5], #4", -9, 12) 1371MEM_TEST("ld1 {v19.s}[0], [x5], x6", 9, 13) 1372 1373MEM_TEST("ld1 {v19.s}[3], [x5]", 17, 7) 1374MEM_TEST("ld1 {v19.s}[3], [x5], #4", -9, 12) 1375MEM_TEST("ld1 {v19.s}[3], [x5], x6", 9, 13) 1376 1377MEM_TEST("ld1 {v19.h}[0], [x5]", 17, 7) 1378MEM_TEST("ld1 {v19.h}[0], [x5], #2", -9, 12) 1379MEM_TEST("ld1 {v19.h}[0], [x5], x6", 9, 13) 1380 1381MEM_TEST("ld1 {v19.h}[6], [x5]", 17, 7) 1382MEM_TEST("ld1 {v19.h}[6], [x5], #2", -9, 12) 1383MEM_TEST("ld1 {v19.h}[6], [x5], x6", 9, 13) 1384 1385MEM_TEST("ld1 {v19.b}[0], [x5]", 17, 7) 1386MEM_TEST("ld1 {v19.b}[0], [x5], #1", -9, 12) 1387MEM_TEST("ld1 {v19.b}[0], [x5], x6", 9, 13) 1388 1389MEM_TEST("ld1 {v19.b}[13], [x5]", 17, 7) 1390MEM_TEST("ld1 {v19.b}[13], [x5], #1", -9, 12) 1391MEM_TEST("ld1 {v19.b}[13], [x5], x6", 9, 13) 1392 1393 1394//////////////////////////////////////////////////////////////// 1395printf("LD2/ST2 (single 2-elem struct to/from one lane of 2 regs\n"); 1396 1397MEM_TEST("st2 {v18.d, v19.d}[0], [x5]", 17, 7) 1398MEM_TEST("st2 {v18.d, v19.d}[0], [x5], #16", -9, 12) 1399MEM_TEST("st2 {v18.d, v19.d}[0], [x5], x6", 9, 13) 1400 1401MEM_TEST("st2 {v18.d, v19.d}[1], [x5]", 17, 7) 1402MEM_TEST("st2 {v18.d, v19.d}[1], [x5], #16", -9, 12) 1403MEM_TEST("st2 {v18.d, v19.d}[1], [x5], x6", 9, 13) 1404 1405MEM_TEST("st2 {v18.s, v19.s}[0], [x5]", 17, 7) 1406MEM_TEST("st2 {v18.s, v19.s}[0], [x5], #8", -9, 12) 1407MEM_TEST("st2 {v18.s, v19.s}[0], [x5], x6", 9, 13) 1408 1409MEM_TEST("st2 {v18.s, v19.s}[3], [x5]", 17, 7) 1410MEM_TEST("st2 {v18.s, v19.s}[3], [x5], #8", -9, 12) 1411MEM_TEST("st2 {v18.s, v19.s}[3], [x5], x6", 9, 13) 1412 1413MEM_TEST("st2 {v18.h, v19.h}[0], [x5]", 17, 7) 1414MEM_TEST("st2 {v18.h, v19.h}[0], [x5], #4", -9, 12) 1415MEM_TEST("st2 {v18.h, v19.h}[0], [x5], x6", 9, 13) 1416 1417MEM_TEST("st2 {v18.h, v19.h}[6], [x5]", 17, 7) 1418MEM_TEST("st2 {v18.h, v19.h}[6], [x5], #4", -9, 12) 1419MEM_TEST("st2 {v18.h, v19.h}[6], [x5], x6", 9, 13) 1420 1421MEM_TEST("st2 {v18.b, v19.b}[0], [x5]", 17, 7) 1422MEM_TEST("st2 {v18.b, v19.b}[0], [x5], #2", -9, 12) 1423MEM_TEST("st2 {v18.b, v19.b}[0], [x5], x6", 9, 13) 1424 1425MEM_TEST("st2 {v18.b, v19.b}[13], [x5]", 17, 7) 1426MEM_TEST("st2 {v18.b, v19.b}[13], [x5], #2", -9, 12) 1427MEM_TEST("st2 {v18.b, v19.b}[13], [x5], x6", 9, 13) 1428 1429 1430MEM_TEST("ld2 {v18.d, v19.d}[0], [x5]", 17, 7) 1431MEM_TEST("ld2 {v18.d, v19.d}[0], [x5], #16", -9, 12) 1432MEM_TEST("ld2 {v18.d, v19.d}[0], [x5], x6", 9, 13) 1433 1434MEM_TEST("ld2 {v18.d, v19.d}[1], [x5]", 17, 7) 1435MEM_TEST("ld2 {v18.d, v19.d}[1], [x5], #16", -9, 12) 1436MEM_TEST("ld2 {v18.d, v19.d}[1], [x5], x6", 9, 13) 1437 1438MEM_TEST("ld2 {v18.s, v19.s}[0], [x5]", 17, 7) 1439MEM_TEST("ld2 {v18.s, v19.s}[0], [x5], #8", -9, 12) 1440MEM_TEST("ld2 {v18.s, v19.s}[0], [x5], x6", 9, 13) 1441 1442MEM_TEST("ld2 {v18.s, v19.s}[3], [x5]", 17, 7) 1443MEM_TEST("ld2 {v18.s, v19.s}[3], [x5], #8", -9, 12) 1444MEM_TEST("ld2 {v18.s, v19.s}[3], [x5], x6", 9, 13) 1445 1446MEM_TEST("ld2 {v18.h, v19.h}[0], [x5]", 17, 7) 1447MEM_TEST("ld2 {v18.h, v19.h}[0], [x5], #4", -9, 12) 1448MEM_TEST("ld2 {v18.h, v19.h}[0], [x5], x6", 9, 13) 1449 1450MEM_TEST("ld2 {v18.h, v19.h}[6], [x5]", 17, 7) 1451MEM_TEST("ld2 {v18.h, v19.h}[6], [x5], #4", -9, 12) 1452MEM_TEST("ld2 {v18.h, v19.h}[6], [x5], x6", 9, 13) 1453 1454MEM_TEST("ld2 {v18.b, v19.b}[0], [x5]", 17, 7) 1455MEM_TEST("ld2 {v18.b, v19.b}[0], [x5], #2", -9, 12) 1456MEM_TEST("ld2 {v18.b, v19.b}[0], [x5], x6", 9, 13) 1457 1458MEM_TEST("ld2 {v18.b, v19.b}[13], [x5]", 17, 7) 1459MEM_TEST("ld2 {v18.b, v19.b}[13], [x5], #2", -9, 12) 1460MEM_TEST("ld2 {v18.b, v19.b}[13], [x5], x6", 9, 13) 1461 1462 1463//////////////////////////////////////////////////////////////// 1464printf("LD3/ST3 (single 3-elem struct to/from one lane of 3 regs\n"); 1465 1466MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5]", 17, 7) 1467MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5], #24", -9, 12) 1468MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5], x6", 9, 13) 1469 1470MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5]", 17, 7) 1471MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5], #24", -9, 12) 1472MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5], x6", 9, 13) 1473 1474MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5]", 17, 7) 1475MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5], #12", -9, 12) 1476MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5], x6", 9, 13) 1477 1478MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5]", 17, 7) 1479MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5], #12", -9, 12) 1480MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5], x6", 9, 13) 1481 1482MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5]", 17, 7) 1483MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5], #6", -9, 12) 1484MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5], x6", 9, 13) 1485 1486MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5]", 17, 7) 1487MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5], #6", -9, 12) 1488MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5], x6", 9, 13) 1489 1490MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5]", 17, 7) 1491MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5], #3", -9, 12) 1492MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5], x6", 9, 13) 1493 1494MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5]", 17, 7) 1495MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5], #3", -9, 12) 1496MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5], x6", 9, 13) 1497 1498 1499MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5]", 17, 7) 1500MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5], #24", -9, 12) 1501MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5], x6", 9, 13) 1502 1503MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5]", 17, 7) 1504MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5], #24", -9, 12) 1505MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5], x6", 9, 13) 1506 1507MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5]", 17, 7) 1508MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5], #12", -9, 12) 1509MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5], x6", 9, 13) 1510 1511MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5]", 17, 7) 1512MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5], #12", -9, 12) 1513MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5], x6", 9, 13) 1514 1515MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5]", 17, 7) 1516MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5], #6", -9, 12) 1517MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5], x6", 9, 13) 1518 1519MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5]", 17, 7) 1520MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5], #6", -9, 12) 1521MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5], x6", 9, 13) 1522 1523MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5]", 17, 7) 1524MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5], #3", -9, 12) 1525MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5], x6", 9, 13) 1526 1527MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5]", 17, 7) 1528MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5], #3", -9, 12) 1529MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5], x6", 9, 13) 1530 1531 1532//////////////////////////////////////////////////////////////// 1533printf("LD4/ST4 (single 4-elem struct to/from one lane of 4 regs\n"); 1534 1535MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5]", 17, 7) 1536MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], #32", -9, 12) 1537MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], x6", 9, 13) 1538 1539MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5]", 17, 7) 1540MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], #32", -9, 12) 1541MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], x6", 9, 13) 1542 1543MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5]", 17, 7) 1544MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], #16", -9, 12) 1545MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], x6", 9, 13) 1546 1547MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5]", 17, 7) 1548MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], #16", -9, 12) 1549MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], x6", 9, 13) 1550 1551MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5]", 17, 7) 1552MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], #8", -9, 12) 1553MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], x6", 9, 13) 1554 1555MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5]", 17, 7) 1556MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], #8", -9, 12) 1557MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], x6", 9, 13) 1558 1559MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5]", 17, 7) 1560MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], #4", -9, 12) 1561MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], x6", 9, 13) 1562 1563MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5]", 17, 7) 1564MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], #4", -9, 12) 1565MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], x6", 9, 13) 1566 1567 1568MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5]", 17, 7) 1569MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], #32", -9, 12) 1570MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], x6", 9, 13) 1571 1572MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5]", 17, 7) 1573MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], #32", -9, 12) 1574MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], x6", 9, 13) 1575 1576MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5]", 17, 7) 1577MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], #16", -9, 12) 1578MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], x6", 9, 13) 1579 1580MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5]", 17, 7) 1581MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], #16", -9, 12) 1582MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], x6", 9, 13) 1583 1584MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5]", 17, 7) 1585MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], #8", -9, 12) 1586MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], x6", 9, 13) 1587 1588MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5]", 17, 7) 1589MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], #8", -9, 12) 1590MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], x6", 9, 13) 1591 1592MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5]", 17, 7) 1593MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], #4", -9, 12) 1594MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], x6", 9, 13) 1595 1596MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5]", 17, 7) 1597MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], #4", -9, 12) 1598MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], x6", 9, 13) 1599 1600//////////////////////////////////////////////////////////////// 1601printf("PRFM (immediate)\n"); 1602 1603MEM_TEST("prfm pldl1keep, [x5, #40]", 12, -4); 1604MEM_TEST("prfm pstl3strm, [x5, #56]", 12, -4); 1605 1606//////////////////////////////////////////////////////////////// 1607printf("PRFM (register)\n"); 1608 1609MEM_TEST("prfm pldl1keep, [x5,x6]", 12, -4); 1610MEM_TEST("prfm pldl1strm, [x5,x6, lsl #3]", 12, -4); 1611MEM_TEST("prfm pldl2keep, [x5,w6,uxtw #0]", 12, 4); 1612MEM_TEST("prfm pldl2strm, [x5,w6,uxtw #3]", 12, 4); 1613MEM_TEST("prfm pldl3keep, [x5,w6,sxtw #0]", 12, 4); 1614MEM_TEST("prfm pldl3strm, [x5,w6,sxtw #3]", 12, -4); 1615 1616MEM_TEST("prfm pstl1keep, [x5,x6]", 12, -4); 1617MEM_TEST("prfm pstl1strm, [x5,x6, lsl #3]", 12, -4); 1618MEM_TEST("prfm pstl2keep, [x5,w6,uxtw #0]", 12, 4); 1619MEM_TEST("prfm pstl2strm, [x5,w6,uxtw #3]", 12, 4); 1620MEM_TEST("prfm pstl3keep, [x5,w6,sxtw #0]", 12, 4); 1621MEM_TEST("prfm pstl3strm, [x5,w6,sxtw #3]", 12, -4); 1622 1623//////////////////////////////////////////////////////////////// 1624printf("LDPSW (immediate, simm7)\n"); 1625MEM_TEST("ldpsw x13, x23, [x5], #-24", 0, 0); 1626MEM_TEST("ldpsw x13, x23, [x5, #-40]!", 0, 0); 1627MEM_TEST("ldpsw x13, x23, [x5, #-40]", 0, 0); 1628 1629} /* end of test_memory2() */ 1630 1631//////////////////////////////////////////////////////////////// 1632//////////////////////////////////////////////////////////////// 1633//////////////////////////////////////////////////////////////// 1634//////////////////////////////////////////////////////////////// 1635//////////////////////////////////////////////////////////////// 1636//////////////////////////////////////////////////////////////// 1637 1638int main ( void ) 1639{ 1640 if (1) test_memory_old(); 1641 if (1) test_memory_new(); 1642 return 0; 1643} 1644