Cross Reference: /art/compiler/optimizing/code_generator_arm

Lines Matching defs:destination
2714 void CodeGeneratorARMVIXL::Move32(Location destination, Location source) {
2715   if (source.Equals(destination)) {
2718   if (destination.IsRegister()) {
2720       __ Mov(RegisterFrom(destination), RegisterFrom(source));
2722       __ Vmov(RegisterFrom(destination), SRegisterFrom(source));
2725                                      RegisterFrom(destination),
2729   } else if (destination.IsFpuRegister()) {
2731       __ Vmov(SRegisterFrom(destination), RegisterFrom(source));
2733       __ Vmov(SRegisterFrom(destination), SRegisterFrom(source));
2735       GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex());
2738     DCHECK(destination.IsStackSlot()) << destination;
2743                                     destination.GetStackIndex());
2745       GetAssembler()->StoreSToOffset(SRegisterFrom(source), sp, destination.GetStackIndex());
2751       GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
3657     // (to materialize the constant), since the destination register becomes available for such use
6784   Location destination = move->GetDestination();
6787     if (destination.IsRegister()) {
6788       __ Mov(RegisterFrom(destination), RegisterFrom(source));
6789     } else if (destination.IsFpuRegister()) {
6790       __ Vmov(SRegisterFrom(destination), RegisterFrom(source));
6792       DCHECK(destination.IsStackSlot());
6796                                     destination.GetStackIndex());
6799     if (destination.IsRegister()) {
6801                                      RegisterFrom(destination),
6804     } else if (destination.IsFpuRegister()) {
6805       GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex());
6807       DCHECK(destination.IsStackSlot());
6810       GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
6813     if (destination.IsRegister()) {
6814       __ Vmov(RegisterFrom(destination), SRegisterFrom(source));
6815     } else if (destination.IsFpuRegister()) {
6816       __ Vmov(SRegisterFrom(destination), SRegisterFrom(source));
6818       DCHECK(destination.IsStackSlot());
6819       GetAssembler()->StoreSToOffset(SRegisterFrom(source), sp, destination.GetStackIndex());
6822     if (destination.IsDoubleStackSlot()) {
6825       GetAssembler()->StoreDToOffset(temp, sp, destination.GetStackIndex());
6826     } else if (destination.IsRegisterPair()) {
6827       DCHECK(ExpectedPairLayout(destination));
6829           kLoadWordPair, LowRegisterFrom(destination), sp, source.GetStackIndex());
6831       DCHECK(destination.IsFpuRegisterPair()) << destination;
6832       GetAssembler()->LoadDFromOffset(DRegisterFrom(destination), sp, source.GetStackIndex());
6835     if (destination.IsRegisterPair()) {
6836       __ Mov(LowRegisterFrom(destination), LowRegisterFrom(source));
6837       __ Mov(HighRegisterFrom(destination), HighRegisterFrom(source));
6838     } else if (destination.IsFpuRegisterPair()) {
6839       __ Vmov(DRegisterFrom(destination), LowRegisterFrom(source), HighRegisterFrom(source));
6841       DCHECK(destination.IsDoubleStackSlot()) << destination;
6846                                     destination.GetStackIndex());
6849     if (destination.IsRegisterPair()) {
6850       __ Vmov(LowRegisterFrom(destination), HighRegisterFrom(destination), DRegisterFrom(source));
6851     } else if (destination.IsFpuRegisterPair()) {
6852       __ Vmov(DRegisterFrom(destination), DRegisterFrom(source));
6854       DCHECK(destination.IsDoubleStackSlot()) << destination;
6855       GetAssembler()->StoreDToOffset(DRegisterFrom(source), sp, destination.GetStackIndex());
6862       if (destination.IsRegister()) {
6863         __ Mov(RegisterFrom(destination), value);
6865         DCHECK(destination.IsStackSlot());
6868         GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
6872       if (destination.IsRegisterPair()) {
6873         __ Mov(LowRegisterFrom(destination), Low32Bits(value));
6874         __ Mov(HighRegisterFrom(destination), High32Bits(value));
6876         DCHECK(destination.IsDoubleStackSlot()) << destination;
6879         GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
6884                                       destination.GetHighStackIndex(kArmWordSize));
6888       if (destination.IsFpuRegisterPair()) {
6889         __ Vmov(DRegisterFrom(destination), value);
6891         DCHECK(destination.IsDoubleStackSlot()) << destination;
6895         GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
6900                                       destination.GetHighStackIndex(kArmWordSize));
6905       if (destination.IsFpuRegister()) {
6906         __ Vmov(SRegisterFrom(destination), value);
6908         DCHECK(destination.IsStackSlot());
6911         GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
6943   Location destination = move->GetDestination();
6946   if (source.IsRegister() && destination.IsRegister()) {
6949     DCHECK(!RegisterFrom(destination).Is(temp));
6950     __ Mov(temp, RegisterFrom(destination));
6951     __ Mov(RegisterFrom(destination), RegisterFrom(source));
6953   } else if (source.IsRegister() && destination.IsStackSlot()) {
6954     Exchange(RegisterFrom(source), destination.GetStackIndex());
6955   } else if (source.IsStackSlot() && destination.IsRegister()) {
6956     Exchange(RegisterFrom(destination), source.GetStackIndex());
6957   } else if (source.IsStackSlot() && destination.IsStackSlot()) {
6958     Exchange(source.GetStackIndex(), destination.GetStackIndex());
6959   } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
6962     __ Vmov(SRegisterFrom(source), SRegisterFrom(destination));
6963     __ Vmov(SRegisterFrom(destination), temp);
6964   } else if (source.IsRegisterPair() && destination.IsRegisterPair()) {
6967     __ Mov(LowRegisterFrom(source), LowRegisterFrom(destination));
6968     __ Mov(HighRegisterFrom(source), HighRegisterFrom(destination));
6969     __ Vmov(LowRegisterFrom(destination), HighRegisterFrom(destination), temp);
6970   } else if (source.IsRegisterPair() || destination.IsRegisterPair()) {
6971     vixl32::Register low_reg = LowRegisterFrom(source.IsRegisterPair() ? source : destination);
6972     int mem = source.IsRegisterPair() ? destination.GetStackIndex() : source.GetStackIndex();
6973     DCHECK(ExpectedPairLayout(source.IsRegisterPair() ? source : destination));
6978   } else if (source.IsFpuRegisterPair() && destination.IsFpuRegisterPair()) {
6980     vixl32::DRegister second = DRegisterFrom(destination);
6985   } else if (source.IsFpuRegisterPair() || destination.IsFpuRegisterPair()) {
6988         : DRegisterFrom(destination);
6990         ? destination.GetStackIndex()
6996   } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
6999         : SRegisterFrom(destination);
7001         ? destination.GetStackIndex()
7007   } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
7011     __ Vldr(temp2, MemOperand(sp, destination.GetStackIndex()));
7012     __ Vstr(temp1, MemOperand(sp, destination.GetStackIndex()));
7015     LOG(FATAL) << "Unimplemented" << source << " <-> " << destination;
9203     // the immediate, because IP is used as the destination register. For the other