Lines Matching refs:loc2

1085   Location loc2 = move->GetSource();
1088 DCHECK(!loc2.IsConstant());
1090 if (loc1.Equals(loc2)) {
1094 if (loc1.IsRegister() && loc2.IsRegister()) {
1097 Register r2 = loc2.AsRegister<Register>();
1101 } else if (loc1.IsFpuRegister() && loc2.IsFpuRegister()) {
1104 __ MoveV(VectorRegisterFrom(loc1), VectorRegisterFrom(loc2));
1105 __ MoveV(VectorRegisterFrom(loc2), static_cast<VectorRegister>(FTMP));
1108 FRegister f2 = loc2.AsFpuRegister<FRegister>();
1120 } else if ((loc1.IsRegister() && loc2.IsFpuRegister()) ||
1121 (loc1.IsFpuRegister() && loc2.IsRegister())) {
1125 : loc2.AsFpuRegister<FRegister>();
1126 Register r2 = loc1.IsRegister() ? loc1.AsRegister<Register>() : loc2.AsRegister<Register>();
1130 } else if (loc1.IsRegisterPair() && loc2.IsRegisterPair()) {
1133 Register r2 = loc2.AsRegisterPairLow<Register>();
1138 r2 = loc2.AsRegisterPairHigh<Register>();
1142 } else if ((loc1.IsRegisterPair() && loc2.IsFpuRegister()) ||
1143 (loc1.IsFpuRegister() && loc2.IsRegisterPair())) {
1147 : loc2.AsFpuRegister<FRegister>();
1149 : loc2.AsRegisterPairLow<Register>();
1151 : loc2.AsRegisterPairHigh<Register>();
1161 } else if (loc1.IsStackSlot() && loc2.IsStackSlot()) {
1162 Exchange(loc1.GetStackIndex(), loc2.GetStackIndex(), /* double_slot */ false);
1163 } else if (loc1.IsDoubleStackSlot() && loc2.IsDoubleStackSlot()) {
1164 Exchange(loc1.GetStackIndex(), loc2.GetStackIndex(), /* double_slot */ true);
1165 } else if (loc1.IsSIMDStackSlot() && loc2.IsSIMDStackSlot()) {
1166 ExchangeQuadSlots(loc1.GetStackIndex(), loc2.GetStackIndex());
1167 } else if ((loc1.IsRegister() && loc2.IsStackSlot()) ||
1168 (loc1.IsStackSlot() && loc2.IsRegister())) {
1169 Register reg = loc1.IsRegister() ? loc1.AsRegister<Register>() : loc2.AsRegister<Register>();
1170 intptr_t offset = loc1.IsStackSlot() ? loc1.GetStackIndex() : loc2.GetStackIndex();
1174 } else if ((loc1.IsRegisterPair() && loc2.IsDoubleStackSlot()) ||
1175 (loc1.IsDoubleStackSlot() && loc2.IsRegisterPair())) {
1177 : loc2.AsRegisterPairLow<Register>();
1179 : loc2.AsRegisterPairHigh<Register>();
1180 intptr_t offset_l = loc1.IsDoubleStackSlot() ? loc1.GetStackIndex() : loc2.GetStackIndex();
1182 : loc2.GetHighStackIndex(kMipsWordSize);
1189 } else if ((loc1.IsFpuRegister() && loc2.IsSIMDStackSlot()) ||
1190 (loc1.IsSIMDStackSlot() && loc2.IsFpuRegister())) {
1191 Location fp_loc = loc1.IsFpuRegister() ? loc1 : loc2;
1192 intptr_t offset = loc1.IsFpuRegister() ? loc2.GetStackIndex() : loc1.GetStackIndex();
1196 } else if (loc1.IsFpuRegister() || loc2.IsFpuRegister()) {
1198 : loc2.AsFpuRegister<FRegister>();
1199 intptr_t offset = loc1.IsFpuRegister() ? loc2.GetStackIndex() : loc1.GetStackIndex();
1211 LOG(FATAL) << "Swap between " << loc1 << " and " << loc2 << " is unsupported";