Lines Matching defs:second

2973   Location second = locations->InAt(1);
2978 if (second.IsRegister()) {
2980 __ addl(out.AsRegister<Register>(), second.AsRegister<Register>());
2981 } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) {
2985 first.AsRegister<Register>(), second.AsRegister<Register>(), TIMES_1, 0));
2987 } else if (second.IsConstant()) {
2988 int32_t value = second.GetConstant()->AsIntConstant()->GetValue();
2996 __ addl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
3002 if (second.IsRegisterPair()) {
3003 __ addl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
3004 __ adcl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
3005 } else if (second.IsDoubleStackSlot()) {
3006 __ addl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
3008 Address(ESP, second.GetHighStackIndex(kX86WordSize)));
3010 DCHECK(second.IsConstant()) << second;
3011 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
3019 if (second.IsFpuRegister()) {
3020 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3030 DCHECK(second.IsStackSlot());
3031 __ addss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3037 if (second.IsFpuRegister()) {
3038 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3048 DCHECK(second.IsDoubleStackSlot());
3049 __ addsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3092 Location second = locations->InAt(1);
3096 if (second.IsRegister()) {
3097 __ subl(first.AsRegister<Register>(), second.AsRegister<Register>());
3098 } else if (second.IsConstant()) {
3100 Immediate(second.GetConstant()->AsIntConstant()->GetValue()));
3102 __ subl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
3108 if (second.IsRegisterPair()) {
3109 __ subl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
3110 __ sbbl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
3111 } else if (second.IsDoubleStackSlot()) {
3112 __ subl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
3114 Address(ESP, second.GetHighStackIndex(kX86WordSize)));
3116 DCHECK(second.IsConstant()) << second;
3117 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
3125 if (second.IsFpuRegister()) {
3126 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3136 DCHECK(second.IsStackSlot());
3137 __ subss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3143 if (second.IsFpuRegister()) {
3144 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3154 DCHECK(second.IsDoubleStackSlot());
3155 __ subsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3210 Location second = locations->InAt(1);
3220 } else if (second.IsRegister()) {
3222 __ imull(first.AsRegister<Register>(), second.AsRegister<Register>());
3224 DCHECK(second.IsStackSlot());
3226 __ imull(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
3244 if (second.IsConstant()) {
3245 DCHECK(second.GetConstant()->IsLongConstant());
3247 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
3268 } else if (second.IsRegisterPair()) {
3269 Register in2_hi = second.AsRegisterPairHigh<Register>();
3270 Register in2_lo = second.AsRegisterPairLow<Register>();
3288 DCHECK(second.IsDoubleStackSlot()) << second;
3289 Address in2_hi(ESP, second.GetHighStackIndex(kX86WordSize));
3290 Address in2_lo(ESP, second.GetStackIndex());
3314 if (second.IsFpuRegister()) {
3315 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3325 DCHECK(second.IsStackSlot());
3326 __ mulss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3333 if (second.IsFpuRegister()) {
3334 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3344 DCHECK(second.IsDoubleStackSlot());
3345 __ mulsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3402 Location second = locations->InAt(1);
3411 PushOntoFPStack(second, elem_size, 2 * elem_size, /* is_fp */ true, is_wide);
3572 Location second = locations->InAt(1);
3580 if (second.IsConstant()) {
3581 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
3598 Register second_reg = second.AsRegister<Register>();
3619 DCHECK_EQ(calling_convention.GetRegisterAt(2), second.AsRegisterPairLow<Register>());
3620 DCHECK_EQ(calling_convention.GetRegisterAt(3), second.AsRegisterPairHigh<Register>());
3692 Location second = locations->InAt(1);
3702 if (second.IsFpuRegister()) {
3703 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3713 DCHECK(second.IsStackSlot());
3714 __ divss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3720 if (second.IsFpuRegister()) {
3721 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3731 DCHECK(second.IsDoubleStackSlot());
3732 __ divsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3903 Location second = locations->InAt(1);
3910 if (second.IsRegister()) {
3911 Register second_reg = second.AsRegister<Register>();
3921 int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance;
3937 if (second.IsRegister()) {
3938 Register second_reg = second.AsRegister<Register>();
3949 int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance;
4098 Location second = locations->InAt(1);
4102 if (second.IsRegister()) {
4103 Register second_reg = second.AsRegister<Register>();
4106 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance);
4116 if (second.IsRegister()) {
4117 Register second_reg = second.AsRegister<Register>();
4127 int32_t shift_amt = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance;
6978 Location second = locations->InAt(1);
6982 if (second.IsRegister()) {
6984 __ andl(first.AsRegister<Register>(), second.AsRegister<Register>());
6986 __ orl(first.AsRegister<Register>(), second.AsRegister<Register>());
6989 __ xorl(first.AsRegister<Register>(), second.AsRegister<Register>());
6991 } else if (second.IsConstant()) {
6994 Immediate(second.GetConstant()->AsIntConstant()->GetValue()));
6997 Immediate(second.GetConstant()->AsIntConstant()->GetValue()));
7001 Immediate(second.GetConstant()->AsIntConstant()->GetValue()));
7005 __ andl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
7007 __ orl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
7010 __ xorl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
7015 if (second.IsRegisterPair()) {
7017 __ andl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
7018 __ andl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
7020 __ orl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
7021 __ orl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
7024 __ xorl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
7025 __ xorl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
7027 } else if (second.IsDoubleStackSlot()) {
7029 __ andl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
7031 Address(ESP, second.GetHighStackIndex(kX86WordSize)));
7033 __ orl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
7035 Address(ESP, second.GetHighStackIndex(kX86WordSize)));
7038 __ xorl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
7040 Address(ESP, second.GetHighStackIndex(kX86WordSize)));
7043 DCHECK(second.IsConstant()) << second;
7044 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();