Cross Reference: /art/compiler/optimizing/code_generator_x86

Lines Matching refs:imm
3183         Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
3184         __ subl(first.AsRegister<CpuRegister>(), imm);
3286         Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue());
3287         __ imull(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>(), imm);
3444   int64_t imm = Int64FromConstant(second.GetConstant());
3446   DCHECK(imm == 1 || imm == -1);
3454         if (imm == -1) {
3466         if (imm == -1) {
3485   int64_t imm = Int64FromConstant(second.GetConstant());
3486   DCHECK(IsPowerOfTwo(AbsOrMin(imm)));
3487   uint64_t abs_imm = AbsOrMin(imm);
3495     int shift = CTZ(imm);
3498     if (imm < 0) {
3511     int shift = CTZ(imm);
3514     if (imm < 0) {
3548     int imm = second.GetConstant()->AsIntConstant()->GetValue();
3550     CalculateMagicAndShiftForDivRem(imm, false /* is_long */, &magic, &shift);
3557     if (imm > 0 && magic < 0) {
3559     } else if (imm < 0 && magic > 0) {
3573       __ imull(edx, Immediate(imm));
3580     int64_t imm = second.GetConstant()->AsLongConstant()->GetValue();
3587     CalculateMagicAndShiftForDivRem(imm, true /* is_long */, &magic, &shift);
3598     if (imm > 0 && magic < 0) {
3601     } else if (imm < 0 && magic > 0) {
3619       if (IsInt<32>(imm)) {
3620         __ imulq(rdx, Immediate(static_cast<int32_t>(imm)));
3622         __ imulq(rdx, codegen_->LiteralInt64Address(imm));
3648     int64_t imm = Int64FromConstant(second.GetConstant());
3650     if (imm == 0) {
3652     } else if (imm == 1 || imm == -1) {
3654     } else if (instruction->IsDiv() && IsPowerOfTwo(AbsOrMin(imm))) {
3657       DCHECK(imm <= -2 || imm >= 2);
3917         Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance);
3919           __ shll(first_reg, imm);
3921           __ sarl(first_reg, imm);
3923           __ shrl(first_reg, imm);
3939         Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance);
3941           __ shlq(first_reg, imm);
3943           __ sarq(first_reg, imm);
3945           __ shrq(first_reg, imm);
3986         Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance);
3987         __ rorl(first_reg, imm);
3995         Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance);
3996         __ rorq(first_reg, imm);
5295         Immediate imm(bit_cast<int32_t, float>(fp_value));
5296         __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), imm);
6392       Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
6394         __ andl(first.AsRegister<CpuRegister>(), imm);
6396         __ orl(first.AsRegister<CpuRegister>(), imm);
6399         __ xorl(first.AsRegister<CpuRegister>(), imm);