Cross Reference: /art/compiler/utils/mips/assembler

Lines Matching refs:rt
257                               Register rt,
262   CHECK_NE(rt, kNoRegister);
266                       static_cast<uint32_t>(rt) << kRtShift |
274 uint32_t MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
276   CHECK_NE(rt, kNoRegister);
279                       static_cast<uint32_t>(rt) << kRtShift |
454 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
455   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x21)).GprOuts(rd).GprIns(rs, rt);
458 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label) {
462   DsFsmInstr(EmitI(0x9, rs, rt, imm16), patcher_label).GprOuts(rt).GprIns(rs);
465 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
466   Addiu(rt, rs, imm16, /* patcher_label */ nullptr);
469 void MipsAssembler::Subu(Register rd, Register rs, Register rt) {
470   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x23)).GprOuts(rd).GprIns(rs, rt);
473 void MipsAssembler::MultR2(Register rs, Register rt) {
475   DsFsmInstr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18)).GprIns(rs, rt);
478 void MipsAssembler::MultuR2(Register rs, Register rt) {
480   DsFsmInstr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19)).GprIns(rs, rt);
483 void MipsAssembler::DivR2(Register rs, Register rt) {
485   DsFsmInstr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a)).GprIns(rs, rt);
488 void MipsAssembler::DivuR2(Register rs, Register rt) {
490   DsFsmInstr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b)).GprIns(rs, rt);
493 void MipsAssembler::MulR2(Register rd, Register rs, Register rt) {
495   DsFsmInstr(EmitR(0x1c, rs, rt, rd, 0, 2)).GprOuts(rd).GprIns(rs, rt);
498 void MipsAssembler::DivR2(Register rd, Register rs, Register rt) {
500   DivR2(rs, rt);
504 void MipsAssembler::ModR2(Register rd, Register rs, Register rt) {
506   DivR2(rs, rt);
510 void MipsAssembler::DivuR2(Register rd, Register rs, Register rt) {
512   DivuR2(rs, rt);
516 void MipsAssembler::ModuR2(Register rd, Register rs, Register rt) {
518   DivuR2(rs, rt);
522 void MipsAssembler::MulR6(Register rd, Register rs, Register rt) {
524   DsFsmInstr(EmitR(0, rs, rt, rd, 2, 0x18)).GprOuts(rd).GprIns(rs, rt);
527 void MipsAssembler::MuhR6(Register rd, Register rs, Register rt) {
529   DsFsmInstr(EmitR(0, rs, rt, rd, 3, 0x18)).GprOuts(rd).GprIns(rs, rt);
532 void MipsAssembler::MuhuR6(Register rd, Register rs, Register rt) {
534   DsFsmInstr(EmitR(0, rs, rt, rd, 3, 0x19)).GprOuts(rd).GprIns(rs, rt);
537 void MipsAssembler::DivR6(Register rd, Register rs, Register rt) {
539   DsFsmInstr(EmitR(0, rs, rt, rd, 2, 0x1a)).GprOuts(rd).GprIns(rs, rt);
542 void MipsAssembler::ModR6(Register rd, Register rs, Register rt) {
544   DsFsmInstr(EmitR(0, rs, rt, rd, 3, 0x1a)).GprOuts(rd).GprIns(rs, rt);
547 void MipsAssembler::DivuR6(Register rd, Register rs, Register rt) {
549   DsFsmInstr(EmitR(0, rs, rt, rd, 2, 0x1b)).GprOuts(rd).GprIns(rs, rt);
552 void MipsAssembler::ModuR6(Register rd, Register rs, Register rt) {
554   DsFsmInstr(EmitR(0, rs, rt, rd, 3, 0x1b)).GprOuts(rd).GprIns(rs, rt);
557 void MipsAssembler::And(Register rd, Register rs, Register rt) {
558   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x24)).GprOuts(rd).GprIns(rs, rt);
561 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
562   DsFsmInstr(EmitI(0xc, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
565 void MipsAssembler::Or(Register rd, Register rs, Register rt) {
566   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x25)).GprOuts(rd).GprIns(rs, rt);
569 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
570   DsFsmInstr(EmitI(0xd, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
573 void MipsAssembler::Xor(Register rd, Register rs, Register rt) {
574   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x26)).GprOuts(rd).GprIns(rs, rt);
577 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
578   DsFsmInstr(EmitI(0xe, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
581 void MipsAssembler::Nor(Register rd, Register rs, Register rt) {
582   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x27)).GprOuts(rd).GprIns(rs, rt);
585 void MipsAssembler::Movz(Register rd, Register rs, Register rt) {
587   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x0A)).GprInOuts(rd).GprIns(rs, rt);
590 void MipsAssembler::Movn(Register rd, Register rs, Register rt) {
592   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x0B)).GprInOuts(rd).GprIns(rs, rt);
595 void MipsAssembler::Seleqz(Register rd, Register rs, Register rt) {
597   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x35)).GprOuts(rd).GprIns(rs, rt);
600 void MipsAssembler::Selnez(Register rd, Register rs, Register rt) {
602   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x37)).GprOuts(rd).GprIns(rs, rt);
625 void MipsAssembler::Seb(Register rd, Register rt) {
626   DsFsmInstr(EmitR(0x1f, static_cast<Register>(0), rt, rd, 0x10, 0x20)).GprOuts(rd).GprIns(rt);
629 void MipsAssembler::Seh(Register rd, Register rt) {
630   DsFsmInstr(EmitR(0x1f, static_cast<Register>(0), rt, rd, 0x18, 0x20)).GprOuts(rd).GprIns(rt);
633 void MipsAssembler::Wsbh(Register rd, Register rt) {
634   DsFsmInstr(EmitR(0x1f, static_cast<Register>(0), rt, rd, 2, 0x20)).GprOuts(rd).GprIns(rt);
637 void MipsAssembler::Bitswap(Register rd, Register rt) {
639   DsFsmInstr(EmitR(0x1f, static_cast<Register>(0), rt, rd, 0x0, 0x20)).GprOuts(rd).GprIns(rt);
642 void MipsAssembler::Sll(Register rd, Register rt, int shamt) {
644   DsFsmInstr(EmitR(0, static_cast<Register>(0), rt, rd, shamt, 0x00)).GprOuts(rd).GprIns(rt);
647 void MipsAssembler::Srl(Register rd, Register rt, int shamt) {
649   DsFsmInstr(EmitR(0, static_cast<Register>(0), rt, rd, shamt, 0x02)).GprOuts(rd).GprIns(rt);
652 void MipsAssembler::Rotr(Register rd, Register rt, int shamt) {
654   DsFsmInstr(EmitR(0, static_cast<Register>(1), rt, rd, shamt, 0x02)).GprOuts(rd).GprIns(rt);
657 void MipsAssembler::Sra(Register rd, Register rt, int shamt) {
659   DsFsmInstr(EmitR(0, static_cast<Register>(0), rt, rd, shamt, 0x03)).GprOuts(rd).GprIns(rt);
662 void MipsAssembler::Sllv(Register rd, Register rt, Register rs) {
663   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x04)).GprOuts(rd).GprIns(rs, rt);
666 void MipsAssembler::Srlv(Register rd, Register rt, Register rs) {
667   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x06)).GprOuts(rd).GprIns(rs, rt);
670 void MipsAssembler::Rotrv(Register rd, Register rt, Register rs) {
671   DsFsmInstr(EmitR(0, rs, rt, rd, 1, 0x06)).GprOuts(rd).GprIns(rs, rt);
674 void MipsAssembler::Srav(Register rd, Register rt, Register rs) {
675   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x07)).GprOuts(rd).GprIns(rs, rt);
678 void MipsAssembler::Ext(Register rd, Register rt, int pos, int size) {
682   DsFsmInstr(EmitR(0x1f, rt, rd, static_cast<Register>(size - 1), pos, 0x00))
683       .GprOuts(rd).GprIns(rt);
686 void MipsAssembler::Ins(Register rd, Register rt, int pos, int size) {
690   DsFsmInstr(EmitR(0x1f, rt, rd, static_cast<Register>(pos + size - 1), pos, 0x04))
691       .GprInOuts(rd).GprIns(rt);
694 void MipsAssembler::Lsa(Register rd, Register rs, Register rt, int saPlusOne) {
698   DsFsmInstr(EmitR(0x0, rs, rt, rd, sa, 0x05)).GprOuts(rd).GprIns(rs, rt);
719 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) {
720   DsFsmInstr(EmitI(0x20, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
723 void MipsAssembler::Lh(Register rt, Register rs, uint16_t imm16) {
724   DsFsmInstr(EmitI(0x21, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
727 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label) {
731   DsFsmInstr(EmitI(0x23, rs, rt, imm16), patcher_label).GprOuts(rt).GprIns(rs);
734 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) {
735   Lw(rt, rs, imm16, /* patcher_label */ nullptr);
738 void MipsAssembler::Lwl(Register rt, Register rs, uint16_t imm16) {
740   DsFsmInstr(EmitI(0x22, rs, rt, imm16)).GprInOuts(rt).GprIns(rs);
743 void MipsAssembler::Lwr(Register rt, Register rs, uint16_t imm16) {
745   DsFsmInstr(EmitI(0x26, rs, rt, imm16)).GprInOuts(rt).GprIns(rs);
748 void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) {
749   DsFsmInstr(EmitI(0x24, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
752 void MipsAssembler::Lhu(Register rt, Register rs, uint16_t imm16) {
753   DsFsmInstr(EmitI(0x25, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
762 void MipsAssembler::Lui(Register rt, uint16_t imm16) {
763   DsFsmInstr(EmitI(0xf, static_cast<Register>(0), rt, imm16)).GprOuts(rt);
766 void MipsAssembler::Aui(Register rt, Register rs, uint16_t imm16) {
768   DsFsmInstr(EmitI(0xf, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
771 void MipsAssembler::AddUpper(Register rt, Register rs, uint16_t imm16, Register tmp) {
772   bool increment = (rs == rt);
777     Aui(rt, rs, imm16);
780     Addu(rt, rs, tmp);
782     Lui(rt, imm16);
783     Addu(rt, rs, rt);
801 void MipsAssembler::Sb(Register rt, Register rs, uint16_t imm16) {
802   DsFsmInstr(EmitI(0x28, rs, rt, imm16)).GprIns(rt, rs);
805 void MipsAssembler::Sh(Register rt, Register rs, uint16_t imm16) {
806   DsFsmInstr(EmitI(0x29, rs, rt, imm16)).GprIns(rt, rs);
809 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label) {
813   DsFsmInstr(EmitI(0x2b, rs, rt, imm16), patcher_label).GprIns(rt, rs);
816 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) {
817   Sw(rt, rs, imm16, /* patcher_label */ nullptr);
820 void MipsAssembler::Swl(Register rt, Register rs, uint16_t imm16) {
822   DsFsmInstr(EmitI(0x2a, rs, rt, imm16)).GprIns(rt, rs);
825 void MipsAssembler::Swr(Register rt, Register rs, uint16_t imm16) {
827   DsFsmInstr(EmitI(0x2e, rs, rt, imm16)).GprIns(rt, rs);
830 void MipsAssembler::LlR2(Register rt, Register base, int16_t imm16) {
832   DsFsmInstr(EmitI(0x30, base, rt, imm16)).GprOuts(rt).GprIns(base);
835 void MipsAssembler::ScR2(Register rt, Register base, int16_t imm16) {
837   DsFsmInstr(EmitI(0x38, base, rt, imm16)).GprInOuts(rt).GprIns(base);
840 void MipsAssembler::LlR6(Register rt, Register base, int16_t imm9) {
843   DsFsmInstr(EmitI(0x1f, base, rt, ((imm9 & 0x1ff) << 7) | 0x36)).GprOuts(rt).GprIns(base);
846 void MipsAssembler::ScR6(Register rt, Register base, int16_t imm9) {
849   DsFsmInstr(EmitI(0x1f, base, rt, ((imm9 & 0x1ff) << 7) | 0x26)).GprInOuts(rt).GprIns(base);
852 void MipsAssembler::Slt(Register rd, Register rs, Register rt) {
853   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x2a)).GprOuts(rd).GprIns(rs, rt);
856 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
857   DsFsmInstr(EmitR(0, rs, rt, rd, 0, 0x2b)).GprOuts(rd).GprIns(rs, rt);
860 void MipsAssembler::Slti(Register rt, Register rs, uint16_t imm16) {
861   DsFsmInstr(EmitI(0xa, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
864 void MipsAssembler::Sltiu(Register rt, Register rs, uint16_t imm16) {
865   DsFsmInstr(EmitI(0xb, rs, rt, imm16)).GprOuts(rt).GprIns(rs);
876 void MipsAssembler::Beq(Register rs, Register rt, uint16_t imm16) {
877   DsFsmInstrNop(EmitI(0x4, rs, rt, imm16));
880 void MipsAssembler::Bne(Register rs, Register rt, uint16_t imm16) {
881   DsFsmInstrNop(EmitI(0x5, rs, rt, imm16));
884 void MipsAssembler::Beqz(Register rt, uint16_t imm16) {
885   Beq(rt, ZERO, imm16);
888 void MipsAssembler::Bnez(Register rt, uint16_t imm16) {
889   Bne(rt, ZERO, imm16);
892 void MipsAssembler::Bltz(Register rt, uint16_t imm16) {
893   DsFsmInstrNop(EmitI(0x1, rt, static_cast<Register>(0), imm16));
896 void MipsAssembler::Bgez(Register rt, uint16_t imm16) {
897   DsFsmInstrNop(EmitI(0x1, rt, static_cast<Register>(0x1), imm16));
900 void MipsAssembler::Blez(Register rt, uint16_t imm16) {
901   DsFsmInstrNop(EmitI(0x6, rt, static_cast<Register>(0), imm16));
904 void MipsAssembler::Bgtz(Register rt, uint16_t imm16) {
905   DsFsmInstrNop(EmitI(0x7, rt, static_cast<Register>(0), imm16));
1004 void MipsAssembler::Jic(Register rt, uint16_t imm16) {
1006   DsFsmInstrNop(EmitI(0x36, static_cast<Register>(0), rt, imm16));
1009 void MipsAssembler::Jialc(Register rt, uint16_t imm16) {
1011   DsFsmInstrNop(EmitI(0x3E, static_cast<Register>(0), rt, imm16));
1014 void MipsAssembler::Bltc(Register rs, Register rt, uint16_t imm16) {
1017   CHECK_NE(rt, ZERO);
1018   CHECK_NE(rs, rt);
1019   DsFsmInstrNop(EmitI(0x17, rs, rt, imm16));
1022 void MipsAssembler::Bltzc(Register rt, uint16_t imm16) {
1024   CHECK_NE(rt, ZERO);
1025   DsFsmInstrNop(EmitI(0x17, rt, rt, imm16));
1028 void MipsAssembler::Bgtzc(Register rt, uint16_t imm16) {
1030   CHECK_NE(rt, ZERO);
1031   DsFsmInstrNop(EmitI(0x17, static_cast<Register>(0), rt, imm16));
1034 void MipsAssembler::Bgec(Register rs, Register rt, uint16_t imm16) {
1037   CHECK_NE(rt, ZERO);
1038   CHECK_NE(rs, rt);
1039   DsFsmInstrNop(EmitI(0x16, rs, rt, imm16));
1042 void MipsAssembler::Bgezc(Register rt, uint16_t imm16) {
1044   CHECK_NE(rt, ZERO);
1045   DsFsmInstrNop(EmitI(0x16, rt, rt, imm16));
1048 void MipsAssembler::Blezc(Register rt, uint16_t imm16) {
1050   CHECK_NE(rt, ZERO);
1051   DsFsmInstrNop(EmitI(0x16, static_cast<Register>(0), rt, imm16));
1054 void MipsAssembler::Bltuc(Register rs, Register rt, uint16_t imm16) {
1057   CHECK_NE(rt, ZERO);
1058   CHECK_NE(rs, rt);
1059   DsFsmInstrNop(EmitI(0x7, rs, rt, imm16));
1062 void MipsAssembler::Bgeuc(Register rs, Register rt, uint16_t imm16) {
1065   CHECK_NE(rt, ZERO);
1066   CHECK_NE(rs, rt);
1067   DsFsmInstrNop(EmitI(0x6, rs, rt, imm16));
1070 void MipsAssembler::Beqc(Register rs, Register rt, uint16_t imm16) {
1073   CHECK_NE(rt, ZERO);
1074   CHECK_NE(rs, rt);
1075   DsFsmInstrNop(EmitI(0x8, std::min(rs, rt), std::max(rs, rt), imm16));
1078 void MipsAssembler::Bnec(Register rs, Register rt, uint16_t imm16) {
1081   CHECK_NE(rt, ZERO);
1082   CHECK_NE(rs, rt);
1083   DsFsmInstrNop(EmitI(0x18, std::min(rs, rt), std::max(rs, rt), imm16));
1108 void MipsAssembler::EmitBcondR2(BranchCondition cond, Register rs, Register rt, uint16_t imm16) {
1111       CHECK_EQ(rt, ZERO);
1115       CHECK_EQ(rt, ZERO);
1119       CHECK_EQ(rt, ZERO);
1123       CHECK_EQ(rt, ZERO);
1127       Beq(rs, rt, imm16);
1130       Bne(rs, rt, imm16);
1133       CHECK_EQ(rt, ZERO);
1137       CHECK_EQ(rt, ZERO);
1141       CHECK_EQ(rt, ZERO);
1145       CHECK_EQ(rt, ZERO);
1162 void MipsAssembler::EmitBcondR6(BranchCondition cond, Register rs, Register rt, uint32_t imm16_21) {
1165       Bltc(rs, rt, imm16_21);
1168       Bgec(rs, rt, imm16_21);
1171       Bgec(rt, rs, imm16_21);
1174       Bltc(rt, rs, imm16_21);
1177       CHECK_EQ(rt, ZERO);
1181       CHECK_EQ(rt, ZERO);
1185       CHECK_EQ(rt, ZERO);
1189       CHECK_EQ(rt, ZERO);
1193       Beqc(rs, rt, imm16_21);
1196       Bnec(rs, rt, imm16_21);
1199       CHECK_EQ(rt, ZERO);
1203       CHECK_EQ(rt, ZERO);
1207       Bltuc(rs, rt, imm16_21);
1210       Bgeuc(rs, rt, imm16_21);
1213       CHECK_EQ(rt, ZERO);
1217       CHECK_EQ(rt, ZERO);
1586 void MipsAssembler::MovzS(FRegister fd, FRegister fs, Register rt) {
1588   DsFsmInstr(EmitFR(0x11, 0x10, static_cast<FRegister>(rt), fs, fd, 0x12))
1589       .FprInOuts(fd).FprIns(fs).GprIns(rt);
1592 void MipsAssembler::MovzD(FRegister fd, FRegister fs, Register rt) {
1594   DsFsmInstr(EmitFR(0x11, 0x11, static_cast<FRegister>(rt), fs, fd, 0x12))
1595       .FprInOuts(fd).FprIns(fs).GprIns(rt);
1598 void MipsAssembler::MovnS(FRegister fd, FRegister fs, Register rt) {
1600   DsFsmInstr(EmitFR(0x11, 0x10, static_cast<FRegister>(rt), fs, fd, 0x13))
1601       .FprInOuts(fd).FprIns(fs).GprIns(rt);
1604 void MipsAssembler::MovnD(FRegister fd, FRegister fs, Register rt) {
1606   DsFsmInstr(EmitFR(0x11, 0x11, static_cast<FRegister>(rt), fs, fd, 0x13))
1607       .FprInOuts(fd).FprIns(fs).GprIns(rt);
1727 void MipsAssembler::Mfc1(Register rt, FRegister fs) {
1728   DsFsmInstr(EmitFR(0x11, 0x00, static_cast<FRegister>(rt), fs, static_cast<FRegister>(0), 0x0))
1729       .GprOuts(rt).FprIns(GetFpuRegLow(fs));
1734 void MipsAssembler::Mtc1(Register rt, FRegister fs) {
1736       EmitFR(0x11, 0x04, static_cast<FRegister>(rt), fs, static_cast<FRegister>(0), 0x0);
1740     DsFsmInstr(encoding).FprInOuts(GetFpuRegLow(fs)).GprIns(rt);
1743     DsFsmInstr(encoding).FprOuts(fs).GprIns(rt);
1747 void MipsAssembler::Mfhc1(Register rt, FRegister fs) {
1748   DsFsmInstr(EmitFR(0x11, 0x03, static_cast<FRegister>(rt), fs, static_cast<FRegister>(0), 0x0))
1749       .GprOuts(rt).FprIns(fs);
1754 void MipsAssembler::Mthc1(Register rt, FRegister fs) {
1755   DsFsmInstr(EmitFR(0x11, 0x07, static_cast<FRegister>(rt), fs, static_cast<FRegister>(0), 0x0))
1756       .FprInOuts(fs).GprIns(rt);
1759 void MipsAssembler::MoveFromFpuHigh(Register rt, FRegister fs) {
1762     Mfc1(rt, static_cast<FRegister>(fs + 1));
1764     Mfhc1(rt, fs);
1768 void MipsAssembler::MoveToFpuHigh(Register rt, FRegister fs) {
1771     Mtc1(rt, static_cast<FRegister>(fs + 1));
1773     Mthc1(rt, fs);
1839 void MipsAssembler::PopAndReturn(Register rd, Register rt) {
1842   Jr(rt);
2858 void MipsAssembler::Addiu32(Register rt, Register rs, int32_t value, Register temp) {
2861     Addiu(rt, rs, value);
2868       Addiu(rt, temp, low);
2870       Aui(rt, rs, high);
2879       Addiu(rt, temp, value - kMaxValueForSimpleAdjustment / 2);
2882       Addiu(rt, temp, value - kMinValueForSimpleAdjustment / 2);
2886       Addu(rt, rs, temp);
4290 void MipsAssembler::Beq(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4291   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondEQ, rs, rt);
4294 void MipsAssembler::Bne(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4295   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondNE, rs, rt);
4298 void MipsAssembler::Beqz(Register rt, MipsLabel* label, bool is_bare) {
4299   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondEQZ, rt);
4302 void MipsAssembler::Bnez(Register rt, MipsLabel* label, bool is_bare) {
4303   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondNEZ, rt);
4306 void MipsAssembler::Bltz(Register rt, MipsLabel* label, bool is_bare) {
4307   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondLTZ, rt);
4310 void MipsAssembler::Bgez(Register rt, MipsLabel* label, bool is_bare) {
4311   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondGEZ, rt);
4314 void MipsAssembler::Blez(Register rt, MipsLabel* label, bool is_bare) {
4315   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondLEZ, rt);
4318 void MipsAssembler::Bgtz(Register rt, MipsLabel* label, bool is_bare) {
4319   Bcond(label, /* is_r6 */ (IsR6() && !is_bare), is_bare, kCondGTZ, rt);
4322 bool MipsAssembler::CanExchangeWithSlt(Register rs, Register rt) const {
4323   // If the instruction modifies AT, `rs` or `rt`, it can't be exchanged with the slt[u]
4324   // instruction because either slt[u] depends on `rs` or `rt` or the following
4329       (delay_slot_.masks_.gpr_outs_ & ((1u << AT) | (1u << rs) | (1u << rt))) == 0 &&
4350 void MipsAssembler::GenerateSltForCondBranch(bool unsigned_slt, Register rs, Register rt) {
4354   bool exchange = CanExchangeWithSlt(rs, rt);
4361     Sltu(AT, rs, rt);
4363     Slt(AT, rs, rt);
4370 void MipsAssembler::Blt(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4372     Bcond(label, IsR6(), is_bare, kCondLT, rs, rt);
4373   } else if (!Branch::IsNop(kCondLT, rs, rt)) {
4375     GenerateSltForCondBranch(/* unsigned_slt */ false, rs, rt);
4380 void MipsAssembler::Bge(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4382     Bcond(label, IsR6(), is_bare, kCondGE, rs, rt);
4383   } else if (Branch::IsUncond(kCondGE, rs, rt)) {
4387     GenerateSltForCondBranch(/* unsigned_slt */ false, rs, rt);
4392 void MipsAssembler::Bltu(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4394     Bcond(label, IsR6(), is_bare, kCondLTU, rs, rt);
4395   } else if (!Branch::IsNop(kCondLTU, rs, rt)) {
4397     GenerateSltForCondBranch(/* unsigned_slt */ true, rs, rt);
4402 void MipsAssembler::Bgeu(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4404     Bcond(label, IsR6(), is_bare, kCondGEU, rs, rt);
4405   } else if (Branch::IsUncond(kCondGEU, rs, rt)) {
4409     GenerateSltForCondBranch(/* unsigned_slt */ true, rs, rt);
4440 void MipsAssembler::Beqc(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4441   Bcond(label, /* is_r6 */ true, is_bare, kCondEQ, rs, rt);
4444 void MipsAssembler::Bnec(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4445   Bcond(label, /* is_r6 */ true, is_bare, kCondNE, rs, rt);
4448 void MipsAssembler::Beqzc(Register rt, MipsLabel* label, bool is_bare) {
4449   Bcond(label, /* is_r6 */ true, is_bare, kCondEQZ, rt);
4452 void MipsAssembler::Bnezc(Register rt, MipsLabel* label, bool is_bare) {
4453   Bcond(label, /* is_r6 */ true, is_bare, kCondNEZ, rt);
4456 void MipsAssembler::Bltzc(Register rt, MipsLabel* label, bool is_bare) {
4457   Bcond(label, /* is_r6 */ true, is_bare, kCondLTZ, rt);
4460 void MipsAssembler::Bgezc(Register rt, MipsLabel* label, bool is_bare) {
4461   Bcond(label, /* is_r6 */ true, is_bare, kCondGEZ, rt);
4464 void MipsAssembler::Blezc(Register rt, MipsLabel* label, bool is_bare) {
4465   Bcond(label, /* is_r6 */ true, is_bare, kCondLEZ, rt);
4468 void MipsAssembler::Bgtzc(Register rt, MipsLabel* label, bool is_bare) {
4469   Bcond(label, /* is_r6 */ true, is_bare, kCondGTZ, rt);
4472 void MipsAssembler::Bltc(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4473   Bcond(label, /* is_r6 */ true, is_bare, kCondLT, rs, rt);
4476 void MipsAssembler::Bgec(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4477   Bcond(label, /* is_r6 */ true, is_bare, kCondGE, rs, rt);
4480 void MipsAssembler::Bltuc(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4481   Bcond(label, /* is_r6 */ true, is_bare, kCondLTU, rs, rt);
4484 void MipsAssembler::Bgeuc(Register rs, Register rt, MipsLabel* label, bool is_bare) {
4485   Bcond(label, /* is_r6 */ true, is_bare, kCondGEU, rs, rt);