Cross Reference: /art/compiler/utils/x86/assembler

Lines Matching refs:imm
108 void X86Assembler::pushl(const Immediate& imm) {
110   if (imm.is_int8()) {
112     EmitUint8(imm.value() & 0xFF);
115     EmitImmediate(imm);
133 void X86Assembler::movl(Register dst, const Immediate& imm) {
136   EmitImmediate(imm);
161 void X86Assembler::movl(const Address& dst, const Immediate& imm) {
165   EmitImmediate(imm);
276 void X86Assembler::movb(const Address& dst, const Immediate& imm) {
280   CHECK(imm.is_int8());
281   EmitUint8(imm.value() & 0xFF);
330 void X86Assembler::movw(const Address& dst, const Immediate& imm) {
335   CHECK(imm.is_uint16() || imm.is_int16());
336   EmitUint8(imm.value() & 0xFF);
337   EmitUint8(imm.value() >> 8);
1073 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1080   EmitUint8(imm.value());
1084 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1091   EmitUint8(imm.value());
1571 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1577   EmitUint8(imm.value());
1581 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1586   EmitUint8(imm.value());
1590 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1596   EmitUint8(imm.value());
1906 void X86Assembler::cmpb(const Address& address, const Immediate& imm) {
1910   EmitUint8(imm.value() & 0xFF);
1914 void X86Assembler::cmpw(const Address& address, const Immediate& imm) {
1917   EmitComplex(7, address, imm, /* is_16_op */ true);
1921 void X86Assembler::cmpl(Register reg, const Immediate& imm) {
1923   EmitComplex(7, Operand(reg), imm);
1962 void X86Assembler::cmpl(const Address& address, const Immediate& imm) {
1964   EmitComplex(7, address, imm);
2007 void X86Assembler::testb(const Address& dst, const Immediate& imm) {
2011   CHECK(imm.is_int8());
2012   EmitUint8(imm.value() & 0xFF);
2016 void X86Assembler::testl(const Address& dst, const Immediate& imm) {
2020   EmitImmediate(imm);
2038 void X86Assembler::andl(Register dst, const Immediate& imm) {
2040   EmitComplex(4, Operand(dst), imm);
2058 void X86Assembler::orl(Register dst, const Immediate& imm) {
2060   EmitComplex(1, Operand(dst), imm);
2078 void X86Assembler::xorl(Register dst, const Immediate& imm) {
2080   EmitComplex(6, Operand(dst), imm);
2084 void X86Assembler::addl(Register reg, const Immediate& imm) {
2086   EmitComplex(0, Operand(reg), imm);
2097 void X86Assembler::addl(const Address& address, const Immediate& imm) {
2099   EmitComplex(0, address, imm);
2103 void X86Assembler::addw(const Address& address, const Immediate& imm) {
2105   CHECK(imm.is_uint16() || imm.is_int16()) << imm.value();
2107   EmitComplex(0, address, imm, /* is_16_op */ true);
2111 void X86Assembler::adcl(Register reg, const Immediate& imm) {
2113   EmitComplex(2, Operand(reg), imm);
2138 void X86Assembler::subl(Register reg, const Immediate& imm) {
2140   EmitComplex(5, Operand(reg), imm);
2179 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) {
2181   // See whether imm can be represented as a sign-extended 8bit value.
2182   int32_t v32 = static_cast<int32_t>(imm.value());
2192     EmitImmediate(imm);
2197 void X86Assembler::imull(Register reg, const Immediate& imm) {
2198   imull(reg, reg, imm);
2245 void X86Assembler::sbbl(Register reg, const Immediate& imm) {
2247   EmitComplex(3, Operand(reg), imm);
2291 void X86Assembler::shll(Register reg, const Immediate& imm) {
2292   EmitGenericShift(4, Operand(reg), imm);
2301 void X86Assembler::shll(const Address& address, const Immediate& imm) {
2302   EmitGenericShift(4, address, imm);
2311 void X86Assembler::shrl(Register reg, const Immediate& imm) {
2312   EmitGenericShift(5, Operand(reg), imm);
2321 void X86Assembler::shrl(const Address& address, const Immediate& imm) {
2322   EmitGenericShift(5, address, imm);
2331 void X86Assembler::sarl(Register reg, const Immediate& imm) {
2332   EmitGenericShift(7, Operand(reg), imm);
2341 void X86Assembler::sarl(const Address& address, const Immediate& imm) {
2342   EmitGenericShift(7, address, imm);
2360 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) {
2365   EmitUint8(imm.value() & 0xFF);
2378 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) {
2383   EmitUint8(imm.value() & 0xFF);
2387 void X86Assembler::roll(Register reg, const Immediate& imm) {
2388   EmitGenericShift(0, Operand(reg), imm);
2397 void X86Assembler::rorl(Register reg, const Immediate& imm) {
2398   EmitGenericShift(1, Operand(reg), imm);
2421 void X86Assembler::enter(const Immediate& imm) {
2424   CHECK(imm.is_uint16());
2425   EmitUint8(imm.value() & 0xFF);
2426   EmitUint8((imm.value() >> 8) & 0xFF);
2443 void X86Assembler::ret(const Immediate& imm) {
2446   CHECK(imm.is_uint16());
2447   EmitUint8(imm.value() & 0xFF);
2448   EmitUint8((imm.value() >> 8) & 0xFF);
2671 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) {
2672   int value = imm.value();
2677       addl(reg, imm);
2762 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) {
2764     EmitUint8(imm.value() & 0xFF);
2765     EmitUint8(imm.value() >> 8);
2767     EmitInt32(imm.value());
2831                                     const Immediate& imm) {
2833   CHECK(imm.is_int8());
2834   if (imm.value() == 1) {
2840     EmitUint8(imm.value() & 0xFF);