Lines Matching refs:s0
59 s0-s15 (d0-d7, q0-a3) do not need to be.
65 VFP: single-precision results in s0, double-precision results in d0.
1269 flds s0, [r2] @ s0<- vBB
1271 vcmpe.f32 s0, s1 @ compare (vBB, vCC)
1308 flds s0, [r2] @ s0<- vBB
1310 vcmpe.f32 s0, s1 @ compare (vBB, vCC)
3558 * line that specifies an instruction that performs "s1 = op s0".
3565 flds s0, [r3] @ s0<- vB
3568 fsitos s1, s0 @ s1<- op
3582 * "instr" line that specifies an instruction that performs "d0 = op s0".
3589 flds s0, [r3] @ s0<- vB
3592 fsitod d0, s0 @ d0<- op
3669 vcvt.f64.u32 d2, s0 @ d2<- (double)(vAAl)
3688 * line that specifies an instruction that performs "s1 = op s0".
3695 flds s0, [r3] @ s0<- vB
3698 ftosizs s1, s0 @ s1<- op
3740 * "instr" line that specifies an instruction that performs "d0 = op s0".
3747 flds s0, [r3] @ s0<- vB
3750 vcvt.f64.f32 d0, s0 @ d0<- op
3765 * "instr" line that specifies an instruction that performs "s0 = op d0".
3775 ftosizd s0, d0 @ s0<- op
3778 fsts s0, [r9] @ vA<- s0
3818 * "instr" line that specifies an instruction that performs "s0 = op d0".
3828 vcvt.f32.f64 s0, d0 @ s0<- op
3831 fsts s0, [r9] @ vA<- s0
4807 * specifies an instruction that performs "s2 = s0 op s1". Because we
4820 flds s0, [r2] @ s0<- vBB
4823 fadds s2, s0, s1 @ s2<- op
4837 * specifies an instruction that performs "s2 = s0 op s1". Because we
4850 flds s0, [r2] @ s0<- vBB
4853 fsubs s2, s0, s1 @ s2<- op
4867 * specifies an instruction that performs "s2 = s0 op s1". Because we
4880 flds s0, [r2] @ s0<- vBB
4883 fmuls s2, s0, s1 @ s2<- op
4897 * specifies an instruction that performs "s2 = s0 op s1". Because we
4910 flds s0, [r2] @ s0<- vBB
4913 fdivs s2, s0, s1 @ s2<- op
5938 * "s2 = s0 op s1".
5949 flds s0, [r9] @ s0<- vA
5950 fadds s2, s0, s1 @ s2<- op
5964 * "s2 = s0 op s1".
5975 flds s0, [r9] @ s0<- vA
5976 fsubs s2, s0, s1 @ s2<- op
5990 * "s2 = s0 op s1".
6001 flds s0, [r9] @ s0<- vA
6002 fmuls s2, s0, s1 @ s2<- op
6016 * "s2 = s0 op s1".
6027 flds s0, [r9] @ s0<- vA
6028 fdivs s2, s0, s1 @ s2<- op