Lines Matching refs:Bit
1183 // SPR Bit set.
1193 // GPR Bit set.
1203 // GPRwithAPSR Bit set.
1213 // SPR_8 Bit set.
1223 // GPRnopc Bit set.
1233 // rGPR Bit set.
1243 // hGPR Bit set.
1253 // tGPR Bit set.
1263 // GPRnopc_and_hGPR Bit set.
1273 // hGPR_and_rGPR Bit set.
1283 // tcGPR Bit set.
1293 // tGPR_and_tcGPR Bit set.
1303 // CCR Bit set.
1313 // GPRsp Bit set.
1323 // hGPR_and_tcGPR Bit set.
1333 // DPR Bit set.
1343 // DPR_VFP2 Bit set.
1353 // DPR_8 Bit set.
1363 // GPRPair Bit set.
1373 // GPRPair_with_gsub_1_in_rGPR Bit set.
1383 // GPRPair_with_gsub_0_in_tGPR Bit set.
1393 // GPRPair_with_gsub_0_in_hGPR Bit set.
1403 // GPRPair_with_gsub_0_in_tcGPR Bit set.
1413 // GPRPair_with_gsub_1_in_hGPR_and_rGPR Bit set.
1423 // GPRPair_with_gsub_1_in_tcGPR Bit set.
1433 // GPRPair_with_gsub_1_in_GPRsp Bit set.
1443 // DPairSpc Bit set.
1453 // DPairSpc_with_ssub_0 Bit set.
1463 // DPairSpc_with_dsub_2_then_ssub_0 Bit set.
1473 // DPairSpc_with_dsub_0_in_DPR_8 Bit set.
1483 // DPairSpc_with_dsub_2_in_DPR_8 Bit set.
1493 // DPair Bit set.
1503 // DPair_with_ssub_0 Bit set.
1513 // QPR Bit set.
1523 // DPair_with_ssub_2 Bit set.
1533 // DPair_with_dsub_0_in_DPR_8 Bit set.
1543 // QPR_VFP2 Bit set.
1553 // DPair_with_dsub_1_in_DPR_8 Bit set.
1563 // QPR_8 Bit set.
1573 // DTriple Bit set.
1583 // DTripleSpc Bit set.
1593 // DTripleSpc_with_ssub_0 Bit set.
1603 // DTriple_with_ssub_0 Bit set.
1613 // DTriple_with_dsub_1_dsub_2_in_QPR Bit set.
1623 // DTriple_with_qsub_0_in_QPR Bit set.
1633 // DTriple_with_ssub_2 Bit set.
1643 // DTripleSpc_with_dsub_2_then_ssub_0 Bit set.
1653 // DTriple_with_dsub_2_then_ssub_0 Bit set.
1663 // DTripleSpc_with_dsub_4_then_ssub_0 Bit set.
1673 // DTripleSpc_with_dsub_0_in_DPR_8 Bit set.
1683 // DTriple_with_dsub_0_in_DPR_8 Bit set.
1693 // DTriple_with_qsub_0_in_QPR_VFP2 Bit set.
1703 // DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set.
1713 // DTriple_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set.
1723 // DTriple_with_dsub_1_in_DPR_8 Bit set.
1733 // DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR Bit set.
1743 // DTripleSpc_with_dsub_2_in_DPR_8 Bit set.
1753 // DTriple_with_dsub_2_in_DPR_8 Bit set.
1763 // DTripleSpc_with_dsub_4_in_DPR_8 Bit set.
1773 // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set.
1783 // DTriple_with_qsub_0_in_QPR_8 Bit set.
1793 // DTriple_with_dsub_1_dsub_2_in_QPR_8 Bit set.
1803 // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR Bit set.
1813 // DQuadSpc Bit set.
1823 // DQuadSpc_with_ssub_0 Bit set.
1833 // DQuadSpc_with_dsub_2_then_ssub_0 Bit set.
1843 // DQuadSpc_with_dsub_4_then_ssub_0 Bit set.
1853 // DQuadSpc_with_dsub_0_in_DPR_8 Bit set.
1863 // DQuadSpc_with_dsub_2_in_DPR_8 Bit set.
1873 // DQuadSpc_with_dsub_4_in_DPR_8 Bit set.
1883 // DQuad Bit set.
1893 // DQuad_with_ssub_0 Bit set.
1903 // DQuad_with_ssub_2 Bit set.
1913 // QQPR Bit set.
1923 // DQuad_with_dsub_1_dsub_2_in_QPR Bit set.
1933 // DQuad_with_dsub_2_then_ssub_0 Bit set.
1943 // DQuad_with_dsub_3_then_ssub_0 Bit set.
1953 // DQuad_with_dsub_0_in_DPR_8 Bit set.
1963 // DQuad_with_qsub_0_in_QPR_VFP2 Bit set.
1973 // DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set.
1983 // DQuad_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set.
1993 // DQuad_with_dsub_1_in_DPR_8 Bit set.
2003 // DQuad_with_qsub_1_in_QPR_VFP2 Bit set.
2013 // DQuad_with_dsub_2_in_DPR_8 Bit set.
2023 // DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set.
2033 // DQuad_with_dsub_3_in_DPR_8 Bit set.
2043 // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set.
2053 // DQuad_with_qsub_0_in_QPR_8 Bit set.
2063 // DQuad_with_dsub_1_dsub_2_in_QPR_8 Bit set.
2073 // DQuad_with_qsub_1_in_QPR_8 Bit set.
2083 // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set.
2093 // QQQQPR Bit set.
2103 // QQQQPR_with_ssub_0 Bit set.
2113 // QQQQPR_with_dsub_2_then_ssub_0 Bit set.
2123 // QQQQPR_with_dsub_5_then_ssub_0 Bit set.
2133 // QQQQPR_with_dsub_7_then_ssub_0 Bit set.
2143 // QQQQPR_with_dsub_0_in_DPR_8 Bit set.
2153 // QQQQPR_with_dsub_2_in_DPR_8 Bit set.
2163 // QQQQPR_with_dsub_4_in_DPR_8 Bit set.
2173 // QQQQPR_with_dsub_6_in_DPR_8 Bit set.