Lines Matching refs:MCInst_getOperand
415 switch (MCOperand_getImm(MCInst_getOperand(MI, 0))) {
444 MCOperand *Dst = MCInst_getOperand(MI, 0);
445 MCOperand *MO1 = MCInst_getOperand(MI, 1);
446 MCOperand *MO2 = MCInst_getOperand(MI, 2);
447 MCOperand *MO3 = MCInst_getOperand(MI, 3);
483 MCOperand *Dst = MCInst_getOperand(MI, 0);
484 MCOperand *MO1 = MCInst_getOperand(MI, 1);
485 MCOperand *MO2 = MCInst_getOperand(MI, 2);
529 if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP &&
544 if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP &&
545 MCOperand_getImm(MCInst_getOperand(MI, 3)) == -4) {
550 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 1)));
553 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 1));
564 if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP &&
579 if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP) {
580 MCOperand *MO2 = MCInst_getOperand(MI, 4);
588 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
591 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
608 if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) {
621 if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) {
633 unsigned BaseReg = MCOperand_getReg(MCInst_getOperand(MI, 0));
636 if (MCOperand_getReg(MCInst_getOperand(MI, i)) == BaseReg)
673 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, isStore ? 1 : 0));
681 MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, 0));
688 MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, i));
704 MCOperand *Op = MCInst_getOperand(MI, OpNo);
795 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
834 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
835 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
836 MCOperand *MO3 = MCInst_getOperand(MI, OpNum+2);
865 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
866 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
888 MCOperand *MO1 = MCInst_getOperand(MI, Op);
889 MCOperand *MO2 = MCInst_getOperand(MI, Op + 1);
890 MCOperand *MO3 = MCInst_getOperand(MI, Op + 2);
938 MCOperand *MO1 = MCInst_getOperand(MI, Op);
939 MCOperand *MO2 = MCInst_getOperand(MI, Op+1);
955 MCOperand *MO1 = MCInst_getOperand(MI, Op);
956 MCOperand *MO2 = MCInst_getOperand(MI, Op+1);
976 MCOperand *MO1 = MCInst_getOperand(MI, Op);
988 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
989 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1029 MCOperand *MO1 = MCInst_getOperand(MI, Op);
1030 MCOperand *MO2 = MCInst_getOperand(MI, Op+1);
1031 MCOperand *MO3 = MCInst_getOperand(MI, Op+2);
1082 MCOperand *MO1 = MCInst_getOperand(MI, Op);
1093 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1094 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1130 MCOperand *MO = MCInst_getOperand(MI, OpNum);
1145 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1146 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1159 MCOperand *MO = MCInst_getOperand(MI, OpNum);
1180 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1181 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1226 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1227 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1250 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1262 MCOperand *MO = MCInst_getOperand(MI, OpNum);
1279 MCOperand *MO = MCInst_getOperand(MI, OpNum);
1307 unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1318 unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1324 unsigned ShiftOp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1351 unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1367 unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1389 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, i)));
1392 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, i));
1402 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
1421 MCOperand *Op = MCInst_getOperand(MI, OpNum);
1441 MCOperand *Op = MCInst_getOperand(MI, OpNum);
1453 MCOperand *Op = MCInst_getOperand(MI, OpNum);
1474 MCOperand *Op = MCInst_getOperand(MI, OpNum);
1595 ARMCC_CondCodes CC = (ARMCC_CondCodes)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1613 ARMCC_CondCodes CC = (ARMCC_CondCodes)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1621 if (MCOperand_getReg(MCInst_getOperand(MI, OpNum))) {
1622 //assert(MCOperand_getReg(MCInst_getOperand(MI, OpNum)) == ARM_CPSR &&
1632 unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1650 unsigned imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1662 unsigned imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1674 unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1688 MCOperand *MO = MCInst_getOperand(MI, OpNum);
1718 unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)) * 4;
1732 unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1749 unsigned Mask = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
1750 unsigned Firstcond = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum-1));
1766 MCOperand *MO1 = MCInst_getOperand(MI, Op);
1767 MCOperand *MO2 = MCInst_getOperand(MI, Op + 1);
1794 MCOperand *MO1 = MCInst_getOperand(MI, Op);
1795 MCOperand *MO2 = MCInst_getOperand(MI, Op + 1);
1849 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1850 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1869 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1870 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1918 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1919 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1954 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1955 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
1995 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
1996 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
2021 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
2054 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
2090 MCOperand *MO1 = MCInst_getOperand(MI, OpNum);
2091 MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1);
2092 MCOperand *MO3 = MCInst_getOperand(MI, OpNum+2);
2124 MCOperand *MO = MCInst_getOperand(MI, OpNum);
2141 unsigned EncodedImm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2157 unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2171 unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2191 tmp = 16 - (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2207 tmp = 32 - (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2221 unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
2234 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2237 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2246 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2269 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2295 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2298 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2302 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
2305 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
2309 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2312 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2324 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2327 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2331 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
2334 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
2338 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2341 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2345 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3);
2348 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
2357 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2360 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2369 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2395 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2398 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2402 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
2405 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
2409 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2412 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2424 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2427 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2431 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
2434 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
2438 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2441 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2445 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3);
2448 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
2457 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2484 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2487 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2491 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2494 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2498 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
2501 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
2514 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2517 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2521 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2524 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2528 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
2531 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
2535 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6);
2538 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;
2550 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2553 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2557 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2560 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2564 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
2567 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
2579 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
2582 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
2586 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
2589 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
2593 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
2596 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
2600 printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6);
2603 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;